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11. 发明授权

US06246627B1 Semiconductor device capable of cutting off a leakage current in a defective array section and method thereof 有权
标题翻译：能够切断缺陷阵列部分的漏电流的半导体装置及其方法
公开(公告)号：US06246627B1
公开(公告)日：2001-06-12
申请号：US09397239
申请日：1999-09-16
申请人： Hiroyuki Yamauchi , Hironori Akamatsu , Toru Iwata , Keiichi Kusumoto , Satoshi Takahashi , Yutaka Terada , Takashi Hirata
发明人： Hiroyuki Yamauchi , Hironori Akamatsu , Toru Iwata , Keiichi Kusumoto , Satoshi Takahashi , Yutaka Terada , Takashi Hirata
IPC分类号： G11C514
CPC分类号： G01R31/3004 , H01L2924/0002 , H01L2924/00
摘要： The semiconductor device of this invention includes: an array section including a plurality of circuit blocks; a leakage current cutoff section for cutting off a leakage current occurring in at least one of the plurality of circuit blocks in the array section; and a control section for controlling the leakage current cutoff section in accordance with leakage current cutoff information.
摘要翻译：本发明的半导体器件包括：包括多个电路块的阵列部分; 泄漏电流切断部，切断在所述阵列部中的所述多个电路块中的至少一个电路中发生的漏电流; 以及控制部分，用于根据泄漏电流切断信息控制漏电流切断部分。

12. 发明授权

US6145065A Memory access buffer and reordering apparatus using priorities 失效
标题翻译：使用优先级的存储器访问缓冲器和重新排序装置
公开(公告)号：US6145065A
公开(公告)日：2000-11-07
申请号：US67899
申请日：1998-04-29
申请人： Satoshi Takahashi , Hiroyuki Yamauchi , Hironori Akamatsu , Keiichi Kusumoto , Toru Iwata , Yutaka Terada , Takashi Hirata
发明人： Satoshi Takahashi , Hiroyuki Yamauchi , Hironori Akamatsu , Keiichi Kusumoto , Toru Iwata , Yutaka Terada , Takashi Hirata
IPC分类号： G06F13/16 , G06F12/02
CPC分类号： G06F13/1631
摘要： A current problem is that when a DRAM is to be accessed through a data bus, the DRAM is accessed independently of a bank, a row address, etc., and therefore, is inefficient. To solve this problem, an address bus and a data bus are connected to a main memory part independently of each other, a temporary memory part for holding a plurality of addresses in advance is disposed on the address bus side and holds addresses for every access to the main memory part regardless of transfer of data, thereby pipelining address inputting cycles. Further, for the purpose of an effective operation of the main memory part, using the addresses which are held, the addresses are rearranged in such a manner that addresses with the same row addresses become continuous to each other, or when there are not addresses with the same row addresses, addresses different banks from each other become continuous to each other, and the memory is thereafter accessed. This reduces the number of precharges, shortens a standby period which is necessary for a precharge, and realizes accessing while reducing a wasteful use of time.
摘要翻译：目前的问题在于，当通过数据总线访问DRAM时，独立于存储体，行地址等访问DRAM，因此是低效的。为了解决这个问题，地址总线和数据总线彼此独立地连接到主存储器部分，预先存储多个地址的临时存储器部分设置在地址总线侧，并且保存地址以进行每次访问主存储部分不管数据传输，从而流水线地址输入周期。此外，为了主存储器部分的有效操作，使用所保存的地址，地址被重新排列，使得具有相同行地址的地址彼此连续，或者当没有地址与相同的行地址，彼此不同的存储体彼此变得连续，并且此后访问存储器。这减少了预充电次数，缩短了预充电所需的待机时间，并实现了访问，同时减少了浪费时间的使用。

13. 发明授权

US06919652B2 Network apparatus 有权
标题翻译：网络设备
公开(公告)号：US06919652B2
公开(公告)日：2005-07-19
申请号：US10035434
申请日：2002-01-04
申请人： Satoshi Takahashi , Takashi Hirata , Hironori Akamatsu , Yoshihide Komatsu , Koichi Sugimoto
发明人： Satoshi Takahashi , Takashi Hirata , Hironori Akamatsu , Yoshihide Komatsu , Koichi Sugimoto
IPC分类号： G06F1/26 , G06F13/40 , H01H3/26
CPC分类号： G06F1/266 , G06F13/4072 , Y10T307/50 , Y10T307/76 , Y10T307/937 , Y10T307/944
摘要： A network apparatus is provided, which allows another network apparatus to recognize the disconnection with reliability, if a power supply to the network apparatus is interrupted. A control unit operating with a first power supply outputs a first signal, which is level-converted and supplied as a second signal to an intermediate potential supply unit operating with a second power supply. In the intermediate potential supply unit, a switch receives a reset signal as a switch signal and outputs, when the power supply is interrupted, a ground potential to a driver instead of the second signal. As a result, an intermediate potential supplied to a cable is forcibly set to the ground potential.
摘要翻译：如果网络设备的电源中断，则提供一种网络设备，其允许另一网络设备以可靠性识别该断开。与第一电源一起操作的控制单元输出第一信号，该第一信号被电平转换并作为第二信号提供给与第二电源一起操作的中间电位供应单元。在中间电位供给单元中，开关接收复位信号作为开关信号，并且当电源中断时，输出对驱动器的接地电位而不是第二信号。结果，提供给电缆的中间电势被强制设定为地电位。

14. 发明授权

US06944003B2 Semiconductor integrated circuit with voltage-detecting circuit and signal transmitting and receiving system 失效
标题翻译：具有电压检测电路和信号发射和接收系统的半导体集成电路
公开(公告)号：US06944003B2
公开(公告)日：2005-09-13
申请号：US10365527
申请日：2003-02-13
申请人： Hirokazu Sugimoto , Takashi Hirata , Hironori Akamatsu , Toru Iwata , Satoshi Takahashi
发明人： Hirokazu Sugimoto , Takashi Hirata , Hironori Akamatsu , Toru Iwata , Satoshi Takahashi
IPC分类号： G01R31/28 , H01L21/66 , H02H9/04 , H02H3/24
CPC分类号： H02H9/046
摘要： A first semiconductor integrated circuit is connected to a second semiconductor integrated circuit with a cable. In the first semiconductor integrated circuit, when a power supply voltage becomes less than a set voltage detection level, a voltage-detecting circuit outputs a voltage-detected signal to lower the voltage of the cable and to stop the operation. The second semiconductor integrated circuit detects the decrease in the voltage of the cable to recognize the halt of the operation of the first semiconductor integrated circuit. In the first semiconductor integrated circuit thus configured, in testing the operation under low-voltage conditions in which the power supply voltage is less than the set voltage detection level, the voltage-detecting circuit receives a control signal from an external terminal to stop the operation forcibly. Consequently, even when the power supply voltage is made lower than the set voltage-detecting level, the first semiconductor integrated circuit properly operates until the power supply voltage reaches a predetermined lower limit of operating voltage. Thus, evaluation of operation is possible under low-voltage conditions.
摘要翻译：第一半导体集成电路通过电缆连接到第二半导体集成电路。在第一半导体集成电路中，当电源电压变得小于设定电压检测电平时，电压检测电路输出电压检测信号来降低电缆的电压并停止工作。第二半导体集成电路检测电缆的电压的降低以识别第一半导体集成电路的操作停止。在这样配置的第一半导体集成电路中，在电源电压小于设定电压检测电平的低电压条件下进行测试时，电压检测电路从外部端子接收控制信号，停止动作强制。因此，即使电源电压低于设定电压检测电平，第一半导体集成电路也可以正常工作，直到电源电压达到预定的工作电压下限。因此，在低电压条件下可以进行运行评估。

15. 发明授权

US06393520B2 Data processor and data processing system with internal memories 失效
标题翻译：具有内部存储器的数据处理器和数据处理系统
公开(公告)号：US06393520B2
公开(公告)日：2002-05-21
申请号：US09061331
申请日：1998-04-17
申请人： Takefumi Yoshikawa , Hironori Akamatsu , Satoshi Takahashi
发明人： Takefumi Yoshikawa , Hironori Akamatsu , Satoshi Takahashi
IPC分类号： G06F1200
CPC分类号： G09G5/363 , G06F12/08 , G09G5/39 , G09G5/393 , G09G2340/125 , G09G2352/00 , G09G2360/12 , G09G2360/121 , H04N19/423 , H04N19/61
摘要： A processing unit for carrying out specified data processing operations while performing read/write operations on data in an internal memory is coupled to a memory control unit for performing read/write operations on data in an external memory. Data exchange is carried out between the internal and external memories through the memory control unit. Data requiring a longer processing time or data frequently accessed is mapped into the internal memory in accordance with the data exchange, thereby improving overall memory system performance.
摘要翻译：用于在对内部存储器中的数据执行读/写操作的同时执行指定数据处理操作的处理单元被耦合到用于对外部存储器中的数据执行读/写操作的存储器控制单元。通过存储器控制单元在内部和外部存储器之间进行数据交换。根据数据交换，需要更长处理时间或经常访问的数据的数据被映射到内部存储器中，从而提高整体存储器系统的性能。

16. 发明授权

US07321403B2 Video signal transmitting/receiving system 有权
标题翻译：视频信号发射/接收系统
公开(公告)号：US07321403B2
公开(公告)日：2008-01-22
申请号：US11020046
申请日：2004-12-23
申请人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
发明人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
IPC分类号： H04N5/38 , H04N5/04
CPC分类号： H04N5/073 , H04N11/04 , H04N11/20
摘要： In a transmitting section for a video signal transmitting/receiving system for transmitting digital video signals using a plurality of transmission channels, video guard band signals are inserted into video signals associated with the transmission channels immediately before transition from a blanking region to an effective video region. In a receiving section for the system, the inserted video guard band signals are detected for the respective transmission channels. A skew among the transmission channels is detected based on the detection result. To synchronize the video guard band signals among all the transmission channels, with reference to one of the video signals associated with a transmission channel with the longest delay (i.e., delayed by one clock cycle 1T), a delay of 1T is given to the other video signals. As a result, even if a skew occurs among the transmission channels, correct pixel data is displayed.
摘要翻译：在用于使用多个发送信道发送数字视频信号的视频信号发送/接收系统的发送部分中，在从消隐区域到有效视频区域的转换之前，将视频保护带信号插入到与传输信道相关联的视频信号中。在系统的接收部分中，针对各个传输信道检测插入的视频保护频带信号。基于检测结果检测传输信道之间的偏移。为了使所有传输信道中的视频保护频带信号同步，参考与具有最长延迟（即，延迟一个时钟周期1T）的传输信道相关联的视频信号之一，将1T的延迟给予其他视频信号。结果，即使在发送信道之间发生偏斜，也显示正确的像素数据。

17. 发明申请

US20050104876A1 Video signal transmitting/receiving system 有权
标题翻译：视频信号发射/接收系统
公开(公告)号：US20050104876A1
公开(公告)日：2005-05-19
申请号：US11020046
申请日：2004-12-23
申请人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
发明人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
IPC分类号： H04N5/04 , G09G5/00 , H04J3/00 , H04N5/073 , H04N11/04 , H04N11/20
CPC分类号： H04N5/073 , H04N11/04 , H04N11/20
摘要： In a transmitting section for a video signal transmitting/receiving system for transmitting digital video signals using a plurality of transmission channels, video guard band signals are inserted into video signals associated with the transmission channels immediately before transition from a blanking region to an effective video region. In a receiving section for the system, the inserted video guard band signals are detected for the respective transmission channels. A skew among the transmission channels is detected based on the detection result. To synchronize the video guard band signals among all the transmission channels, with reference to one of the video signals associated with a transmission channel with the longest delay (i.e., delayed by one clock cycle 1T), a delay of 1T is given to the other video signals. As a result, even if a skew occurs among the transmission channels, correct pixel data is displayed.
摘要翻译：在用于使用多个发送信道发送数字视频信号的视频信号发送/接收系统的发送部分中，在从消隐区域到有效视频区域的转换之前，将视频保护带信号插入到与传输信道相关联的视频信号中。在系统的接收部分中，针对各个传输信道检测插入的视频保护频带信号。基于检测结果检测传输信道之间的偏移。为了使所有传输信道中的视频保护频带信号同步，参考与具有最长延迟（即，延迟一个时钟周期1T）的传输信道相关联的视频信号之一，将1T的延迟给予其他视频信号。结果，即使在发送信道之间发生偏斜，也显示正确的像素数据。

18. 发明授权

US06194926B1 Operation timing controllable system 失效
标题翻译：操作时序可控系统
公开(公告)号：US06194926B1
公开(公告)日：2001-02-27
申请号：US09291173
申请日：1999-04-14
申请人： Satoshi Takahashi , Hiroyuki Yamauchi
发明人： Satoshi Takahashi , Hiroyuki Yamauchi
IPC分类号： H03L700
CPC分类号： H03L7/00 , G06F1/04
摘要： A system of the type including a plurality of circuit blocks is provided with an operation timing controller for controlling the operation timing of these circuit blocks by supplying associated operation control signals thereto. The operation timing controller includes a memory for memorizing respective times when a peak current state arises in these circuit blocks, thereby controlling the timing of the operation control signals in accordance with the memorized times when the peak current state arises. As a result, coincident switching noise can be suppressed no matter when the peak current state arises in these circuit blocks.
摘要翻译：包括多个电路块的类型的系统设置有操作定时控制器，用于通过向其提供相关联的操作控制信号来控制这些电路块的操作定时。操作定时控制器包括用于在这些电路块中出现峰值电流状态时存储各个时间的存储器，从而根据当峰值电流状态出现时的存储时间来控制操作控制信号的定时。结果，无论何时在这些电路块中出现峰值电流状态，也可以抑制一致的开关噪声。

19. 发明授权

US10451989B2 Toner, toner stored unit, and image forming apparatus 有权
公开(公告)号：US10451989B2
公开(公告)日：2019-10-22
申请号：US16119653
申请日：2018-08-31
申请人： Satoshi Kojima , Satoshi Takahashi , Tatsuru Moritani , Shosuke Aoai , Tatsuki Yamaguchi
发明人： Satoshi Kojima , Satoshi Takahashi , Tatsuru Moritani , Shosuke Aoai , Tatsuki Yamaguchi
IPC分类号： G03G9/08 , G03G9/097 , G03G9/087 , G03G15/08
摘要： Provided is a toner including toner base particles and an external additive, wherein each of the toner base particles includes a binder resin, a release agent, and silica, an average abundance ratio (Xsurf) of the silica on a region adjacent to a surface of the toner base particle is from 70% through 90%, and a projected area average value S(180) per particle of the toner when the toner is heated to 180° C. and a projected area average value S(30) per particle of the toner when the toner is 30° C. satisfy Formula (1) below, 1.4≤S(180)/S(30)≤1.7 Formula (1).

20. 发明授权

US10294519B2 Method and apparatus for nucleic acid analysis 有权
公开(公告)号：US10294519B2
公开(公告)日：2019-05-21
申请号：US14233256
申请日：2012-05-16
申请人： Toshiro Saito , Koshin Hamasaki , Satoshi Takahashi , Muneo Maeshima , Kyoko Imai , Kazumichi Imai , Ryuji Tao
发明人： Toshiro Saito , Koshin Hamasaki , Satoshi Takahashi , Muneo Maeshima , Kyoko Imai , Kazumichi Imai , Ryuji Tao
IPC分类号： C12Q1/6834 , C12N15/10
摘要： A convenient method for nucleic acid analysis is provided, which enables 1000 or more types of nucleic acid to be analyzed collectively with high comprehensiveness and with a dynamic range of at least four digits. In particular, provided is a very effective analytical method especially for untranslated RNAs and microRNAs, of which the types of target nucleic acids is 10000 or lower. Nucleic acids can be analyzed conveniently and rapidly with high comprehensiveness and quantitative performance at single-molecule sensitivity and resolution by following the steps of: preparing a group of target nucleic acid fragments one molecule at a time and hybridizing the nucleic acid molecules, which have known base sequences and have been labeled with the fluorescence substances, with the group of the target nucleic acid fragments to detect the fluorescence substances labeling the hybridized nucleic acid molecules.

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