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11. 发明授权

US08706996B2 Data processor 有权
标题翻译：数据处理器
公开(公告)号：US08706996B2
公开(公告)日：2014-04-22
申请号：US12844800
申请日：2010-07-27
申请人： Yuki Kondoh , Tohru Nojiri
发明人： Yuki Kondoh , Tohru Nojiri
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F7/38 , G06F9/00 , G06F9/44
CPC分类号： G06F9/30101 , G06F9/3824 , G06F12/1458
摘要： The data processor can form a system including a combination of two or more operating systems running in parallel, which achieves a higher data transfer rate between operating systems and the increase in system performance without impairing the system reliability. In the system, data transfer between domains is performed in an enhanced access mode as well as an access mode in which an access from a domain manager having control of domains is handled as one from the domain manager. The enhanced access mode is arranged by enhancing, to a CPU scale, an access mode in which an access from the domain manager is treated as an access from a software program working on a domain, and the software program of domain manager transfers data between the domains. For example, in case that the domain manager performs data transfer between domains in the enhanced access mode, a read access from the domain manager is disguised as a read access from a first domain, and a write access from the domain manager is disguised as a write access from a second domain.
摘要翻译：数据处理器可以形成包括并行运行的两个或多个操作系统的组合的系统，其在操作系统之间实现更高的数据传输速率，并且在不损害系统可靠性的情况下提高系统性能。在系统中，域之间的数据传输以增强的访问模式以及访问模式进行，其中来自具有域的控制的域管理员的访问被从域管理器处理为一个。通过将来自域管理器的访问视为来自在域上工作的软件程序的访问的访问模式，增强访问模式被设置为CPU规模，并且域管理器的软件程序在域名例如，如果域管理器在增强访问模式下执行域之间的数据传输，则来自域管理器的读取访问被伪装成来自第一域的读取访问，并且来自域管理器的写入访问被伪装为从第二个域写入访问。

12. 发明申请

US20110131577A1 DATA PROCESSOR 有权
标题翻译：数据处理器
公开(公告)号：US20110131577A1
公开(公告)日：2011-06-02
申请号：US12958687
申请日：2010-12-02
申请人： Tohru NOJIRI , Yuki Kondoh
发明人： Tohru NOJIRI , Yuki Kondoh
IPC分类号： G06F9/455
CPC分类号： G06F9/45533 , G06F9/4411 , G06F9/45541 , G06F13/102 , G06F13/105
摘要： This invention is intended to reduce the hypervisor overhead. In the data processor disclosed herein, when a device driver calls for access to a control register to activate a process of a dedicated controlled peripheral device, the access is handled directly without intervention of processing by the hypervisor. When an interrupt is generated from a dedicated controlled peripheral device, a process is directly initiated by the device driver of the operating system governing the peripheral device without intervention of processing by the hypervisor. By implementing this manner of control in the processor, it becomes possible to carry out peripheral device control without intervention of processing by the hypervisor. Thereby, the hypervisor overhead is alleviated.
摘要翻译：本发明旨在减少管理程序开销。在本文公开的数据处理器中，当设备驱动程序要求访问控制寄存器以激活专用受控外围设备的处理时，直接处理访问，而不用管理程序进行处理。当从专用的受控外围设备产生中断时，由管理外围设备的操作系统的设备驱动程序直接发起一个过程，而不会由管理程序进行处理。通过在处理器中实现这种控制方式，可以在不经管理程序处理的情况下执行外围设备控制。从而减轻虚拟机管理程序开销。

13. 发明授权

US07404054B2 Information processing device and processor 有权
标题翻译：信息处理设备和处理器
公开(公告)号：US07404054B2
公开(公告)日：2008-07-22
申请号：US10838240
申请日：2004-05-05
申请人： Yuki Kondoh
发明人： Yuki Kondoh
IPC分类号： G06F12/00
CPC分类号： G06F12/1441 , G06F12/1425
摘要： A device with a small number of circuits is provided for blocking illegal address access from a bus master device connected to the processor system bus. An illegal address blocking circuit is inserted into the address line and control lines between the bus master device and the bus or the bus control circuit, according to the system bus configuration. A register is installed within the illegal address access blocking device to set an address range where access is allowed. The address output from the address line is then checked by a comparator to find if it is within the allowable range or not, and if it is outside the allowable range, then that illegal access is prevented by blocking the output on the control line.
摘要翻译：提供具有少量电路的设备用于阻止从连接到处理器系统总线的总线主设备的非法地址访问。根据系统总线配置，将一个非法地址阻塞电路插入总线主设备与总线或总线控制电路之间的地址线和控制线。在非法地址访问阻断装置内安装一个寄存器，设置允许访问的地址范围。然后由比较器检查从地址线输出的地址，以查找是否在允许范围内，如果超出允许范围，则通过阻止控制线上的输出来防止非法访问。

14. 发明申请

US20080086729A1 DATA PROCESSOR 有权
标题翻译：数据处理器
公开(公告)号：US20080086729A1
公开(公告)日：2008-04-10
申请号：US11869565
申请日：2007-10-09
申请人： Yuki Kondoh , Takashi Matsumoto , Keisuke Toyama , Toru Nojiri
发明人： Yuki Kondoh , Takashi Matsumoto , Keisuke Toyama , Toru Nojiri
IPC分类号： G06F9/455 , G06F9/50
CPC分类号： G06F9/5077 , G06F9/45558 , G06F2009/45583
摘要： A data processor includes: a central processing unit (CPU), in which a plurality of virtual machines (101), each running an application program under controls of different operating systems, and a virtual machine manager (190) for controlling the plurality of virtual machines are selectively arranged according to information set in mode registers (140, 150, 151); and a resource access management module (110) for managing access to hardware resource available for the plurality of virtual machines. The resource access management module accepts, as inputs, the information set in the mode registers and access control information of the central processing unit to the hardware resource, compares the information thus input with information set in a control register, and controls whether or not to permit access to the hardware resource in response to the access control information. As a result, redesign involved in changes in system specifications can be reduced, and a malfunction owing to resource contention can be prevented. The invention contributes to increase of security.
摘要翻译：数据处理器包括：中央处理单元（CPU），其中在不同操作系统的控制下运行应用程序的多个虚拟机（101）和用于控制多个虚拟机的虚拟机器管理器（190）根据在模式寄存器（140,150,151）中设置的信息来选择性地布置机器; 以及用于管理对可用于所述多个虚拟机的硬件资源的访问的资源访问管理模块（110）。资源访问管理模块将在模式寄存器中设置的信息和中央处理单元的访问控制信息作为输入接受到硬件资源，将由此输入的信息与设置在控制寄存器中的信息进行比较，并且控制是否响应于访问控制信息允许访问硬件资源。因此，可以减少涉及系统规格变化的重新设计，并且可以防止由于资源争用引起的故障。本发明有助于提高安全性。

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