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11. 发明授权

US06964598B1 Polishing apparatus and method for forming an integrated circuit 有权
标题翻译：抛光装置和形成集成电路的方法
公开(公告)号：US06964598B1
公开(公告)日：2005-11-15
申请号：US09904828
申请日：2001-07-12
申请人： Lup San Leong , Feng Chen , Charles Lin
发明人： Lup San Leong , Feng Chen , Charles Lin
IPC分类号： B24B37/04 , H01L21/3105 , H01L21/321 , B24B49/00 , B24B51/00
CPC分类号： B24B37/042 , B24B37/20 , H01L21/31053 , H01L21/3212
摘要： In one embodiment, a semiconductor substrate (38) is uniformly polished using a polishing pad (16) that has a first polishing region (26), a second polishing region (28), and a third polishing region (30). The semiconductor substrate (38) is aligned to the polishing pad (16), such that the center of the semiconductor substrate (38) overlies the second polishing region (28), and the edge of the semiconductor substrate overlies the first polishing region (26) and the third polishing region (30). During polishing, the semiconductor substrate (38) is not radially oscillated over the surface of the polishing pad, and as a result a more uniform polishing rate is achieved across the semiconductor substrate (38). This allows the semiconductor substrate (38) to be uniformly polished from center to edge, and increases die yield because die located on the semiconductor substrate (38) are not over polished.
摘要翻译：在一个实施例中，使用具有第一抛光区域（26），第二抛光区域（28）和第三抛光区域（30）的抛光垫（16）均匀地抛光半导体衬底（38）。半导体衬底（38）与抛光垫（16）对准，使得半导体衬底（38）的中心覆盖在第二抛光区域（28）上，并且半导体衬底的边缘覆盖在第一抛光区域（26））和第三抛光区域（30）。在抛光期间，半导体衬底（38）不在抛光垫的表面上径向摆动，结果在半导体衬底（38）上实现了更均匀的抛光速率。这允许半导体衬底（38）从中心到边缘被均匀抛光，并且由于位于半导体衬底（38）上的裸芯未被抛光，所以提高了裸片的产量。

12. 发明授权

US07156726B1 Polishing apparatus and method for forming an integrated circuit 有权
标题翻译：抛光装置和形成集成电路的方法
公开(公告)号：US07156726B1
公开(公告)日：2007-01-02
申请号：US09904981
申请日：2001-07-12
申请人： Feng Chen , Lup San Leong , Charles Lin
发明人： Feng Chen , Lup San Leong , Charles Lin
IPC分类号： B24B7/22
CPC分类号： B24B37/26 , B24B37/042 , B24D7/14
摘要： In one embodiment, a dielectric layer (144, 156) overlying a semiconductor substrate (28) is uniformly polished. During polishing, the perimeter (32) of the semiconductor substrate (28) overlies a peripheral region (16, 48, 66, 86, 120) of a polishing pad (6, 42, 60, 80, 100) and an edge portion (36) of the front surface of semiconductor substrate (28) is not in contact with the front surface (18, 50, 68, 88, 122) of the polishing pad (6, 42, 60, 80, 100), in the peripheral region (16, 48, 66, 86, 120). As a result, the polishing rate at the edge portion (36) of the semiconductor substrate (28) is reduced, and the semiconductor substrate (28) is polished with improved center to edge uniformity. Since the semiconductor substrate (28) is polished with improved center to edge uniformity, die yield is increased because die located within the edge portion (36) of the semiconductor substrate (28) are not over polished.
摘要翻译：在一个实施例中，覆盖半导体衬底（28）的电介质层（144,156）被均匀抛光。在抛光期间，半导体衬底（28）的周边（32）覆盖在抛光垫（6,42,60,80,100）和边缘部分（16,48,66,101）周边区域半导体衬底（28）的前表面的表面（36）不与抛光垫（6,42,60,80,100）的前表面（18,50,68,88,100）接触，区域（16,48,66,86,120）。结果，半导体衬底（28）的边缘部分（36）处的抛光速率降低，并且半导体衬底（28）以改善的中心到边缘均匀性被抛光。由于半导体基板（28）以改善的中心到边缘均匀性被抛光，所以由于位于半导体基板（28）的边缘部分（36）内的模具没有被过度抛光，所以提高了模具的产量。

13. 发明授权

US06443809B1 Polishing apparatus and method for forming an integrated circuit 失效
标题翻译：抛光装置和形成集成电路的方法
公开(公告)号：US06443809B1
公开(公告)日：2002-09-03
申请号：US09440722
申请日：1999-11-16
申请人： Lup San Leong , Feng Chen , Charles Lin
发明人： Lup San Leong , Feng Chen , Charles Lin
IPC分类号： B24B722
CPC分类号： B24B37/26 , B24B37/042 , B24D7/14
摘要： In one embodiment, a semiconductor substrate (38) is uniformly polished using a polishing pad (16) that has a first polishing region (26), a second polishing region (28), and a third polishing region (30). The semiconductor substrate (38) is aligned to the polishing pad (16), such that the center of the semiconductor substrate (38) overlies the second polishing region (28), and the edge of the semiconductor substrate overlies the first polishing region (26) and the third polishing region (30). During polishing, the semiconductor substrate (38) is not radially oscillated over the surface of the polishing pad, and as a result a more uniform polishing rate is achieved across the semiconductor substrate (38). This allows the semiconductor substrate (38) to be uniformly polished from center to edge, and increases die yield because die located on the semiconductor substrate (38) are not over polished.
摘要翻译：在一个实施例中，使用具有第一抛光区域（26），第二抛光区域（28）和第三抛光区域（30）的抛光垫（16）均匀地抛光半导体衬底（38）。半导体衬底（38）与抛光垫（16）对准，使得半导体衬底（38）的中心覆盖在第二抛光区域（28）上，并且半导体衬底的边缘覆盖在第一抛光区域（26））和第三抛光区域（30）。在抛光期间，半导体衬底（38）不在抛光垫的表面上径向摆动，结果在半导体衬底（38）上实现了更均匀的抛光速率。这允许半导体衬底（38）从中心到边缘被均匀抛光，并且由于位于半导体衬底（38）上的裸芯未被抛光，所以提高了裸片的产量。

14. 发明申请

US20130187202A1 SPACER PROFILE ENGINEERING USING FILMS WITH CONTINUOUSLY INCREASED ETCH RATE FROM INNER TO OUTER SURFACE 有权
标题翻译：使用膜的间隙轮廓工程，从内部到外表面连续增加的刻蚀速率
公开(公告)号：US20130187202A1
公开(公告)日：2013-07-25
申请号：US13353684
申请日：2012-01-19
申请人： Xuesong Rao , Chim Seng Seet , Hai Cong , Zheng Zou , Alex See , Yun Ling Tan , Wen Zhan Zhou , Lup San Leong
发明人： Xuesong Rao , Chim Seng Seet , Hai Cong , Zheng Zou , Alex See , Yun Ling Tan , Wen Zhan Zhou , Lup San Leong
IPC分类号： H01L29/78 , H01L21/28
CPC分类号： H01L29/6653 , H01L29/6656
摘要： Interlayer dielectric gap fill processes are enhanced by forming gate spacers with a tapered profile. Embodiments include forming a gate electrode on a substrate, depositing a spacer material over the gate electrode and substrate, the spacer layer having a first surface nearest the gate electrode and substrate, a second surface furthest from the gate electrode and substrate, and a continuously increasing etch rate from the first surface to the second surface, and etching the spacer layer to form a spacer on each side of the gate electrode. Embodiments further include forming the spacer layer by depositing a spacer material and continuously decreasing the density of the spacer material during deposition or depositing a carbon-containing spacer material and causing a gradient of carbon content in the spacer layer.
摘要翻译：通过形成具有锥形轮廓的栅极间隔物来增强层间电介质间隙填充工艺。实施例包括在衬底上形成栅电极，在栅电极和衬底上沉积间隔物材料，间隔层具有最靠近栅电极和衬底的第一表面，离栅电极和衬底最远的第二表面，以及连续增加从第一表面到第二表面的蚀刻速率，并且蚀刻间隔层以在栅电极的每一侧上形成间隔物。实施例还包括通过沉积间隔物材料形成间隔层，并在沉积期间连续降低间隔物材料的密度或沉积含碳间隔物材料并引起间隔层中的碳含量梯度。

15. 发明申请

US20130181259A1 STEP-LIKE SPACER PROFILE 有权
公开(公告)号：US20130181259A1
公开(公告)日：2013-07-18
申请号：US13348766
申请日：2012-01-12
申请人： Xuesong Rao , Chim Seng Seet , Hai Cong , Zheng Zou , Alex See , Yun Ling Tan , Wen Zhan Zhou , Lup San Leong , Huang Liu
发明人： Xuesong Rao , Chim Seng Seet , Hai Cong , Zheng Zou , Alex See , Yun Ling Tan , Wen Zhan Zhou , Lup San Leong , Huang Liu
IPC分类号： H01L29/78 , H01L21/28
CPC分类号： H01L29/6656 , H01L29/78
摘要： Interlayer dielectric gap fill processes are enhanced by forming gate spacers with a step-like or tapered profile. Embodiments include forming a gate electrode on a substrate, depositing a spacer material over the gate electrode, etching the spacer material to form a first spacer on each side of the gate electrode, and pulling back the first spacers to form second spacers which have a step-like profile. Embodiments further include depositing a second spacer material over the gate electrode and the second spacers, and etching the second spacer material to form a third spacer on each second spacer, the second and third spacers forming an outwardly tapered composite spacer.
摘要翻译：通过形成具有阶梯状或锥形轮廓的栅极间隔物来增强层间电介质间隙填充工艺。实施例包括在衬底上形成栅电极，在栅电极上沉积间隔物材料，蚀刻间隔物材料以在栅电极的每一侧上形成第一间隔物，并拉回第一间隔物以形成第二间隔物，像个人资料实施例还包括在栅极电极和第二间隔物上沉积第二间隔物材料，并蚀刻第二间隔物材料以在每个第二间隔物上形成第三间隔物，第二和第三间隔物形成向外锥形的复合间隔物。

16. 发明申请

US20100206818A1 ULTRASONIC FILTRATION FOR CMP SLURRY 审中-公开
标题翻译：用于CMP浆料的超声波过滤
公开(公告)号：US20100206818A1
公开(公告)日：2010-08-19
申请号：US12389346
申请日：2009-02-19
申请人： Lup San Leong , Feng Zhao , Benfu Lin , Haigou Huang , Xianbin Wang
发明人： Lup San Leong , Feng Zhao , Benfu Lin , Haigou Huang , Xianbin Wang
IPC分类号： B01D33/03
CPC分类号： B01D21/283
摘要： The present invention relates to semiconductor processing. In particular, it relates to a tunable ultrasonic filter and a method of using the same for more effective separation of large particles from slurry. In one embodiment a standing wave is produced in the filter and large particles are accumulated at the nodes of the standing waves while the slurry is flowed out of the filter.
摘要翻译：本发明涉及半导体处理。具体地说，本发明涉及一种可调谐超声波滤波器及其使用方法，用于从浆料中更有效地分离大颗粒。在一个实施例中，在过滤器中产生驻波，并且在浆料从过滤器流出的同时，在驻波的节点处积聚大量的颗粒。

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