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11. 发明申请

US20060261846A1 SYSTEMS AND METHODS FOR PROGRAMMING LARGE-SCALE FIELD-PROGRAMMABLE ANALOG ARRAYS 有权
标题翻译：用于编程大规模现场可编程模拟阵列的系统和方法
公开(公告)号：US20060261846A1
公开(公告)日：2006-11-23
申请号：US11383709
申请日：2006-05-16
申请人： Christopher Twigg , Paul Hasler , Jordan Gray , Ravi Chawla
发明人： Christopher Twigg , Paul Hasler , Jordan Gray , Ravi Chawla
IPC分类号： H03K19/173
CPC分类号： H03K19/173 , H03K19/17732
摘要： A large-scale field-programmable analog array (FPAA) for rapidly prototyping analog systems and an arbitrary analog waveform generator. The large-scale FPAA includes a floating-gate transistor array and a plurality of computational analog blocks (CABs), which may be adapted to set bias voltages for operational transconductance amplifiers (OTAs), adjust corner frequencies on the capacitively coupled current conveyors, set multiplier coefficients in vector-matrix multipliers, and a variety of other operations. The floating-gate transistors may be used as switch elements, programmable resistor elements, precision current sources, and programmable transistors. Accordingly, the floating-gate transistors within the array allow on-chip programming of the characteristics of the computational elements, while still maintaining compact CABs. The arbitrary analog waveform generator may include programmable floating-gate MOS transistors for use as analog memory cells to store samples of the waveforms.
摘要翻译：用于快速原型模拟系统和任意模拟波形发生器的大规模现场可编程模拟阵列（FPAA）。大规模FPAA包括浮栅晶体管阵列和多个计算模拟块（CAB），其可适于设置用于工作跨导放大器（OTA）的偏置电压，调整电容耦合的电流输送器上的转角频率矢量矩阵乘法器中的乘数系数，以及各种其他操作。浮栅晶体管可以用作开关元件，可编程电阻器元件，精密电流源和可编程晶体管。因此，阵列内的浮栅晶体管允许对计算元件的特性进行片上编程，同时仍保持紧凑的CAB。任意的模拟波形发生器可以包括用作模拟存储器单元的可编程浮栅MOS晶体管，以存储波形的采样。

12. 发明申请

US20060119499A1 Analog-to-digital converter with programmable floating gate 失效
公开(公告)号：US20060119499A1
公开(公告)日：2006-06-08
申请号：US11326832
申请日：2006-01-05
申请人： Philomena Brady , Paul Hasler
发明人： Philomena Brady , Paul Hasler
IPC分类号： H03M1/12
CPC分类号： G11C7/14 , G11C27/005 , H03M1/1057 , H03M1/36 , H03M1/74 , H03M3/386 , H03M3/45 , H03M3/454
摘要： Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.

13. 发明申请

US20050148965A1 Three-piece garment having an absorbent insert secured with variable adhesive regions 有权
标题翻译：具有吸收性插入物的三件式衣服用可变的粘合剂区域固定
公开(公告)号：US20050148965A1
公开(公告)日：2005-07-07
申请号：US10748712
申请日：2003-12-30
申请人： Sandra Richlen , Paul Christoffel , Suzanne Schmoker , Paul Hasler , Sarah Freiburger , David Bishop , Melanie Milslagle
发明人： Sandra Richlen , Paul Christoffel , Suzanne Schmoker , Paul Hasler , Sarah Freiburger , David Bishop , Melanie Milslagle
IPC分类号： A61F13/15 , A61F13/20
CPC分类号： A61F13/496 , A61F13/15756 , A61F13/539 , Y10T428/277 , Y10T428/28
摘要： An absorbent garment includes a front body panel having a terminal waist edge and a terminal crotch edge and a rear body panel having a terminal waist edge and a terminal crotch edge. The terminal crotch edge of the rear body panel is longitudinally spaced from and forms a gap with the terminal crotch edge of the front body panel. An absorbent insert includes first and second longitudinally spaced end portions and opposite laterally spaced side edges. The absorbent insert bridges the gap between the front and rear body panels with the first and second end portions overlying and connected to the front and rear body panels respectively. At least one of the first and second end portions of the absorbent insert is connected respectively to a corresponding one of the front and rear body panels with at least first and second adhesive regions having first and second adhesive basis weights respectively. At least a portion of the second adhesive region is located adjacent the terminal crotch edge of at least one of the front and rear body panels. The second adhesive basis weight is greater than the first adhesive basis weight. In another aspect, the first adhesive region has a first peel strength and the first and second adhesive regions in combination have a second peel strength. In one embodiment, the second peel strength is greater than the first peel strength. In another aspect, a method of assembling the absorbent garment is provided.
摘要翻译：吸收性服装包括具有终端腰边缘和终端裆边缘的前体面板和具有终端腰边缘和终端裆边缘的后体面板。后体板的端子裆边缘与前身板的端子裆边缘纵向间隔开并形成间隙。吸收性插入物包括第一和第二纵向间隔开的端部和相对的侧向间隔开的侧边缘。吸收性插入物桥接前身板和后体板之间的间隙，第一和第二端部分别覆盖并连接到前和后主体板。吸收性插入物的第一和第二端部中的至少一个分别与至少第一和第二粘合剂区域分别连接到前部和后部主体面板中的对应的一个，其具有分别具有第一和第二粘合剂基重。第二粘合剂区域的至少一部分位于与前身板和后身板中的至少一个的终端裆边相邻。第二粘合剂基重大于第一粘合剂基重。在另一方面，第一粘合剂区域具有第一剥离强度，并且组合的第一和第二粘合剂区域具有第二剥离强度。在一个实施例中，第二剥离强度大于第一剥离强度。另一方面，提供一种组装吸收性服装的方法。

14. 发明申请

US20090323425A1 SYSTEMS AND METHODS FOR IMPROVED FLOATING-GATE TRANSISTOR PROGRAMMING 有权
标题翻译：用于改进浮动栅极晶体管编程的系统和方法
公开(公告)号：US20090323425A1
公开(公告)日：2009-12-31
申请号：US12473146
申请日：2009-05-27
申请人： Paul Hasler , Arindam Basu
发明人： Paul Hasler , Arindam Basu
IPC分类号： G11C16/04
CPC分类号： G11C27/005 , G11C11/5628 , G11C16/0416 , G11C16/10 , G11C2216/10
摘要： The present invention describes systems and methods for improving the programming of floating-gate transistors. An exemplary embodiment of the present invention provides a floating-gate transistor programming system including an array of floating-gate transistors and a measuring circuit comprising a logarithmic transimpedance amplifier and an analog-to-digital converter. Furthermore, the floating-gate transistor programming system includes an injecting circuit comprising a digital-to-analog converter, wherein the pulsing circuit can inject charge into each of the floating-gate transistors and the measuring circuit can measure a present charge value in one of the plurality of floating-gate transistors.
摘要翻译：本发明描述了用于改进浮栅晶体管编程的系统和方法。本发明的示例性实施例提供一种浮栅晶体管编程系统，其包括浮置栅极晶体管阵列和包括对数跨阻抗放大器和模数转换器的测量电路。此外，浮栅晶体管编程系统包括一个包括数模转换器的注入电路，其中脉冲电路可以将电荷注入每个浮栅晶体管，测量电路可以测量当前电荷值多个浮栅晶体管。

15. 发明申请

US20070244698A1 RESPONSE-SELECT NULL STEERING CIRCUIT 审中-公开
标题翻译：响应选择空转向电路
公开(公告)号：US20070244698A1
公开(公告)日：2007-10-18
申请号：US11737127
申请日：2007-04-18
申请人： Jeffery Dugger , Paul Smith , Paul Hasler , Hans Klein
发明人： Jeffery Dugger , Paul Smith , Paul Hasler , Hans Klein
IPC分类号： G10L21/02
CPC分类号： G10L21/02 , G10L2021/02166
摘要： A response select null steering circuit includes a beamformer, a plurality of separate fixed filters, and a selection circuit. In response to sound signals emitted from a desired speaker and an unwanted interferer, a sum signal containing signal components of the speaker and interferer is generated, and the beamformer generates a difference signal that suppresses signal components of the speaker. Each filter provides a null in a unique direction relative to the desired speaker, and can be individually configured to suppress sound signals from an interferer in a particular direction. The selection circuit selects the filter output signal that has the least amount of signal energy as achieving the best suppression of the unwanted interferer.
摘要翻译：响应选择零转向电路包括波束形成器，多个单独的固定滤波器和选择电路。响应于从期望的扬声器发射的声音信号和不想要的干扰源，产生包含扬声器和干扰源的信号分量的和信号，并且波束形成器产生抑制扬声器的信号分量的差分信号。每个滤波器相对于期望的扬声器在唯一的方向上提供零，并且可以被单独地配置为在特定方向上抑制来自干扰源的声音信号。选择电路选择具有最少量的信号能量的滤波器输出信号来实现对不需要的干扰源的最佳抑制。

16. 发明申请

US20070007999A1 SYSTEMS AND METHODS FOR PROGRAMMING FLOATING-GATE TRANSISTORS 有权
标题翻译：用于编程浮动栅极晶体管的系统和方法
公开(公告)号：US20070007999A1
公开(公告)日：2007-01-11
申请号：US11382640
申请日：2006-05-10
申请人： David Graham , Ethan Farquhar , Jordan Gray , Christopher Twigg , Brian Degnan , Christal Gordon , David Abramson , Paul Hasler
发明人： David Graham , Ethan Farquhar , Jordan Gray , Christopher Twigg , Brian Degnan , Christal Gordon , David Abramson , Paul Hasler
IPC分类号： H03K19/173
CPC分类号： G11C27/028 , G11C16/0416 , G11C16/0441 , G11C16/3454
摘要： A floating-gate transistor array and method for programming the same. The floating-gate transistor array includes a plurality of transistors having a source, drain, and floating-gate, whereby the plurality of transistors is arranged into multiple rows and columns. Each row of transistors includes a row programming switch having an output connected to each floating-gate within the row, while each column of transistors includes a column programming switch having an output connected to each drain within the column. The source of each transistor is coupled with a source line corresponding to the specific row of the transistor. The row and column programming switches are utilized to select and program a desired floating-gate transistor. In an indirect programming method, two transistors share a floating gate, such that programming a programmer transistor modifies the current of an agent transistor, which is attached to the circuit, thereby permitting run-time programming.
摘要翻译：一种浮栅晶体管阵列及其编程方法。浮栅晶体管阵列包括具有源极，漏极和浮置栅极的多个晶体管，由此多个晶体管被布置成多个行和列。每行晶体管包括行编程开关，其具有连接到行内的每个浮置栅极的输出，而每列晶体管包括具有连接到该列内的每个漏极的输出的列编程开关。每个晶体管的源极与对应于晶体管的特定行的源极线耦合。行和列编程开关用于选择和编程期望的浮栅晶体管。在间接编程方法中，两个晶体管共享浮置栅极，使得编程晶体管的编程修改附接到电路的代理晶体管的电流，从而允许运行时编程。

17. 发明申请

US20060273805A1 SYSTEM AND METHOD FOR SENSING CAPACITANCE CHANGE OF A CAPACITIVE SENSOR 失效
标题翻译：用于传感电容传感器电容变化的系统和方法
公开(公告)号：US20060273805A1
公开(公告)日：2006-12-07
申请号：US11421850
申请日：2006-06-02
申请人： Sheng-Yu Peng , Paul Hasler
发明人： Sheng-Yu Peng , Paul Hasler
IPC分类号： G01R27/26
CPC分类号： G01R27/2605 , G01D5/24 , G01K7/34
摘要： The present invention relates to systems and methods for sensing capacitance change of a capacitive sensor and for optimizing a capacitive sensing circuit. In an exemplary embodiment, a capacitive sensor may be coupled to an amplifier at floating node. A programming circuit is connected to the floating node for controlling a charge on the floating node. A method of controlling the charge of the floating node is also provided. The method includes applying a first predetermined voltage to a source of a programming transistor, applying a second predetermined voltage to a floating gate of the programming transistor, and applying a third predetermined voltage to a drain of the programming transistor until a charge on the floating gate of the programming transistor reaches a predetermined value. The charge on the floating gate of the programming transistor drives the charge on the floating node to the predetermined value, and thus is controlled.
摘要翻译：本发明涉及用于感测电容式传感器的电容变化并优化电容式感测电路的系统和方法。在示例性实施例中，电容传感器可以耦合到浮动节点处的放大器。编程电路连接到浮动节点，用于控制浮动节点上的电荷。还提供了一种控制浮动节点的电荷的方法。该方法包括将第一预定电压施加到编程晶体管的源极，向编程晶体管的浮置栅极施加第二预定电压，以及向编程晶体管的漏极施加第三预定电压，直到浮置栅极上的电荷的编程晶体管达到预定值。编程晶体管的浮栅上的电荷将浮动节点上的电荷驱动到预定值，从而被控制。

18. 发明申请

US20060119500A1 Digital-to-analog converter with programmable floating gate 失效
标题翻译：具有可编程浮动栅极的数模转换器
公开(公告)号：US20060119500A1
公开(公告)日：2006-06-08
申请号：US11326834
申请日：2006-01-05
申请人： Guillermo Serrano , Matthew Kucic , Paul Hasler
发明人： Guillermo Serrano , Matthew Kucic , Paul Hasler
IPC分类号： H03M1/12
CPC分类号： G11C7/14 , G11C27/005 , H03M1/1057 , H03M1/36 , H03M1/74 , H03M3/386 , H03M3/45 , H03M3/454
摘要： Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.
摘要翻译：讨论了使用浮栅MOSFET作为可编程参考电路的系统和方法。可编程参考电路的一个示例是可编程参考电压源，而可编程参考电路的第二示例是可编程参考电流源。可编程电压参考源和/或参考电流源可以并入几种类型的电路中，例如比较器电路，电流镜电路和转换器电路。比较器电路和电流镜电路通常被并入诸如转换器电路的电路中。转换器电路包括模数转换器和数模转换器。

19. 发明授权

US06822522B1 Method and apparatus for an improved nonlinear oscillator 有权
标题翻译：改进的非线性振荡器的方法和装置
公开(公告)号：US06822522B1
公开(公告)日：2004-11-23
申请号：US10446286
申请日：2003-05-23
申请人： Edgar A. Brown , Joseph D. Neff , Steve P. DeWeerth , Paul Hasler , Brian Keith Meadows
发明人： Edgar A. Brown , Joseph D. Neff , Steve P. DeWeerth , Paul Hasler , Brian Keith Meadows
IPC分类号： H03B520
CPC分类号： H03B5/24
摘要： A nonlinear oscillator method and apparatus. According to one embodiment, a nonlinear oscillator is closed. The nonlinear oscillator includes a first linear amplifier, a second linear amplifier and nonlinear amplifier having a substantially similar design that includes an adjustable linear transconductance region width. The input/output characteristics of the nonlinear oscillator can be represented by van der Pol equations. In another embodiment, a method for providing nonlinear oscillations is disclosed.
摘要翻译：非线性振荡器方法和装置。根据一个实施例，非线性振荡器闭合。非线性振荡器包括第一线性放大器，第二线性放大器和非线性放大器，其具有包括可调线性跨导区域宽度的基本相似的设计。非线性振荡器的输入/输出特性可以用范德波方程表示。在另一个实施例中，公开了一种用于提供非线性振荡的方法。

20. 发明申请

US20070210860A1 METHOD AND DEVICE FOR PERFORMING OFFSET CANCELLATION IN AN AMPLIFIER USING FLOATING-GATE TRANSISTORS 有权
标题翻译：使用浮动栅极晶体管在放大器中执行偏移消除的方法和装置
公开(公告)号：US20070210860A1
公开(公告)日：2007-09-13
申请号：US11468444
申请日：2006-08-30
申请人： Paul Hasler , Venkatesh Srinivasan , Guillermo Serrano , Jordan Gray
发明人： Paul Hasler , Venkatesh Srinivasan , Guillermo Serrano , Jordan Gray
IPC分类号： H03F1/02
CPC分类号： H03F3/45183 , H03F3/45475 , H03F3/45744 , H03F3/45968 , H03F2203/45121 , H03F2203/45661 , H03F2203/45681
摘要： An operational amplifier including: a differential pair of transistors coupled to a pair of input signals; and a pair of floating-gate transistors coupled to the differential pair of transistors, wherein the pair of floating-gate transistors are operable for reducing an offset voltage of the operational amplifier.
摘要翻译：一种运算放大器，包括：耦合到一对输入信号的差分对晶体管; 以及耦合到所述差分对晶体管的一对浮栅晶体管，其中所述一对浮栅晶体管可操作用于减小所述运算放大器的偏移电压。

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