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    • 12. 发明申请
    • MEMORY SYSTEM WITH REDUNDANT DATA STORAGE AND ERROR CORRECTION
    • 具有冗余数据存储和错误校正的存储器系统
    • US20110083041A1
    • 2011-04-07
    • US12995297
    • 2008-06-20
    • Michael RohlederGary HayStephan MuellerManfred Thanner
    • Michael RohlederGary HayStephan MuellerManfred Thanner
    • G06F11/14
    • G06F11/167G11C29/74G11C2029/0411
    • A system comprises at least two random access memory (RAM) elements arranged to store data redundantly. The system further comprises RAM routing logic comprising comparison logic operably coupled to the at least two RAM elements and arranged to compare redundant data read from the at least two RAM elements, and check and validation logic, independent of the RAM routing logic, operably coupled to the at least two RAM elements and arranged to additionally detect an error in the redundant data read from the at least two RAM elements and provide an error indication signal to the RAM routing logic in response thereto. The RAM routing logic further comprises selection logic arranged to dynamically select redundant data from one of the at least two RAM elements based on the comparison of the redundant data and the error indication signal.
    • 系统包括被布置为冗余地存储数据的至少两个随机存取存储器(RAM)元件。 所述系统还包括RAM路由逻辑,其包括可操作地耦合到所述至少两个RAM元件的比较逻辑,并且被布置为比较从所述至少两个RAM元素读取的冗余数据,以及独立于所述RAM路由逻辑的检查和验证逻辑,其可操作地耦合到 所述至少两个RAM元件并且被布置为附加地检测从所述至少两个RAM元素读取的冗余数据中的错误,并且响应于此向RAM路由逻辑提供错误指示信号。 RAM路由逻辑还包括选择逻辑,其被布置为基于冗余数据和错误指示信号的比较来动态地从至少两个RAM元素中的一个RAM元素中选择冗余数据。
    • 15. 发明授权
    • Memory system with redundant data storage and error correction
    • 具有冗余数据存储和纠错的存储系统
    • US08589737B2
    • 2013-11-19
    • US12995297
    • 2008-06-20
    • Michael RohlederGary HayStephan MuellerManfred Thanner
    • Michael RohlederGary HayStephan MuellerManfred Thanner
    • G06F11/00
    • G06F11/167G11C29/74G11C2029/0411
    • A system comprises at least two random access memory (RAM) elements arranged to store data redundantly. The system further comprises RAM routing logic comprising comparison logic operably coupled to the at least two RAM elements and arranged to compare redundant data read from the at least two RAM elements, and check and validation logic, independent of the RAM routing logic, operably coupled to the at least two RAM elements and arranged to additionally detect an error in the redundant data read from the at least two RAM elements and provide an error indication signal to the RAM routing logic in response thereto. The RAM routing logic further comprises selection logic arranged to dynamically select redundant data from one of the at least two RAM elements based on the comparison of the redundant data and the error indication signal.
    • 系统包括被布置为冗余地存储数据的至少两个随机存取存储器(RAM)元件。 所述系统还包括RAM路由逻辑,其包括可操作地耦合到所述至少两个RAM元件的比较逻辑,并且被布置为比较从所述至少两个RAM元素读取的冗余数据,以及独立于所述RAM路由逻辑的检查和验证逻辑,其可操作地耦合到 所述至少两个RAM元件并且被布置为附加地检测从所述至少两个RAM元素读取的冗余数据中的错误,并且响应于此向RAM路由逻辑提供错误指示信号。 RAM路由逻辑还包括选择逻辑,其被布置为基于冗余数据和错误指示信号的比较来动态地从至少两个RAM元素中的一个RAM元素中选择冗余数据。
    • 16. 发明申请
    • DATA PROCESSING METHOD, DATA PROCESSOR AND APPARATUS INCLUDING A DATA PROCESSOR
    • 数据处理方法,数据处理器和包括数据处理器的设备
    • US20120304024A1
    • 2012-11-29
    • US13577072
    • 2010-02-16
    • Michael RohlederJoachim FaderFrank LenkeMarkus Baumeister
    • Michael RohlederJoachim FaderFrank LenkeMarkus Baumeister
    • G06F11/07
    • G06F9/28G06F9/38G06F11/1645G06F11/1695G06F2201/845
    • A method of processing data in a data processor comprising at least two data processing units. The method comprises performing different data processing steps in the data processing units concurrently during a parallel operation, and replicating performances of selected identical data processing steps in the data processing units during a non-synchronised redundant operation. The non-synchronised redundant operation comprises an initial performance of the selected identical data processing steps in one of the data processing units and a replicate performance of the data processing steps starting later than the initial performance, preferably in another of the data processing units. Initial result data representative of results from the initial performance are registered, and compared with replicate result data representative of results from the replicate performance, and an error signal is produced in case of discrepancy.
    • 一种在包括至少两个数据处理单元的数据处理器中处理数据的方法。 该方法包括在并行操作期间同时在数据处理单元中执行不同的数据处理步骤,以及在非同步冗余操作期间在数据处理单元中复制所选择的相同数据处理步骤的性能。 非同步冗余操作包括在数据处理单元之一中所选择的相同数据处理步骤的初始性能以及优先于另一个数据处理单元中的初始性能开始的数据处理步骤的复制性能。 记录表示来自初始性能的结果的初始结果数据,并与代表复制性能的结果的复制结果数据进行比较,并且在差异的情况下产生错误信号。
    • 20. 发明授权
    • System on chip
    • 片上系统
    • US09336411B2
    • 2016-05-10
    • US14442241
    • 2012-11-23
    • Michael RohlederStefan SingerManfred Thanner
    • Michael RohlederStefan SingerManfred Thanner
    • G06F21/71G06F21/74G06F21/78G06F21/80
    • G06F21/71G06F21/74G06F21/78G06F21/805G06F2213/0038
    • In a system on chip responder units comprise one or more responder elements and is associated with one or more protection units. A request analysis unit is arranged to receive from a requesting requestor unit a request for access to one or more target responder elements among responder elements within a target responder unit among the responder units. The request analysis unit determines relevant protection data based on the request and an authorization list, which comprises one or more entries For each entry of the authorization list: taking access requirements specified by the respective entry into account if one or more of the target responder elements are part of the group of responder elements specified by the respective entry. The request analysis unit provides the relevant protection data to one or more target protection unit(s) associated with the responder unit(s), and located in a hierarchical path between the requesting requestor unit requestor unit and the target responder unit. The target protection unit(s) are arranged to perform a protective action for the target responder elements based on relevant protection data.
    • 在系统片上响应器单元包括一个或多个应答器元件并与一个或多个保护单元相关联。 请求分析单元被配置为从请求请求者单元接收对应答单元中的目标响应器单元内的响应者元素中的一个或多个目标响应者元素的访问请求。 所述请求分析单元基于所述请求和授权列表来确定相关的保护数据,所述授权列表包括一个或多个条目对于授权列表的每个条目:如果一个或多个目标响应者元素考虑到由相应条目指定的访问要求 是由相应条目指定的响应者元素组的一部分。 请求分析单元将相关保护数据提供给与应答单元相关联的一个或多个目标保护单元,并且位于请求请求单元请求单元与目标应答单元之间的分层路径中。 目标保护单元被设置为基于相关保护数据对目标响应者元素执行保护动作。