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11. 发明申请

US20130302978A1 METHOD OF FORMING A GRAPHENE CAP FOR COPPER INTERCONNECT STRUCTURES 有权
标题翻译：形成铜箔互连结构的石墨片的方法
公开(公告)号：US20130302978A1
公开(公告)日：2013-11-14
申请号：US13605763
申请日：2012-09-06
申请人： Griselda Bonilla , Christos D. Dimitrakopoulos , Alfred Grill , James B. Hannon , Qinghuang Lin , Deborah A. Neumayer , Satoshi Oida , John A. Ott , Dirk Pfeiffer
发明人： Griselda Bonilla , Christos D. Dimitrakopoulos , Alfred Grill , James B. Hannon , Qinghuang Lin , Deborah A. Neumayer , Satoshi Oida , John A. Ott , Dirk Pfeiffer
IPC分类号： H01L21/768
CPC分类号： H01L21/76877 , H01L21/76835 , H01L21/76846 , H01L21/76849 , H01L21/76852 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Interconnect structures including a graphene cap located on exposed surfaces of a copper structure are provided. In some embodiments, the graphene cap is located only atop the uppermost surface of the copper structure, while in other embodiments the graphene cap is located along vertical sidewalls and atop the uppermost surface of the copper structure. The copper structure is located within a dielectric material.
摘要翻译：提供了包括位于铜结构的暴露表面上的石墨烯盖的互连结构。在一些实施例中，石墨烯盖仅位于铜结构的最上表面的顶部，而在其它实施例中，石墨烯盖位于垂直侧壁和铜结构的最上表面的顶部。铜结构位于电介质材料内。

12. 发明申请

US20130299988A1 GRAPHENE CAP FOR COPPER INTERCONNECT STRUCTURES 有权
标题翻译：铜箔互连结构的石墨盖
公开(公告)号：US20130299988A1
公开(公告)日：2013-11-14
申请号：US13468693
申请日：2012-05-10
申请人： Griselda Bonilla , Christos D. Dimitrakopoulos , Alfred Grill , James B. Hannon , Qinghuang Lin , Deborah A. Neumayer , Satoshi Oida , John A. Ott , Dirk Pfeiffer
发明人： Griselda Bonilla , Christos D. Dimitrakopoulos , Alfred Grill , James B. Hannon , Qinghuang Lin , Deborah A. Neumayer , Satoshi Oida , John A. Ott , Dirk Pfeiffer
IPC分类号： H01L23/485 , H01L21/768
CPC分类号： H01L21/76877 , H01L21/76835 , H01L21/76846 , H01L21/76849 , H01L21/76852 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Interconnect structures including a graphene cap located on exposed surfaces of a copper structure are provided. In some embodiments, the graphene cap is located only atop the uppermost surface of the copper structure, while in other embodiments the graphene cap is located along vertical sidewalls and atop the uppermost surface of the copper structure. The copper structure is located within a dielectric material.
摘要翻译：提供了包括位于铜结构的暴露表面上的石墨烯盖的互连结构。在一些实施例中，石墨烯盖仅位于铜结构的最上表面的顶部，而在其它实施例中，石墨烯盖位于垂直侧壁和铜结构的最上表面的顶部。铜结构位于电介质材料内。

13. 发明授权

US08623761B2 Method of forming a graphene cap for copper interconnect structures 有权
标题翻译：形成用于铜互连结构的石墨烯盖的方法
公开(公告)号：US08623761B2
公开(公告)日：2014-01-07
申请号：US13605763
申请日：2012-09-06
申请人： Griselda Bonilla , Christos D. Dimitrakopoulos , Alfred Grill , James B. Hannon , Qinghuang Lin , Deborah A. Neumayer , Satoshi Oida , John A. Ott , Dirk Pfeiffer
发明人： Griselda Bonilla , Christos D. Dimitrakopoulos , Alfred Grill , James B. Hannon , Qinghuang Lin , Deborah A. Neumayer , Satoshi Oida , John A. Ott , Dirk Pfeiffer
IPC分类号： H01L21/44
CPC分类号： H01L21/76877 , H01L21/76835 , H01L21/76846 , H01L21/76849 , H01L21/76852 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Interconnect structures including a graphene cap located on exposed surfaces of a copper structure are provided. In some embodiments, the graphene cap is located only atop the uppermost surface of the copper structure, while in other embodiments the graphene cap is located along vertical sidewalls and atop the uppermost surface of the copper structure. The copper structure is located within a dielectric material.
摘要翻译：提供了包括位于铜结构的暴露表面上的石墨烯盖的互连结构。在一些实施例中，石墨烯盖仅位于铜结构的最上表面的顶部，而在其它实施例中，石墨烯盖位于垂直侧壁和铜结构的最上表面的顶部。铜结构位于电介质材料内。

14. 发明申请

US20140048764A1 SUB-10 NM GRAPHENE NANORIBBON LATTICES 审中-公开
公开(公告)号：US20140048764A1
公开(公告)日：2014-02-20
申请号：US13607688
申请日：2012-09-08
申请人： Christos D. Dimitrakopoulos , Aaron D. Franklin , Joshua T. Smith
发明人： Christos D. Dimitrakopoulos , Aaron D. Franklin , Joshua T. Smith
IPC分类号： H01L29/06 , B82Y99/00
CPC分类号： H01L29/66439 , B82Y10/00 , B82Y40/00 , H01L29/0676 , H01L29/068 , H01L29/1606 , H01L29/1608 , H01L29/413 , H01L29/775
摘要： A graphene lattice comprising an ordered array of graphene nanoribbons is provided in which each graphene nanoribbon in the ordered array has a width that is less than 10 nm. The graphene lattice including the ordered array of graphene nanoribbons is formed by utilizing a layer of porous anodized alumina as a template which includes dense alumina portions and adjacent amorphous alumina portions. The amorphous alumina portions are removed and the remaining dense alumina portions which have an ordered lattice arrangement are employed as an etch mask. After removing the amorphous alumina portions, each dense alumina portion has a width which is also less than 10 nm.

15. 发明申请

US20130207080A1 BILAYER GATE DIELECTRIC WITH LOW EQUIVALENT OXIDE THICKNESS FOR GRAPHENE DEVICES 失效
标题翻译：用于石墨设备的低等效氧化物厚度的双层栅介质
公开(公告)号：US20130207080A1
公开(公告)日：2013-08-15
申请号：US13369901
申请日：2012-02-09
申请人： Christos D. Dimitrakopoulos , Damon B. Farmer , Alfred Grill , Yu-Ming Lin , Deborah A. Neumayer , Dirk Pfeiffer , Wenjuan Zhu
发明人： Christos D. Dimitrakopoulos , Damon B. Farmer , Alfred Grill , Yu-Ming Lin , Deborah A. Neumayer , Dirk Pfeiffer , Wenjuan Zhu
IPC分类号： H01L29/775 , H01L21/336
CPC分类号： H01L21/0237 , B82Y30/00 , B82Y40/00 , H01L21/02378 , H01L21/02527 , H01L21/02617 , H01L21/02661 , H01L29/1606 , H01L29/4908 , H01L29/513 , H01L29/66045 , H01L29/7781 , H01L29/78684
摘要： A silicon nitride layer is provided on an uppermost surface of a graphene layer and then a hafnium dioxide layer is provided on an uppermost surface of the silicon nitride layer. The silicon nitride layer acts as a wetting agent for the hafnium dioxide layer and thus prevents the formation of discontinuous columns of hafnium dioxide atop the graphene layer. The silicon nitride layer and the hafnium dioxide layer, which collectively form a low EOT bilayer gate dielectric, exhibit continuous morphology atop the graphene layer.
摘要翻译：在石墨烯层的最上表面上设置氮化硅层，然后在氮化硅层的最上表面上设置二氧化铪层。氮化硅层用作二氧化铪层的润湿剂，从而防止在石墨烯层顶上形成不连续的二氧化铪塔。共同形成低EOT双层栅极电介质的氮化硅层和二氧化铪层在石墨烯层的顶部呈现连续的形态。

16. 发明授权

US08133805B2 Methods for forming dense dielectric layer over porous dielectrics 有权
标题翻译：在多孔电介质上形成致密介电层的方法
公开(公告)号：US08133805B2
公开(公告)日：2012-03-13
申请号：US12569077
申请日：2009-09-29
申请人： Christos D. Dimitrakopoulos , Mark S. Chace
发明人： Christos D. Dimitrakopoulos , Mark S. Chace
IPC分类号： H01L21/44
CPC分类号： H01L21/76814 , H01L21/3105 , H01L21/31058 , H01L21/76808 , H01L21/76825 , H01L21/76831 , H01L21/76835
摘要： Methods for forming a dense dielectric layer over the surface of an opening in a porous inter-layer dielectric having an ultra-low dielectric constant are disclosed. The disclosure provides methods for exposing the sidewall surface and the bottom surface of the opening to a plurality of substantially parallel ultra-violet (UV) radiation rays to form a dense dielectric layer having a substantially uniform thickness over both the sidewall surface and the bottom surface.
摘要翻译：公开了在具有超低介电常数的多孔层间电介质中的开口表面上形成致密介电层的方法。本公开提供了将开口的侧壁表面和底表面暴露于多个基本上平行的紫外线（UV）辐射线的方法，以形成在侧壁表面和底表面上具有基本均匀厚度的致密介电层。

17. 发明授权

US07948083B2 Reliable BEOL integration process with direct CMP of porous SiCOH dielectric 有权
标题翻译：可靠的BEOL集成工艺与多孔SiCOH电介质的直接CMP
公开(公告)号：US07948083B2
公开(公告)日：2011-05-24
申请号：US11763135
申请日：2007-06-14
申请人： Christos D. Dimitrakopoulos , Stephen M. Gates , Vincent J. McGahay , Sanjay C. Mehta
发明人： Christos D. Dimitrakopoulos , Stephen M. Gates , Vincent J. McGahay , Sanjay C. Mehta
IPC分类号： H01L29/40
CPC分类号： H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L21/76834 , H01L21/76885 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to methods of improving the fabrication of interconnect structures of the single or dual damascene type, in which there is no problem of hard mask retention or of conductivity between the metal lines after fabrication. The methods of the present invention include at least steps of chemical mechanical polishing and UV exposure or chemical repair treatment which steps improve the reliability of the interconnect structure formed. The present invention also relates to an interconnect structure which include a porous ultra low k dielectric of the SiCOH type in which the surface layer thereof has been modified so as to form a gradient layer that has both a density gradient and a C content gradient.
摘要翻译：本发明涉及改进单镶嵌型或双镶嵌型互连结构的制造方法，其中在制造之后金属线之间没有硬掩模保持或导电性问题。本发明的方法至少包括化学机械抛光和UV曝光或化学修复处理的步骤，这些步骤提高了形成的互连结构的可靠性。本发明还涉及一种互连结构，其包括SiCOH型的多孔超低k电介质，其中其表面层被修饰以形成具有密度梯度和C含量梯度的梯度层。

18. 发明授权

US07749892B2 Embedded nano UV blocking and diffusion barrier for improved reliability of copper/ultra low K interlevel dielectric electronic devices 失效
标题翻译：嵌入式纳米UV阻挡和扩散屏障，提高铜/超低K层间电介质电子器件的可靠性
公开(公告)号：US07749892B2
公开(公告)日：2010-07-06
申请号：US11564358
申请日：2006-11-29
申请人： Griselda Bonilla , Christos D. Dimitrakopoulos , Son V. Nguyen , Alfred Grill , Satyanarayana V. Nitta , Darryl D. Restaino , Terry A. Spooner
发明人： Griselda Bonilla , Christos D. Dimitrakopoulos , Son V. Nguyen , Alfred Grill , Satyanarayana V. Nitta , Darryl D. Restaino , Terry A. Spooner
IPC分类号： H01L21/4763
CPC分类号： H01L21/76834 , H01L21/76825 , H01L21/76832 , H01L21/76844 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An interconnect in provided which comprises a copper conductor having both a top surface and a lower surface, with caps formed on the top surface of the metallic conductor. The cap is formed of dual laminations or multiple laminations of films with the laminated films including an Ultra-Violet (UV) blocking film and a diffusion barrier film. The diffusion barrier film and the UV blocking film may be separated by an intermediate film.
摘要翻译：提供的互连，其包括具有顶表面和下表面的铜导体，其中帽形成在金属导体的顶表面上。盖由双层叠或多层薄膜形成，层压膜包括超紫（UV）阻挡膜和扩散阻挡膜。扩散阻挡膜和UV阻挡膜可以通过中间膜分离。

19. 发明申请

US20100052018A1 CONTINUOUS METAL SEMICONDUCTOR ALLOY VIA FOR INTERCONNECTS 有权
标题翻译：连续金属半导体合金通过互连
公开(公告)号：US20100052018A1
公开(公告)日：2010-03-04
申请号：US12198592
申请日：2008-08-26
申请人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
发明人： Guy Cohen , Christos D. Dimitrakopoulos , Alfred Grill
IPC分类号： H01L21/768 , H01L29/78
CPC分类号： H01L29/7848 , B82Y10/00 , H01L21/28518 , H01L21/76885 , H01L23/481 , H01L29/665 , H01L29/78 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： A contact structure is disclosed in which a continuous metal semiconductor alloy is located within a via contained within a dielectric material. The continuous semiconductor metal alloy is in direct contact with an upper metal line of a first metal level located atop the continuous semiconductor metal alloy and at least a surface of each source and drain diffusion region located beneath the continuous metal semiconductor alloy. The continuous metal semiconductor alloy can be derived from either a semiconductor nanowire or an epitaxial grown semiconductor material. The continuous metal semiconductor alloy includes a lower portion that is contained within an upper surface of each source and drain region, and a vertical pillar portion extending upward from the lower portion. The lower portion of the continuous metal semiconductor alloy and the vertical pillar portion are not separated by a material interface. Instead, the two portions of the continuous metal semiconductor alloy are of unitary construction, i.e., a single piece.
摘要翻译：公开了一种接触结构，其中连续的金属半导体合金位于包含在电介质材料内的通孔内。连续半导体金属合金与位于连续半导体金属合金顶部的第一金属水平的上金属线和至少位于连续金属半导体合金下方的源极和漏极扩散区的表面直接接触。连续金属半导体合金可以衍生自半导体纳米线或外延生长半导体材料。连续金属半导体合金包括包含在每个源极和漏极区域的上表面内的下部以及从下部向上延伸的垂直柱部分。连续金属半导体合金的下部和垂直支柱部分不被材料界面分离。相反，连续金属半导体合金的两个部分是单一结构，即单件。

20. 发明申请

US20080122103A1 EMBEDDED NANO UV BLOCKING BARRIER FOR IMPROVED RELIABILITY OF COPPER/ULTRA LOW K INTERLEVEL DIELECTRIC ELECTRONIC DEVICES 失效
标题翻译：嵌入式纳米UV阻挡屏障，用于改善铜/超低电压电介质电子设备的可靠性
公开(公告)号：US20080122103A1
公开(公告)日：2008-05-29
申请号：US11564358
申请日：2006-11-29
申请人： Griselda Bonilla , Christos D. Dimitrakopoulos , Son V. Nguyen , Alfred Grill , Satyanarayana V. Nitta , Darryl D. Restaino , Terry A. Spooner
发明人： Griselda Bonilla , Christos D. Dimitrakopoulos , Son V. Nguyen , Alfred Grill , Satyanarayana V. Nitta , Darryl D. Restaino , Terry A. Spooner
IPC分类号： H01L23/532 , H01L21/768
CPC分类号： H01L21/76834 , H01L21/76825 , H01L21/76832 , H01L21/76844 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An interconnect in provided which comprises a copper conductor having both a top surface and a lower surface, with caps formed on the top surface of the metallic conductor. The cap is formed of dual laminations or multiple laminations of films with the laminated films including an Ultra-Violet (UV) blocking film and a diffusion barrier film. The diffusion barrier film and the UV blocking film may be separated by an intermediate film.
摘要翻译：提供的互连，其包括具有顶表面和下表面的铜导体，其中帽形成在金属导体的顶表面上。盖由双层叠或多层薄膜形成，层压膜包括超紫（UV）阻挡膜和扩散阻挡膜。扩散阻挡膜和UV阻挡膜可以通过中间膜分离。

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