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11. 发明申请

US20110284949A1 VERTICAL TRANSISTOR AND A METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：垂直晶体管及其制造方法
公开(公告)号：US20110284949A1
公开(公告)日：2011-11-24
申请号：US12786343
申请日：2010-05-24
申请人： Hsin-Fei Meng , Hsiao-Wen Zan , Yu-Chiang Chao
发明人： Hsin-Fei Meng , Hsiao-Wen Zan , Yu-Chiang Chao
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L51/057 , H01L51/0023
摘要： A vertical transistor and a method of fabricating the vertical transistor are provided. The vertical transistor has a substrate, a first electrode formed on the substrate, a first insulation layer formed on the first electrode, with a portion of the first electrode exposed from the first insulation layer and having a thickness greater than 50 nm and no more than 300 nm, a grid electrode formed on the first insulation layer, a semiconductor layer formed on the first electrode, and a second electrode formed on the semiconductor layer.
摘要翻译：提供垂直晶体管和制造垂直晶体管的方法。垂直晶体管具有基板，形成在基板上的第一电极，形成在第一电极上的第一绝缘层，第一电极的一部分从第一绝缘层露出并具有大于50nm且不大于 300nm，形成在第一绝缘层上的栅电极，形成在第一电极上的半导体层和形成在半导体层上的第二电极。

12. 发明授权

US08723503B2 Vertical type sensor 有权
标题翻译：立式传感器
公开(公告)号：US08723503B2
公开(公告)日：2014-05-13
申请号：US13009440
申请日：2011-01-19
申请人： Hsiao-Wen Zan , Hsin-Fei Meng , Ming-Zhi Dai , Yu-Chiang Chao
发明人： Hsiao-Wen Zan , Hsin-Fei Meng , Ming-Zhi Dai , Yu-Chiang Chao
IPC分类号： H01L29/08 , H01L21/00 , G01N33/543 , H01L51/52 , H01L51/05 , G01N27/414
CPC分类号： G01N27/3278 , G01N27/414 , G01N33/54373 , G01N33/5438 , H01L51/057 , H01L51/5203
摘要： The present invention provides a vertical type sensor, including a substrate; a first electrode formed on the substrate; a sensing layer formed on the first electrode layer and reactive to a target substance, wherein the first electrode layer is interposed between the substrate and the sensing layer; and a second electrode layer formed on the sensing layer and having a plurality of openings, wherein the sensing layer is interposed between the first electrode layer and the second electrode layer, and the target substance contacts the sensing layer via the plurality of openings. The vertical type sensor of the present invention provides instant, sensitive and rapid detection.
摘要翻译：本发明提供一种垂直型传感器，包括基板; 形成在所述基板上的第一电极; 感测层，其形成在所述第一电极层上并且与目标物质反应，其中所述第一电极层介于所述基板和所述感测层之间; 以及形成在所述感测层上并且具有多个开口的第二电极层，其中所述感测层插入在所述第一电极层和所述第二电极层之间，并且所述目标物质经由所述多个开口接触所述感测层。本发明的垂直型传感器提供即时，灵敏和快速的检测。

13. 发明申请

US20120325318A1 SOLAR CELL AND FABRICATION METHOD THEREOF 审中-公开
标题翻译：太阳能电池及其制造方法
公开(公告)号：US20120325318A1
公开(公告)日：2012-12-27
申请号：US13167068
申请日：2011-06-23
申请人： Hsin-Fei Meng , Hsiao-Wen Zan , Sheng-Fu Horng , Yu-Chiang Chao , Yuan-Pai Lin
发明人： Hsin-Fei Meng , Hsiao-Wen Zan , Sheng-Fu Horng , Yu-Chiang Chao , Yuan-Pai Lin
IPC分类号： H01L51/46 , H01L31/18
CPC分类号： H01L51/4213 , H01L51/0036 , H01L51/0039 , H01L51/0043 , Y02E10/549
摘要： A solar cell is provided that an extremely thin light absorber is formed between a n-type semiconductor layer and a p-type semiconductor layer such that the light absorber is used to absorb solar energy, while the p-type semiconductor layer may not absorb light. After separation of electrons and holes, the carriers will not recombine during the conduction, in order to avoid energy loss.
摘要翻译：提供了一种太阳能电池，其特征在于，在n型半导体层和p型半导体层之间形成非常薄的光吸收体，使得吸收体用于吸收太阳能，而p型半导体层可能不吸收光。在分离电子和空穴之后，载流子在传导期间不会复合，以避免能量损失。

14. 发明申请

US20120018718A1 Self-aligned top-gate thin film transistors and method for fabricating same 审中-公开
标题翻译：自对准顶栅薄膜晶体管及其制造方法
公开(公告)号：US20120018718A1
公开(公告)日：2012-01-26
申请号：US12927835
申请日：2010-11-26
申请人： Hsiao-Wen Zan , Wei-Tsung Chen , Cheng-Wei Chou , Chuang-Chuang Tsai
发明人： Hsiao-Wen Zan , Wei-Tsung Chen , Cheng-Wei Chou , Chuang-Chuang Tsai
IPC分类号： H01L29/12 , H01L21/04
CPC分类号： H01L29/7869 , H01L29/42384 , H01L29/66969
摘要： A self-aligned top-gate thin film transistor and a fabrication method thereof. The method includes preparing a substrate having sequentially formed thereon an oxide semiconductor layer, a dielectric layer, and a metallic layer, wherein the oxide semiconductor layer includes first and second connecting regions that are not covered by the dielectric layer and the metallic layer thereon respectively, the first and second connecting regions having a property of a conductor after undergone a heating process or an ultraviolet irradiation; and a source electrode and a drain electrode formed on the substrate and connected to the first and second connecting regions, respectively. Therefore, the contact resistance of the first and second connecting regions can be reduced without the process of ion dopants as required by prior art techniques, thereby simplifying the manufacturing process. Also, the source electrode and the drain electrode can be exactly relocated and further increase performance of the device.
摘要翻译：一种自对准顶栅薄膜晶体管及其制造方法。该方法包括制备其上依次形成有氧化物半导体层，电介质层和金属层的衬底，其中氧化物半导体层包括分别不被电介质层和金属层覆盖的第一和第二连接区域，所述第一和第二连接区域在进行加热处理或紫外线照射之后具有导体的性质; 以及源极电极和漏电极，分别形成在所述基板上并连接到所述第一和第二连接区域。因此，不需要现有技术所要求的离子掺杂剂的处理，可以减少第一和第二连接区域的接触电阻，从而简化了制造工艺。此外，源电极和漏电极可以精确地定位并进一步提高器件的性能。

15. 发明申请

US20120188627A1 SMART WINDOW AND SMART WINDOW SYSTEM USING THE SAME 审中-公开
标题翻译： SMART WINDOW和SMART WINDOW系统使用相同
公开(公告)号：US20120188627A1
公开(公告)日：2012-07-26
申请号：US13104100
申请日：2011-05-10
申请人： YING-PING CHEN , Hsiao-Wen Zan , Chuang-Chuang Tsai , Yung-Sheng Chang , Chia-Chun Yeh , Ted-Hong Shinn
发明人： YING-PING CHEN , Hsiao-Wen Zan , Chuang-Chuang Tsai , Yung-Sheng Chang , Chia-Chun Yeh , Ted-Hong Shinn
IPC分类号： G02F1/153 , G02F1/03
CPC分类号： H04Q9/00 , H04Q2209/10 , H04Q2209/40
摘要： A smart window includes a windowpane, at least one sensor and a wireless signal transceiver. The sensor is disposed on the windowpane and configured for detecting an environmental factor and accordingly outputting a sensing signal. The wireless signal transceiver is disposed on the windowpane and electrically connected to the sensor. The wireless signal transceiver is configured for further transmitting the sensing signal from the sensor. A smart window system includes the aforementioned smart window. The smart window and the smart window system adopt wireless communication manner to transmit the sensing signals, and thereby the smart window system has an overall modulation to an environmental factor.
摘要翻译：智能窗口包括窗玻璃，至少一个传感器和无线信号收发器。传感器设置在窗玻璃上，并且被配置为检测环境因素并相应地输出感测信号。无线信号收发器设置在窗玻璃上并电连接到传感器。无线信号收发器被配置为进一步发送来自传感器的感测信号。智能窗系统包括上述智能窗。智能窗口和智能窗口系统采用无线通信方式传输感测信号，从而使智能窗口系统具有对环境因素的整体调制。

16. 发明申请

US20070264747A1 PATTERNING PROCESS AND METHOD OF MANUFACTURING ORGANIC THIN FILM TRANSISTOR USING THE SAME 审中-公开
标题翻译：使用该方法制造有机薄膜晶体管的方法及方法
公开(公告)号：US20070264747A1
公开(公告)日：2007-11-15
申请号：US11308845
申请日：2006-05-15
申请人： Kuo-Hsi Yen , Cheng-Wei Chou , Hsiao-Wen Zan , Chuan-Yi Wu
发明人： Kuo-Hsi Yen , Cheng-Wei Chou , Hsiao-Wen Zan , Chuan-Yi Wu
IPC分类号： H01L51/40
CPC分类号： H01L51/0017 , H01L51/0055 , H01L51/0541
摘要： A patterning process is provided. The patterning process includes the following steps. First, a substrate is provided. Then, a patterned self-assembled monolayer (SAM) is formed on the substrate. Afterwards, an organic material layer is formed over the substrate to cover the self-assembled monolayer. Thereafter, a portion of the organic material layer is removed, wherein the organic material layer in contact with the patterned SAM is retained such that a patterned organic material layer.
摘要翻译：提供了图案化工艺。图案化处理包括以下步骤。首先，提供基板。然后，在衬底上形成图案化的自组装单层（SAM）。之后，在衬底上形成有机材料层以覆盖自组装单层。此后，去除有机材料层的一部分，其中与图案化的SAM接触的有机材料层被保持成图案化的有机材料层。

17. 发明授权

US06410373B1 Method of forming polysilicon thin film transistor structure 有权
标题翻译：多晶硅薄膜晶体管结构的形成方法
公开(公告)号：US06410373B1
公开(公告)日：2002-06-25
申请号：US09845438
申请日：2001-04-30
申请人： Ting-Chang Chang , Hsiao-Wen Zan , Po-Sheng Shih
发明人： Ting-Chang Chang , Hsiao-Wen Zan , Po-Sheng Shih
IPC分类号： H01L2100
CPC分类号： H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L29/78666 , H01L29/78684
摘要： A method of forming a polysilicon thin film transistor. An amorphous silicon channel layer is formed over an insulating substrate. An active region is patterned out in the amorphous silicon channel layer. An oxide layer and a gate electrode are sequentially formed over the amorphous silicon channel layer. A lightly doped source/drain region is formed in the amorphous silicon channel layer and then a spacer is formed over the gate electrode. A source/drain region is formed in the amorphous silicon channel layer. A portion of the oxide layer above the source/drain region is removed. An isolation spacer is formed on the sidewalls of the spacer. A self-aligned silicide layer is formed at the top section of the spacer and the source/drain region. Finally, a metal-induced lateral crystallization process is conducted to transform the amorphous silicon channel layer into a lateral-crystallization-polysilicon channel layer.
摘要翻译：一种形成多晶硅薄膜晶体管的方法。在绝缘基板上形成非晶硅沟道层。在非晶硅沟道层中形成有源区。在非晶硅沟道层上依次形成氧化物层和栅电极。在非晶硅沟道层中形成轻掺杂的源极/漏极区，然后在栅极上形成间隔物。源极/漏极区域形成在非晶硅沟道层中。除去源极/漏极区上方的氧化物层的一部分。在间隔物的侧壁上形成隔离间隔物。在间隔物的顶部和源极/漏极区域上形成自对准的硅化物层。最后，进行金属诱导的横向结晶工艺以将非晶硅沟道层转变成横向结晶 - 多晶硅沟道层。

18. 发明申请

US20090167663A1 Liquid Crystal Display Apparatus and Bandgap Reference Circuit Thereof 审中-公开
标题翻译：液晶显示装置及其带隙参考电路
公开(公告)号：US20090167663A1
公开(公告)日：2009-07-02
申请号：US12102277
申请日：2008-04-14
申请人： Ming-Dou Ker , Hsiao-Wen Zan , Ting-Chou Lu
发明人： Ming-Dou Ker , Hsiao-Wen Zan , Ting-Chou Lu
IPC分类号： G09G3/36 , G05F3/02
CPC分类号： G05F3/30 , G09G3/3696 , G09G2300/0408 , G09G2320/041
摘要： A liquid crystal display apparatus comprises a system-on-glass (SOG) and a bandgap reference (BGR) circuit. The BGR circuit, which is formed on the SOG, comprises a current mirror set and a diode set. The current mirror set is configured to generate a plurality of fixed currents. The diode set, which is formed by a plurality of diode-connected thin film transistors (TFT), is configured to generate a BGR voltage according to the fixed currents.
摘要翻译：液晶显示装置包括玻璃系统（SOG）和带隙基准（BGR）电路。形成在SOG上的BGR电路包括电流镜组和二极管组。电流镜组被配置为产生多个固定电流。由多个二极管连接的薄膜晶体管（TFT）形成的二极管组被配置为根据固定电流产生BGR电压。

19. 发明授权

US06486496B2 Polysilicon thin film transistor structure 有权
标题翻译：多晶硅薄膜晶体管结构
公开(公告)号：US06486496B2
公开(公告)日：2002-11-26
申请号：US09994322
申请日：2001-11-26
申请人： Ting-Chang Chang , Hsiao-Wen Zan , Po-Sheng Shih
发明人： Ting-Chang Chang , Hsiao-Wen Zan , Po-Sheng Shih
IPC分类号： H01L21108
CPC分类号： H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L29/78666 , H01L29/78684
摘要： A method of forming a polysilicon thin film transistor. An amorphous silicon channel layer is formed over an insulating substrate. An active region is patterned out in the amorphous silicon channel layer. An oxide layer and a gate electrode are sequentially formed over the amorphous silicon channel layer. A lightly doped source/drain region is formed in the amorphous silicon channel layer and then a spacer is formed over the gate electrode. A source/drain region is formed in the amorphous silicon channel layer. A portion of the oxide layer above the source/drain region is removed. An isolation spacer is formed on the sidewalls of the spacer. A self-aligned silicide layer is formed at the top section of the spacer and the source/drain region. Finally, a metal-induced lateral crystallization process is conducted to transform the amorphous silicon channel layer into a lateral-crystallization-polysilicon channel layer.
摘要翻译：一种形成多晶硅薄膜晶体管的方法。在绝缘基板上形成非晶硅沟道层。在非晶硅沟道层中形成有源区。在非晶硅沟道层上依次形成氧化物层和栅电极。在非晶硅沟道层中形成轻掺杂的源极/漏极区，然后在栅极上形成间隔物。源极/漏极区域形成在非晶硅沟道层中。除去源极/漏极区上方的氧化物层的一部分。在间隔物的侧壁上形成隔离间隔物。在间隔物的顶部和源极/漏极区域上形成自对准的硅化物层。最后，进行金属诱导的横向结晶工艺以将非晶硅沟道层转变成横向结晶 - 多晶硅沟道层。

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