专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20050240641A1 Method for predicting and avoiding danger in execution environment 有权
标题翻译：在执行环境中预测和避免危险的方法
公开(公告)号：US20050240641A1
公开(公告)日：2005-10-27
申请号：US11170217
申请日：2005-06-29
申请人： Yukihiro Kimura , Masakazu Hayashi , Katsutomo Sekiguchi
发明人： Yukihiro Kimura , Masakazu Hayashi , Katsutomo Sekiguchi
IPC分类号： G06F12/02 , G06F17/30
CPC分类号： G06F12/0253 , Y10S707/99953 , Y10S707/99957
摘要： Measurement/analysis unit in a Java virtual machine has the function of measuring data when an event of garbage collection occurs, and the function of periodically measuring data. The measurement/analysis unit analyzes the measured data and predicts a danger of a memory shortage, and predicts a danger using an algorithm depending on the type of garbage collection used by the Java virtual machine. An application server is notified of a warning of the predicted danger of a memory shortage by an analysis result notification means by an inter-process communication, or the like. The measurement/analysis unit calculates a memory capacity required to avoid the predicted danger of a memory shortage, and the calculated memory capacity is transmitted to the application server by the analysis result notification means by an inter-process communication, or the like in the same way as the warning.
摘要翻译： Java虚拟机中的测量/分析单元具有当发生垃圾回收事件时测量数据的功能，以及定期测量数据的功能。测量/分析单元分析测量数据并预测内存不足的危险，并根据Java虚拟机使用的垃圾收集类型，使用算法预测危险。通过分析结果通知装置通过进程间通信等向应用服务器通知预测的存储器不足的危险的警告。测量/分析单元计算避免预测的存储器不足的危险所需的存储器容量，并且通过分析结果通知装置通过进程间通信等将所计算的存储容量发送到应用服务器，等等方式作为警告。

12. 发明授权

US06660944B1 Circuit board having solder bumps 失效
标题翻译：具有焊锡凸块的电路板
公开(公告)号：US06660944B1
公开(公告)日：2003-12-09
申请号：US08825400
申请日：1997-03-28
申请人： Haruhiko Murata , Yukihiro Kimura , Masashi Inaishi
发明人： Haruhiko Murata , Yukihiro Kimura , Masashi Inaishi
IPC分类号： H01R1204
CPC分类号： H05K3/3457 , H01L21/4853 , H01L2924/3511 , H05K3/3484 , H05K2203/0278 , H05K2203/043
摘要： A circuit board having a plurality of solder bumps is provided. The solder bumps are flattened and leveled at the tops so that the coplanarity of the solder bumps is 0.5 &mgr;m or less per 1 mm. The flattened and leveled tops of the solder bumps are formed by cold pressing, hot pressing or grinding. Method of forming such solder bumps and jigs used for carrying out such methods are also provided.
摘要翻译：提供具有多个焊锡凸块的电路板。焊料凸起在顶部变平且平整，使得焊料凸块的共面性每1mm为0.5μm或更小。焊料凸块的扁平和平整的顶部通过冷压，热压或研磨形成。还提供了形成用于执行这种方法的焊料凸块和夹具的方法。

13. 发明授权

US06333857B1 Printing wiring board, core substrate, and method for fabricating the core substrate 失效
标题翻译：印刷线路板，芯基板以及芯基板的制造方法
公开(公告)号：US06333857B1
公开(公告)日：2001-12-25
申请号：US09556790
申请日：2000-04-25
申请人： Rokuro Kanbe , Yukihiro Kimura , Kouki Ogawa
发明人： Rokuro Kanbe , Yukihiro Kimura , Kouki Ogawa
IPC分类号： H05K111
CPC分类号： H05K1/162 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L23/50 , H01L2224/16 , H01L2924/01025 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/3011 , H05K2201/0209 , H05K2201/09536
摘要： A printed wiring board includes a core substrate including a laminated capacitor. The laminated capacitor includes a plurality of composite dielectric layers and a plurality of metal layers stacked alternately. Three types through-hole conductors are provided which extend between the upper and lower surfaces of the core substrate. The first through-hole conductors are directly connected to first metal layers serving one electrode of the laminated capacitor, the second through-hole conductors are directly connected to second metal layers serving the other electrode of the laminated capacitor, and the third through-hole conductors are not connected to any of the first and second metal layers. The first and second through-hole conductors are used for establishing electrical connections between power supply and ground lines and an IC chip mounted on the printed wiring board. The third through-hole conductor is used as a signal line. Since the laminated capacitor is connected between the first and second through-hole conductors, noise entry is effectively prevented.
摘要翻译：印刷电路板包括具有叠层电容器的芯基板。层叠电容器包括多个复合电介质层和交替堆叠的多个金属层。提供三个类型的通孔导体，其在芯基板的上表面和下表面之间延伸。第一通孔导体直接连接到用于层叠电容器的一个电极的第一金属层，第二通孔导体直接连接到用于叠层电容器的另一个电极的第二金属层，第三通孔导体不连接到第一和第二金属层中的任何一个。第一和第二通孔导体用于建立电源和地线之间的电连接以及安装在印刷电路板上的IC芯片。第三通孔导体用作信号线。由于层叠电容器连接在第一和第二通孔导体之间，因此有效地防止噪声进入。

14. 发明授权

US5293502A Integrated circuit package 失效
标题翻译：集成电路封装
公开(公告)号：US5293502A
公开(公告)日：1994-03-08
申请号：US868567
申请日：1992-04-15
申请人： Yukihiro Kimura , Nobuhiko Miyawaki , Masao Kuroda
发明人： Yukihiro Kimura , Nobuhiko Miyawaki , Masao Kuroda
IPC分类号： H01L23/13 , H01L21/48 , H01L23/12 , H01L23/14 , H01L23/498 , H05K01/00
CPC分类号： H01L23/49827 , H01L21/486 , H01L2224/16 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15311 , H01L2924/3011 , H01L2924/3025
摘要： The present integrated circuit package provides both a high density of conductor poles, and reduced crosstalk noises between the conductor poles. The conductor poles are received within holes in an insulating substrate. The insulating substrate has a laminated, multi-layer ceramic substrate structure comprising insulating plates having metallized layers thereon which constitute a portion of the walls of the holes. In addition, insulating layers for insulating the metallized layers from the conductor poles are formed within a selected number of the holes.
摘要翻译：本集成电路封装既提供高导体极的高密度，又减少导体极之间的串扰噪声。导体极接收在绝缘基板的孔内。绝缘基板具有层叠的多层陶瓷基板结构，其包括在其上形成有金属化层的绝缘板，其构成孔的壁的一部分。此外，在选定数量的孔内形成用于使金属化层与导体极绝缘的绝缘层。

15. 发明授权

US5151954A Device capable of modifying a character according to a selected attribute code 失效
标题翻译：能够根据所选择的属性代码修改字符的装置
公开(公告)号：US5151954A
公开(公告)日：1992-09-29
申请号：US633608
申请日：1990-12-20
申请人： Kazuhito Takai , Yukihiro Kimura
发明人： Kazuhito Takai , Yukihiro Kimura
IPC分类号： G09G5/22 , G09G5/30
CPC分类号： G09G5/30 , G09G5/222
摘要： For use in a character display device, a modifying device comprises first and second memories. The first memory memorizes a character code representative of a character which should be displayed. The second memory memorizes an attribute or characteristic code and a selection code which cooperatively determine modification of the character. The character code, the attribute code and the selection code are read out of the first and the second memories by an address signal which is supplied from a supplying section. Responsive to the character code, a character pattern generating circuit generates a character pattern to supply the character pattern to first through N-th modifying circuits, where N represents a positive integer which is not less than two. Responsive to the attribute code, the first through the N-th modifying circuits modify the character pattern into first through N-th modification signals, respectively, to supply the first through the N-th modification signals to a selecting circuit. Responsive to the selection code, the selecting circuit selects at least one of the first through the N-th modification signals as a modified signal representative of the character with modification.
摘要翻译：为了在字符显示装置中使用，修改装置包括第一和第二存储器。第一个存储器存储代表应该显示的字符的字符代码。第二存储器存储属性或特征码以及协调地确定字符修改的选择码。通过从供应部分提供的地址信号，从第一和第二存储器读出字符代码，属性代码和选择代码。对于字符代码，字符图形生成电路生成字符图案，以将字符图案提供给第一到第N个修改电路，其中N表示不小于2的正整数。响应于属性码，第一至第N修改电路分别将字符模式修改为第一至第N修改信号，以将第一至第N修改信号提供给选择电路。响应于选择码，选择电路选择第一至第N修改信号中的至少一个作为表示具有修改的字符的修改信号。

16. 发明授权

US4912305A Silicon nitride base ceramic heater element and method of producing same 失效
标题翻译：氮化硅基陶瓷加热元件及其制造方法
公开(公告)号：US4912305A
公开(公告)日：1990-03-27
申请号：US357786
申请日：1989-05-30
申请人： Kazuho Tatemasu , Yukihiro Kimura , Yoshiro Noda
发明人： Kazuho Tatemasu , Yukihiro Kimura , Yoshiro Noda
IPC分类号： H05B3/18 , C04B35/584 , F02B3/06 , F23Q7/00 , H05B3/14
CPC分类号： H05B3/141 , F23Q7/001 , F02B3/06
摘要： The invention relates to a ceramic heater element consisting of a sintered body of a silicon nitride base ceramic and a resistance heating wire such as a tungsten wire embedded in the ceramic body. The ceramic contains Al.sub.2 O.sub.3 and AlN besides Si.sub.3 N.sub.4 and is produced by using Y.sub.2 O.sub.3 as sintering aid. The ceramic body is improved in strength and also in stability of the ceramic structure at temperatures up to about 1300.degree. C. by rendering the grain boundary phase of the sintered ceramic a crystalline phase comprising either 2Y.sub.2 O.sub.3.Si.sub.2-x Al.sub.x N.sub.2-x O.sub.1-x (0.ltoreq.x
摘要翻译：本发明涉及一种由氮化硅基陶瓷的烧结体和埋入陶瓷体中的诸如钨丝的电阻加热丝组成的陶瓷加热器元件。该陶瓷除了Si 3 N 4以外含有Al 2 O 3和AlN，并且通过使用Y 2 O 3作为烧结助剂来制造。通过使烧结陶瓷的晶界相包含2Y2O3.Si2-xAlxN2-xO1-x（0）的结晶相，陶瓷体的强度和陶瓷结构的稳定性在高达约1300℃的温度下得到改善。

17. 发明授权

US4786781A Silicon nitride glow plug with alumina corrosion and erosion protective coating 失效
标题翻译：氮化硅电热塞与氧化铝腐蚀和侵蚀保护涂层
公开(公告)号：US4786781A
公开(公告)日：1988-11-22
申请号：US144725
申请日：1988-01-14
申请人： Shunkichi Nozaki , Yukihiro Kimura
发明人： Shunkichi Nozaki , Yukihiro Kimura
IPC分类号： F23Q7/00 , H05B3/48 , H05B3/28 , F02P19/02
CPC分类号： F23Q7/001
摘要： A ceramic glow plug comprises a ceramic heater formed by embedding a metal wire in a sintered Si.sub.3 N.sub.4 -based ceramic. The ceramic heater is brazed to the inner surface of an axial bore of a metal tube and the metal tube is brazed to the inner surface of an axial bore of a metal holder. The tip of the ceramic heater extends from the metal tube and metal holder and is coated with highly heat and corrosion resistant material to minimize erosion and corrosion due to combustion gases. The coating consists essentially of a thin CVD film of alumina (Al.sub.2 O.sub.3) having a thickness of 2 .mu.m deposited on a precoating AlON layer having a thickness of 0.5 .mu.m formed on the exposed surface of the tip. Alternatively, the protective coating may consist of thin CVD film of silicon carbide (SiC) or silicon nitride (Si.sub.3 N.sub.4) formed directly on the exposed surface of the tip.
摘要翻译：陶瓷电热塞包括通过将金属线嵌入烧结的Si 3 N 4基陶瓷中形成的陶瓷加热器。陶瓷加热器钎焊到金属管的轴向孔的内表面上，金属管钎焊到金属保持器的轴向孔的内表面。陶瓷加热器的尖端从金属管和金属保持器延伸，并涂有高度耐热和耐腐蚀的材料，以最小化由于燃烧气体引起的侵蚀和腐蚀。该涂层基本上由沉积在尖端的暴露表面上形成的厚度为0.5μm的预涂AlON层上的厚度为2μm的氧化铝薄膜（Al 2 O 3）组成。或者，保护涂层可以由在尖端的暴露表面上直接形成的碳化硅（SiC）或氮化硅（Si 3 N 4）的薄CVD膜组成。

18. 发明申请

US20100136665A1 System and process for reutilization of used disposable diapers 审中-公开
标题翻译：二手一次性尿布再利用的系统和流程
公开(公告)号：US20100136665A1
公开(公告)日：2010-06-03
申请号：US11922145
申请日：2006-06-13
申请人： Yukihiro Kimura , Takeo Furumi , Kyoichi Murata
发明人： Yukihiro Kimura , Takeo Furumi , Kyoichi Murata
IPC分类号： C02F3/34 , C12M1/00
CPC分类号： B09B3/00 , A61L11/00 , C10L5/46 , F23G5/02 , F23G5/46 , F23G7/003 , Y02E50/10 , Y02E50/30 , Y02W10/30 , Y02W30/20
摘要： The invention provides a system and a process for reutilization of used paper diapers which enable effective utilization of used paper diapers through processing and can contribute to CO2 discharge reduction more flexibly as compared with the disposal thereof without processing. A reutilization system (1) provided with a processing apparatus (20) for processing a raw material which comprises used paper diapers (100) and may contain other material at need to form a processed waste (101) having a prescribed moisture content and a volume reduced to a prescribed level and a reutilization apparatus (70) or (90) for burning the processed waste (101) as fuel and recovering thermal energy to attain the reutilization of the used paper diapers (100).
摘要翻译：本发明提供一种用于再利用废旧纸尿布的系统和方法，其能够通过加工有效利用废纸纸尿布，并且与无处理的处理相比可以更灵活地促进二氧化碳排出减少。一种具有处理原料的处理装置（20）的再利用系统（1），其包括废纸纸尿布（100），并且可以含有需要形成具有规定水分含量和体积的处理废物（101）的其他材料还原为规定的水平，以及用于将经处理的废物（101）燃烧为燃料并回收热能以实现废旧纸尿布（100）的再利用的再利用设备（70）或（90）。

19. 发明授权

US07516292B2 Method for predicting and avoiding danger in execution environment 有权
标题翻译：在执行环境中预测和避免危险的方法
公开(公告)号：US07516292B2
公开(公告)日：2009-04-07
申请号：US11170217
申请日：2005-06-29
申请人： Yukihiro Kimura , Masakazu Hayashi , Katsutomo Sekiguchi
发明人： Yukihiro Kimura , Masakazu Hayashi , Katsutomo Sekiguchi
IPC分类号： G06F12/00
CPC分类号： G06F12/0253 , Y10S707/99953 , Y10S707/99957
摘要： Measurement/analysis unit in a Java virtual machine has the function of measuring data when an event of garbage collection occurs, and the function of periodically measuring data. The measurement/analysis unit analyzes the measured data and predicts a danger of a memory shortage, and predicts a danger using an algorithm depending on the type of garbage collection used by the Java virtual machine. An application server is notified of a warning of the predicted danger of a memory shortage by an analysis result notification means by an inter-process communication, or the like. The measurement/analysis unit calculates a memory capacity required to avoid the predicted danger of a memory shortage, and the calculated memory capacity is transmitted to the application server by the analysis result notification means by an inter-process communication, or the like in the same way as the warning.
摘要翻译： Java虚拟机中的测量/分析单元具有当发生垃圾回收事件时测量数据的功能，以及定期测量数据的功能。测量/分析单元分析测量数据并预测内存不足的危险，并根据Java虚拟机使用的垃圾收集类型，使用算法预测危险。通过分析结果通知装置通过进程间通信等向应用服务器通知预测的存储器不足的危险的警告。测量/分析单元计算避免预测的存储器不足的危险所需的存储器容量，并且通过分析结果通知装置通过进程间通信等将所计算的存储容量发送到应用服务器，等等方式作为警告。

20. 发明授权

US06961230B2 Capacitor, capacitor equipped semiconductor device assembly, capacitor equipped circuit substrate assembly and electronic unit including semiconductor device, capacitor and circuit substrate 失效
标题翻译：电容器，配备电容器的半导体器件组件，电容器电路基板组件和包括半导体器件，电容器和电路基板的电子单元
公开(公告)号：US06961230B2
公开(公告)日：2005-11-01
申请号：US10862562
申请日：2004-06-08
申请人： Jun Otsuka , Manabu Sato , Yukihiro Kimura
发明人： Jun Otsuka , Manabu Sato , Yukihiro Kimura
IPC分类号： H01G2/06 , H01G4/30 , H01L23/498 , H01L23/50 , H01L25/00 , H05K1/14 , H05K1/16 , H05K1/18 , H01G4/228
CPC分类号： H01G2/065 , H01G4/30 , H01L23/49822 , H01L23/49833 , H01L23/50 , H01L2224/05573 , H01L2224/13025 , H01L2224/16 , H01L2224/16235 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15174 , H01L2924/15311 , H01L2924/19103 , H05K1/141 , H05K1/162 , H05K3/4688 , H05K2201/068 , H05K2201/10378 , H01L2224/05611 , H01L2924/00014 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05684
摘要： A capacitor includes a capacitor main body having a front surface on which a semiconductor device is to be mounted and a rear surface at which the capacitor main body is to be mounted on a first main surface of a circuit substrate, a plurality of internal electrodes disposed within the capacitor main body, and a plurality of via conductors penetrating the capacitor main body between the front surface and the rear surface and electrically connected to the internal electrodes, wherein the capacitor main body has a first dielectric layer located on a side of the capacitor main body closer to the front surface and a second dielectric layer located on a side of the first dielectric layer closer to the rear surface, the second dielectric layer having a higher thermal expansion coefficient and a higher dielectric constant than the first dielectric layer.
摘要翻译：电容器包括电容器主体，其具有要安装半导体器件的前表面和将电容器主体安装在电路基板的第一主表面上的后表面，多个内部电极设置电容器主体内的多个通孔导体以及贯穿电容器主体的前表面与背面之间并与内部电极电连接的多个通路导体，其中，电容器主体具有位于电容器侧的第一电介质层主体靠近前表面，第二电介质层位于第一电介质层的靠近背面的一侧，第二电介质层具有比第一电介质层更高的热膨胀系数和更高的介电常数。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式