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    • 11. 发明申请
    • COORDINATE INPUT APPARATUS, CONTROL METHOD, AND STORAGE MEDIUM
    • 协调输入装置,控制方法和存储介质
    • US20110148758A1
    • 2011-06-23
    • US12955590
    • 2010-11-29
    • Takayuki Hashimoto
    • Takayuki Hashimoto
    • G06F3/033
    • G06F3/03542G06F3/0386G06F3/0421
    • A coordinate input apparatus for making an input by bringing a pointing device into contact with an input area of an apparatus main body is provided, wherein the pointing device comprises: a timer configured to generate a transmission cycle by timekeeping; a detection unit configured to detect the presence/absence of an input instruction according to the presence/absence of contact of the pointing device with the input area; wherein when the detection unit detects the presence of the input instruction, and then detects the absence of the input instruction, the timer continues timekeeping of the transmission cycle during a predetermined holding period.
    • 提供了一种通过使指示装置与装置主体的输入区域接触而进行输入的坐标输入装置,其中,所述指示装置包括:定时器,被配置为通过计时生成发送周期; 检测单元,被配置为根据指示设备与输入区域的接触的存在/不存在来检测输入指令的存在/不存在; 其中,当所述检测单元检测到所述输入指令的存在,然后检测到所述输入指令不存在时,所述定时器在预定保持期间内继续所述传输周期的计时。
    • 17. 发明申请
    • SEMICONDUCTOR DEVICE AND POWER SUPPLY USING THE SAME
    • 半导体器件和使用该器件的电源
    • US20080315851A1
    • 2008-12-25
    • US12143305
    • 2008-06-20
    • Noboru AkiyamaTakayuki HashimotoTakashi HiraoKoji Tateno
    • Noboru AkiyamaTakayuki HashimotoTakashi HiraoKoji Tateno
    • G05F1/10
    • H02M3/1588Y02B70/1466
    • A power-supply control IC is included in a switching power supply which drives to turn on and off a semiconductor switching device connected to a DC power supply in series to supply a predetermined constant voltage to an external load, and is a semiconductor device including a semiconductor circuit which controls on and off of the semiconductor switching device. When a current flowing through the load is abruptly increased to cause an error voltage to exceed a predetermined first threshold voltage after the end of a PWM on-pulse generated in synchronization with a switching cycle, a second PWM on-pulse is generated within the same switching cycle. Furthermore, in a plurality of switching cycles after the switching cycle in which the second PWM on-pulse is generated, the first threshold voltage for comparison with the error voltage is switched to a second threshold voltage higher than the first threshold voltage.
    • 电源控制IC包括在开关电源中,该开关电源驱动以串联连接到直流电源的半导体开关装置,以向外部负载提供预定的恒定电压,并且是包括 控制半导体开关器件的导通和截止的半导体电路。 当流过负载的电流突然增加以在与开关周期同步产生的PWM导通脉冲结束之后导致误差电压超过预定的第一阈值电压时,在同一时间内产生第二PWM导通脉冲 开关周期。 此外,在产生第二PWM导通脉冲的开关周期之后的多个开关周期中,与误差电压进行比较的第一阈值电压被切换到高于第一阈值电压的第二阈值电压。
    • 20. 发明授权
    • Semiconductor device and power converter
    • 半导体器件和电源转换器
    • US09349847B2
    • 2016-05-24
    • US14364959
    • 2011-12-15
    • Takayuki HashimotoMutsuhiro Mori
    • Takayuki HashimotoMutsuhiro Mori
    • H01L29/66H01L21/332H01L29/739H01L29/861H01L29/08H01L29/10H01L27/07H01L29/88H02M7/537
    • H01L29/7397H01L27/0727H01L29/0834H01L29/1095H01L29/7395H01L29/861H01L29/88H02M7/537
    • A semiconductor device of this invention (an IGBT with a built-in diode) includes: an n−-type drift layer 1; a p-type channel region 2 that is arranged in contact with the surface side of this n−-type drift layer 1; a gate electrode 5 that is provided in a trench T provided so as to penetrate this p-type channel region 2 and reach to the n−-type drift layer 1 through a gate insulating film 3; an n-type source region 4 that is provided so as to contact the trench T on the surface side of the p-type channel region 2; a high-concentration n-type region 6 that is arranged in contact with the back side of the n−-type drift layer 1; and a high-concentration p-type region 7 that is arranged in contact with the back side of this high-concentration n-type region 6; in which a junction of the high-concentration n-type region 6 and the high-concentration p-type region 7 is a tunnel junction. According to this semiconductor device, it is possible to form the IGBT and the diode on a single chip. Moreover, it is possible to avoid problems of “snap back” and “current concentration.”
    • 本发明的半导体器件(具有内置二极管的IGBT)包括:n型漂移层1; 与该n型漂移层1的表面侧接触的p型沟道区域2; 设置在沟槽T中以设置成穿过该p型沟道区域2并通过栅极绝缘膜3到达n型漂移层1的栅电极5; n型源极区域4,其设置成与p型沟道区域2的表面侧的沟槽T接触; 配置成与n型漂移层1的背面接触的高浓度n型区域6; 以及与该高浓度n型区域6的背面接触的高浓度p型区域7; 其中高浓度n型区域6和高浓度p型区域7的结是隧道结。 根据该半导体器件,可以在单个芯片上形成IGBT和二极管。 此外,可以避免“回弹”和“当前集中”的问题。