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11. 发明申请

US20180076214A1 SEMICONDUCTOR DEVICE INCLUDING STACKED STRUCTURE 审中-公开
公开(公告)号：US20180076214A1
公开(公告)日：2018-03-15
申请号：US15440647
申请日：2017-02-23
申请人： Yeong Dae Lim , Seung Jae Jung
发明人： Yeong Dae Lim , Seung Jae Jung
IPC分类号： H01L27/11582 , H01L23/528 , H01L29/423 , H01L29/10 , H01L27/11565
CPC分类号： H01L27/11582 , H01L23/528 , H01L27/11565 , H01L29/1037 , H01L29/4234
摘要： A semiconductor device includes a substrate, a stacked structure on the substrate, and a vertical structure in a hole passing through the stacked structure. The stacked structure includes units stacked on top of each other in a direction perpendicular to a top surface of the substrate. The units include first units and second units between the first units. Each of the first units includes a first interlayer insulating layer on a first gate, and each of the second units includes a second interlayer insulating layer on a second gate. A ratio of a thickness of the second interlayer insulating layer with respect to a thickness of the second gate is different from a ratio of a thickness of the first interlayer insulating layer with respect to a thickness of the first gate.

12. 发明申请

US20180033639A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES 审中-公开
公开(公告)号：US20180033639A1
公开(公告)日：2018-02-01
申请号：US15444597
申请日：2017-02-28
申请人： Seung Jae JUNG , Sang Joon YOON , Yong Hyun KWON , Dae Hyun JANG , Ha Na KIM
发明人： Seung Jae JUNG , Sang Joon YOON , Yong Hyun KWON , Dae Hyun JANG , Ha Na KIM
IPC分类号： H01L21/311 , H01L21/308 , H01L21/3065 , H01L27/115 , H01L29/10
CPC分类号： H01L21/31144 , H01L21/3065 , H01L21/30655 , H01L21/3081 , H01L21/3083 , H01L21/31116 , H01L27/115 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L29/1037
摘要： A method of manufacturing a semiconductor device includes alternately stacking mold insulating layers and sacrificial layers on a substrate; forming channel holes penetrating through the mold insulating layers and the sacrificial layers and allowing recessed regions to be formed in the substrate; cleaning a surface of the recessed regions in such a manner that processes of forming a first protective layer in an upper region of the channel holes and performing an anisotropic dry etching process on the recessed regions in a lower portion of the channel holes are alternately repeated one or more times, in-situ; and forming epitaxial layers on the recessed regions of the substrate.

13. 发明授权

US09450025B2 Resistive memory device and method of operating resistive memory device 有权
标题翻译：电阻式存储器件和操作电阻式存储器件的方法
公开(公告)号：US09450025B2
公开(公告)日：2016-09-20
申请号：US14736525
申请日：2015-06-11
申请人： Seung-Jae Jung , Youn-Seon Kang , Jung-Dal Choi
发明人： Seung-Jae Jung , Youn-Seon Kang , Jung-Dal Choi
IPC分类号： H01L27/24 , H01L45/00 , H01L27/22
CPC分类号： H01L27/2463 , H01L27/224 , H01L27/2409 , H01L27/2418 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/1675
摘要： A resistive memory device includes a plurality of memory cell pillars arranged in a line in one direction and each having a memory layer and a top electrode layer connected to the memory layer, a top conductive line having a plurality of protrusions extending downwardly and between which pockets in the bottom of the top conductive line are defined, and a plurality of insulating pillars. The protrusions of the top conductive line face and are electrically connected to the memory cell pillars, respectively, so as to be electrically connected to the memory layer through the top electrode layer of the memory cell pillar. The insulating pillars extend from insulating spaces, between side wall surfaces of the memory layers and top electrode layers of the memory cell pillars, into the pockets in the bottom of the top conductive line.
摘要翻译：电阻式存储器件包括沿一个方向排列成一行的多个存储器单元柱，每个存储单元柱具有连接到存储层的存储层和顶部电极层，顶部导电线具有向下延伸的多个突起，在顶部导线的底部被限定，以及多个绝缘柱。上导电线面的突起分别电连接到存储单元柱，以便通过存储单元柱的顶电极电连接到存储层。绝缘柱从记忆层的侧壁表面和存储单元柱的顶部电极层之间的绝缘空间延伸到顶部导电线的底部中的凹穴中。

14. 发明申请

US20150302135A1 METHOD FOR DESIGNING AND MANUFACTURING AN INTEGRATED CIRCUIT, SYSTEM FOR CARRYING OUT THE METHOD, AND SYSTEM FOR VERIFYING AN INTEGRATED CIRCUIT 有权
标题翻译：用于设计和制造集成电路的方法，用于实现该方法的系统和用于验证集成电路的系统
公开(公告)号：US20150302135A1
公开(公告)日：2015-10-22
申请号：US14690227
申请日：2015-04-17
申请人： Chul-Hong PARK , Sang-Hoon BAEK , Su-Hyeon KIM , Kyoung-Yun BAEK , Sung-Wook AHN , Sang-Kyu OH , Seung-Jae JUNG
发明人： Chul-Hong PARK , Sang-Hoon BAEK , Su-Hyeon KIM , Kyoung-Yun BAEK , Sung-Wook AHN , Sang-Kyu OH , Seung-Jae JUNG
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5072
摘要： A method of manufacturing an integrated circuit, a system for carrying out the method, and a system for verifying an integrated circuit may use a standard cell layout including a first layout region that may violate design rules. The method for designing an integrated circuit may comprise receiving a data file that includes a scaling enhanced circuit layout, and designing a first standard cell layout using design rules and the data file. The designing the first standard cell layout may include designing a first layout region of the first standard cell layout using the data file, and designing a second region of the first standard cell layout using the design rules.
摘要翻译：集成电路的制造方法，用于实施该方法的系统以及用于验证集成电路的系统可以使用包括可能违反设计规则的第一布局区域的标准单元布局。用于设计集成电路的方法可以包括接收包括缩放增强电路布局的数据文件，以及使用设计规则和数据文件来设计第一标准单元布局。设计第一标准单元布局可以包括使用数据文件设计第一标准单元布局的第一布局区域，以及使用设计规则设计第一标准单元布局的第二区域。

15. 发明授权

US08742247B2 Solar cell module and method of manufacturing the same 有权
标题翻译：太阳能电池组件及其制造方法
公开(公告)号：US08742247B2
公开(公告)日：2014-06-03
申请号：US12629847
申请日：2009-12-02
申请人： Ku-Hyun Kang , Dong-Jin Kim , Yeon-Il Kang , Czang-Ho Lee , Myung-Hun Shin , Dae-Ha Woo , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung , Joong-Hyun Park
发明人： Ku-Hyun Kang , Dong-Jin Kim , Yeon-Il Kang , Czang-Ho Lee , Myung-Hun Shin , Dae-Ha Woo , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung , Joong-Hyun Park
IPC分类号： H01L31/042 , H01L31/00
CPC分类号： H01L31/1804 , H01L31/046 , H01L31/0463 , Y02E10/547 , Y02P70/521
摘要： A solar cell module includes a substrate, a lower electrode layer, a semiconductor layer and an upper electrode layer for an embodiment. The lower electrode layer may include a plurality of area-separating grooves separating the substrate into an active area and a peripheral area surrounding the active area, and a plurality of first cell-separating grooves formed in the active area. The semiconductor layer is formed on the lower electrode layer. The semiconductor layer includes a plurality of second cell-separating grooves that are spaced apart from the first cell-separating grooves. The upper electrode layer is formed on the semiconductor layer. The upper electrode layer includes a plurality of third cell-separating grooves that are spaced apart from the second separating grooves.
摘要翻译：太阳能电池模块包括用于实施例的衬底，下电极层，半导体层和上电极层。下电极层可以包括将基板分隔成有源区域和围绕有源区域的周边区域的多个区域分离槽以及形成在有源区域中的多个第一单元分隔槽。半导体层形成在下电极层上。半导体层包括与第一细胞分离槽间隔开的多个第二细胞分离槽。上电极层形成在半导体层上。上电极层包括与第二分离槽间隔开的多个第三电池分离槽。

16. 发明授权

US08329500B2 Method of manufacturing photovoltaic device 失效
标题翻译：制造光伏器件的方法
公开(公告)号：US08329500B2
公开(公告)日：2012-12-11
申请号：US12642527
申请日：2009-12-18
申请人： Byoung-Kyu Lee , Se-Jin Chung , Byoung-June Kim , Czang-Ho Lee , Myung-Hun Shin , Min-Seok Oh , Ku-Hyun Kang , Yuk-Hyun Nam , Seung-Jae Jung , Min Park , Mi-Hwa Lim , Joon-Young Seo
发明人： Byoung-Kyu Lee , Se-Jin Chung , Byoung-June Kim , Czang-Ho Lee , Myung-Hun Shin , Min-Seok Oh , Ku-Hyun Kang , Yuk-Hyun Nam , Seung-Jae Jung , Min Park , Mi-Hwa Lim , Joon-Young Seo
IPC分类号： H01L21/00
CPC分类号： H01L21/324 , H01L21/02667 , H01L31/03921 , H01L31/046 , H01L31/075 , H01L31/1872 , Y02E10/548 , Y02P70/521
摘要： Provided is a method of manufacturing a photovoltaic device using a Joule heating-induced crystallization method. The method includes: forming a first conductive pattern on a substrate; forming a photoelectric conversion layer on the substrate having the first conductive pattern; and crystallizing at least part of the photoelectric conversion layer by applying an electric field to the photoelectric conversion layer, wherein the photoelectric conversion layer includes a first amorphous semiconductor layer containing first impurities, a second intrinsic, amorphous semiconductor layer, and a third amorphous semiconductor layer containing second impurities.
摘要翻译：提供了使用焦耳加热诱导结晶法制造光伏器件的方法。该方法包括：在衬底上形成第一导电图案; 在具有第一导电图案的基板上形成光电转换层; 以及通过向所述光电转换层施加电场而使所述光电转换层的至少一部分结晶，其中所述光电转换层包括含有第一杂质的第一非晶半导体层，第二本征非晶半导体层和第三非晶半导体层含有第二杂质。

17. 发明申请

US20110023954A1 SOLAR CELL AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：太阳能电池及其制造方法
公开(公告)号：US20110023954A1
公开(公告)日：2011-02-03
申请号：US12648521
申请日：2009-12-29
申请人： Seung-Jae Jung
发明人： Seung-Jae Jung
IPC分类号： H01L31/105 , H01L31/18 , H01L31/0224
CPC分类号： H01L31/076 , H01L31/0463 , Y02E10/548
摘要： A solar cell includes a first electrode disposed on a substrate, a first light absorption layer disposed on the first electrode, an interlayer disposed on the first light absorption layer, a second light absorption layer disposed on the interlayer, and a second electrode disposed on the second light absorption layer. The solar cell further includes a groove penetrating through the first light absorption layer, the interlayer, and the second light absorption layer. The groove is filled with the second electrode. The interlayer is spaced apart from the second electrode filling the groove, to define a spacer layer which electrically insulates the interlayer from the second electrode filling the groove.
摘要翻译：太阳能电池包括设置在基板上的第一电极，设置在第一电极上的第一光吸收层，设置在第一光吸收层上的中间层，设置在中间层上的第二光吸收层，以及设置在第一电极上的第二电极第二光吸收层。太阳能电池还包括贯穿第一光吸收层，中间层和第二光吸收层的沟槽。槽被第二电极填充。中间层与填充凹槽的第二电极间隔开，以限定间隔层，其将中间层与填充凹槽的第二电极电绝缘。

18. 发明申请

US20100037940A1 STACKED SOLAR CELL 审中-公开
标题翻译：堆叠太阳能电池
公开(公告)号：US20100037940A1
公开(公告)日：2010-02-18
申请号：US12468444
申请日：2009-05-19
申请人： Mi-Hwa Lim , Czang-Ho Lee , Joon-Young Seo , Myung-Hun Shin , Min-Seok Oh , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung
发明人： Mi-Hwa Lim , Czang-Ho Lee , Joon-Young Seo , Myung-Hun Shin , Min-Seok Oh , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung
IPC分类号： H01L31/00
CPC分类号： H01L31/075 , H01L31/03685 , H01L31/03762 , H01L31/03765 , H01L31/076 , H01L31/1804 , H01L31/1824 , H01L31/202 , H01L31/204 , Y02E10/545 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： A solar cell including a first semiconductor layer formed by sequentially stacking a positive (P) layer, an intrinsic (I) layer and a negative (N) layer, wherein the P layer comprises amorphous silicon carbide and at least one of the I and N layers comprises micro-crystalline silicon.
摘要翻译：一种太阳能电池，其包括通过顺序堆叠正（P）层，本征（I）层和负（N）层而形成的第一半导体层，其中所述P层包括非晶碳化硅和所述I和N中的至少一个层包括微晶硅。

19. 发明申请

US20100013037A1 SOLAR CELL AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：太阳能电池及其制造方法
公开(公告)号：US20100013037A1
公开(公告)日：2010-01-21
申请号：US12397129
申请日：2009-03-03
申请人： Min Park , Min-Seok Oh , Myung-Hun Shin , Czang-Ho Lee , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung , Mi-Hwa Lim , Joon-Young Seo
发明人： Min Park , Min-Seok Oh , Myung-Hun Shin , Czang-Ho Lee , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung , Mi-Hwa Lim , Joon-Young Seo
IPC分类号： H01L31/0224 , H01L31/18
CPC分类号： H01L31/022425 , H01L31/046 , H01L31/0465 , H01L31/056 , H01L31/076 , Y02E10/52 , Y02E10/548
摘要： A method for manufacturing a solar cell is provided. The manufacturing method includes: depositing a transparent conductive layer on a substrate; patterning the transparent conductive layer; forming a semiconductor layer including deposited on the patterned transparent conductive layer; patterning the semiconductor layer; coating a metal powder on the patterned semiconductor layer; forming a rear electrode layer on the semiconductor layer coated with the metal powder; and patterning the rear electrode layer and the semiconductor layer. This method is useful for producing a solar cell with improved light absorption efficiency.
摘要翻译：提供一种太阳能电池的制造方法。制造方法包括：在基板上沉积透明导电层; 图案化透明导电层; 形成包括沉积在图案化的透明导电层上的半导体层; 图案化半导体层; 在图案化的半导体层上涂覆金属粉末; 在涂有金属粉末的半导体层上形成后电极层; 以及对后电极层和半导体层进行构图。该方法对于制造具有改善的光吸收效率的太阳能电池是有用的。

20. 发明申请

US20090236627A1 METHOD OF FORMING METAL WIRING 审中-公开
标题翻译：形成金属接线的方法
公开(公告)号：US20090236627A1
公开(公告)日：2009-09-24
申请号：US12357207
申请日：2009-01-21
申请人： Jang-Sub Kim , Yoon-Ho Kang , Yang-Ho Bae , Pil-Sang Yun , Chang-oh Jeong , Soon-Kwon Lim , Hong-Sick Park , Ning Hong Long , Do-Hyun Kim , Seung-Jae Jung
发明人： Jang-Sub Kim , Yoon-Ho Kang , Yang-Ho Bae , Pil-Sang Yun , Chang-oh Jeong , Soon-Kwon Lim , Hong-Sick Park , Ning Hong Long , Do-Hyun Kim , Seung-Jae Jung
IPC分类号： H01L33/00 , G03F7/26 , H01L21/02 , C25D7/06 , H01L23/52
CPC分类号： C25D5/022 , C25D1/04 , G02F2001/136295 , H01L21/288 , H01L21/76843 , H01L21/76871 , H01L21/76879 , H01L27/1218 , H01L27/124 , H01L27/1292 , H05K3/002 , H05K3/107 , H05K3/1258 , H05K3/246 , H05K2201/0108 , H05K2201/0347 , H05K2203/0568 , H05K2203/095 , H05K2203/1173
摘要： Provided is a method of forming metal wiring. The method includes forming a photosensitive film pattern on a substrate, hydrophobicizing at least part of the photosensitive film pattern, coating metal ink on the substrate having the photosensitive film pattern, forming a seed layer, and forming a metal layer. Alternatively, a trench is formed by using the photosensitive film pattern as a mask, and metal aerosol is sprayed to form the seed layer and then the metal layer. In this method, there is no need to form a metal thin film on the photosensitive film pattern when the seed layer is formed. As a result, less metal is wasted, which, in turn, significantly reduces manufacturing costs.
摘要翻译：提供一种形成金属布线的方法。该方法包括在基板上形成感光膜图案，使至少部分感光膜图案疏水化，在具有感光膜图案的基板上涂覆金属油墨，形成种子层并形成金属层。或者，通过使用感光膜图案作为掩模形成沟槽，并且喷射金属气溶胶以形成种子层，然后形成金属层。在该方法中，当形成种子层时，不需要在感光膜图案上形成金属薄膜。因此，浪费了较少的金属，这又大大降低了制造成本。

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