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    • 12. 发明授权
    • Clock control during self-test of multi port memory
    • 多端口存储器自检期间的时钟控制
    • US08103918B2
    • 2012-01-24
    • US12076948
    • 2008-03-25
    • Robert Campbell Aitken
    • Robert Campbell Aitken
    • G11C29/00
    • G11C8/16G11C8/18G11C29/028G11C29/12015G11C29/14
    • A multiport memory is provided with multiple data access paths A, B, each having a respective independent clock signal CLKA, CLKB. During self test operation a duplicate clock enable signal DPCLKTESTEN is used to enable one of these clock signals CLKA, CLKB to be used as a shared clock signal by all data access paths A, B. An external memory adjust signal EMAA. EMAB is used to adjust one of these shared clock signals to form a modified shared clock signal for at least one of the data paths being tested. In this way, worst-case scenarios can be more readily investigated comprising clocks with the same frequency but small differences in phase.
    • 多端口存储器具有多个数据访问路径A,B,每个具有相应的独立时钟信号CLKA,CLKB。 在自检操作期间,使用复制时钟使能信号DPCLKTESTEN使得这些时钟信号CLKA,CLKB中的一个可以被所有数据访问路径A,B用作共享时钟信号。外部存储器调整信号EMAA。 EMAB用于调整这些共享时钟信号中的一个,以便为被测试的至少一个数据路径形成修改的共享时钟信号。 以这种方式,可以更容易地研究包括具有相同频率但相位差小的时钟的最坏情况。
    • 14. 发明申请
    • SYSTEM AND METHOD FOR CUSTOMIZING A COMPUTER SYSTEM
    • 用于自定义计算机系统的系统和方法
    • US20110156880A1
    • 2011-06-30
    • US13062693
    • 2008-09-12
    • Paul T RygaardRobert Campbell
    • Paul T RygaardRobert Campbell
    • H04Q5/22
    • G06F8/61G06F9/4401G06F9/454
    • A system and method for customizing a computer system is disclosed herein. The computer system includes a controller and a storage device connected thereto. A software package having a plurality of modules is installed on the storage device. A reader is installed in the computer system. An identifier is placed on the computer system at least in dose proximity to the reader such that it is readable by the reader. The identifier corresponds to at least one of the plurality of modules such that, when the identifier is read by the reader at an initial boot up of the computer system, one or more modules automatically activates on the computer system and the computer system displays customized images.
    • 本文公开了一种用于定制计算机系统的系统和方法。 计算机系统包括与其连接的控制器和存储装置。 具有多个模块的软件包安装在存储装置上。 阅读器安装在计算机系统中。 标识符至少以接近读取器的方式被放置在计算机系统上,使得读取器可读取。 标识符对应于多个模块中的至少一个,使得当在计算机系统的初始启动时读取器读取标识符时,一个或多个模块在计算机系统上自动激活,并且计算机系统显示定制的图像 。
    • 15. 发明申请
    • Boosting voltage levels applied to an access control line when accessing storage cells in a memory
    • 当访问存储器中的存储单元时,提升施加到访问控制线的电压电平
    • US20110063932A1
    • 2011-03-17
    • US12591751
    • 2009-11-30
    • Vikas CHANDRACezary PIETRZYKRobert Campbell AITKEN
    • Vikas CHANDRACezary PIETRZYKRobert Campbell AITKEN
    • G11C7/00G11C8/18
    • G11C11/413G11C8/08
    • A semiconductor memory storage device is disclosed, the memory comprises: a plurality of storage cells for storing data; at least two access control lines each for controlling access to a respective at least one of the plurality of storage cells; at least two access control circuits each for controlling a voltage level supplied to a corresponding one of the at least two access control lines in response to an access request, the at least two access control circuits each comprising a capacitor and switching circuitry; routing circuitry for routing the access request and a boost signal to a selected one of the at least two access control circuits in dependence upon an address associated with the access request; wherein the at least two access control circuits are each responsive to: receipt of the access request from the routing circuitry to connect the selected access control line to a supply voltage; and receipt of the boost signal from the routing circuitry to disconnect the supply voltage from the access control line and to couple the boost signal to the access control line through the capacitor of the access control circuit to provide a boost to a voltage level on the access control line.
    • 公开了一种半导体存储器存储装置,该存储器包括:用于存储数据的多个存储单元; 至少两个访问控制线,每个用于控制对所述多个存储单元中的相应的至少一个存储单元的访问; 至少两个访问控制电路,每个用于响应于访问请求而控制提供给所述至少两个访问控制线中的相应一个的电压电平,所述至少两个访问控制电路各自包括电容器和开关电路; 路由电路,用于根据与所述访问请求相关联的地址将所述访问请求和升压信号路由到所述至少两个访问控制电路中的所选择的一个; 其中所述至少两个访问控制电路各自响应于:从路由电路接收访问请求以将所选择的访问控制线连接到电源电压; 以及从所述路由电路接收所述升压信号以将所述电源电压从所述访问控制线路断开,并且通过所述访问控制电路的电容器将所述升压信号耦合到所述访问控制线路,以提高所述访问的电压电平 控制线。
    • 17. 发明授权
    • Integrated circuit power-on control and programmable comparator
    • 集成电路开机控制和可编程比较器
    • US07605644B2
    • 2009-10-20
    • US11797498
    • 2007-05-03
    • Sachin Satish IdgunjiDavid Walter FlynnDavid William HowardRobert Campbell Aitken
    • Sachin Satish IdgunjiDavid Walter FlynnDavid William HowardRobert Campbell Aitken
    • G05F1/10
    • H03K19/0016
    • An integrated circuit is provided with a main supply rail and a virtual supply rail connected by strong and weak header transistors. A power-on controller controls the switching on of the strong transistors after the virtual supply rail voltage has already been driven up to close to its operating level by the weak transistor. The power-on controller comprises a comparator monitoring a single reference voltage level with its output being latched within a latch and used to switch on the strong transistor. The comparator may be programmable to detect multiple different trigger voltage levels by using opposing charging and discharging transistors with one set of these operating in a saturated regime and the other in a regime in which the current therethrough varies in dependence upon the voltage being sensed. These opposing transistors can be used to charge or discharge a node with the state of that node being taken to generate the sensed output.
    • 集成电路设置有主供电轨和通过强和弱标头晶体管连接的虚拟电源轨。 在虚拟电源电压已经被弱晶体管驱动到接近其工作电平之后,上电控制器控制强晶体管的导通。 上电控制器包括监视单个参考电压电平的比较器,其输出被锁存在锁存器内并用于接通强晶体管。 比较器可以被编程为通过使用相反的充电和放电晶体管来检测多个不同的触发电压电平,其中一组在饱和状态下工作,另一组在其中电流根据感测电压而变化。 这些相对的晶体管可以用于对具有该节点的状态的节点进行充电或放电以产生感测的输出。
    • 20. 发明申请
    • Copying data between computer systems
    • 在计算机系统之间复制数据
    • US20080178103A1
    • 2008-07-24
    • US11656770
    • 2007-01-23
    • Robert Campbell
    • Robert Campbell
    • G06F3/048G06F15/16
    • G06F3/0227G06F3/023G06F9/543H04L67/1097
    • In one embodiment, a method to copy data from a first computer system to a second computer system comprises receiving, in a first computer system, a first signal initiated by an input/output device, wherein the first signal indicates a cut operation or a copy operation on at least one selected object displayed on the first computer system. In response to the first signal, the at least one selected object is copied to a memory buffer in a remote device coupled to the first computing system. A second signal initiated by the input/output device is received in a second computer system, wherein the second signal indicates a paste operation for at least one selected object. In response to the second signal, the at least one selected object is retrieved from the memory buffer in the remote device and inserted into a memory location on the second computer system.
    • 在一个实施例中,将数据从第一计算机系统复制到第二计算机系统的方法包括在第一计算机系统中接收由输入/输出设备发起的第一信号,其中第一信号指示剪切操作或副本 对在第一计算机系统上显示的至少一个所选择的对象进行操作。 响应于第一信号,将至少一个所选择的对象复制到耦合到第一计算系统的远程设备中的存储器缓冲器。 由第二计算机系统接收由输入/输出设备发起的第二信号,其中第二信号指示至少一个所选对象的粘贴操作。 响应于第二信号,从远程设备中的存储器缓冲器中检索至少一个所选择的对象,并将其插入第二计算机系统上的存储器位置。