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    • 11. 发明授权
    • Surge protection device
    • 浪涌保护装置
    • US07768761B2
    • 2010-08-03
    • US11667193
    • 2005-11-11
    • Richard A. Harris
    • Richard A. Harris
    • H02H9/00
    • H02H9/025H02H9/041
    • An electrical surge protection device (12) confers protection to an output node (13) from electrical surges on a data or power line (10) incident on an input node (11). A transistorized surge protection device (18) is located in a current path between the input node (11) and the output node (13) and is configured to assume an isolating state in response to an over-current therethrough. A voltage-triggered protective circuit comprising a diac (16) in series with a bi-directional zener diode (14) is connected between the output side of the transistorized surge protection device (18) and a surge sinking node (15). The voltage-triggered circuit assumes a low-impedance state in response to an electrical surge at output terminal 13. Consequently a surge current is passed through zener diode (14) and surge diac (16) to the surge sinking node. In response to the surge current the transistorized surge protection device (18) assumes a high impedance configuration thereby isolating output node (13) from input node (11). Since neither the zener diode and diac combination, nor the transistorized surge protection device (18) are subject to sustained surge associated currents, embodiments of the invention can be compactly packaged.
    • 电气浪涌保护装置(12)赋予输出节点(13)免受入射在输入节点(11)上的数据或电力线(10)上的电涌的保护。 晶体管浪涌保护装置(18)位于输入节点(11)和输出节点(13)之间的电流路径中,并且被配置为响应于其中的过电流呈现隔离状态。 包括与双向齐纳二极管(14)串联的二极管(16)的电压触发保护电路连接在晶体管浪涌保护器件(18)的输出侧和浪涌吸收节点(15)之间。 电压触发电路响应于输出端子13处的电涌而呈现低阻抗状态。因此,浪涌电流通过齐纳二极管(14)和浪涌二极管(16)传递到浪涌吸收节点。 响应于浪涌电流,晶体管浪涌保护装置(18)呈现高阻抗配置,从而将输出节点(13)与输入节点(11)隔离开。 由于齐纳二极管和二极管组合以及晶体管浪涌保护装置(18)都不受持续浪涌相关电流的影响,本发明的实施例可以被紧凑地封装。
    • 12. 发明授权
    • Transient blocking apparatus with reset
    • 瞬态阻塞装置复位
    • US07576962B2
    • 2009-08-18
    • US11445774
    • 2006-06-02
    • Richard A. Harris
    • Richard A. Harris
    • H02H3/22
    • H02H3/025H02H9/025
    • A method and apparatus for transient blocking relying on a transient blocking device and a sampling circuit. The transient blocking device has at least one depletion mode n-channel device interconnected with at least one depletion mode p-channel device such that a transient alters a bias voltage Vp of the depletion mode p-channel device and a bias voltage Vn of the depletion mode n-channel device in such a manner that the depletion mode devices mutually switch off to block the transient. The sampling circuit is interconnected with the depletion mode p-channel device and the depletion mode n-channel device to determine whether the transient persists. In the event of a persistent transient, the sampling circuit uses a disconnect element for permanently blocking the transient blocking device. Various types of voltage pinching and disconnect elements, including depletion mode devices of the n-channel and p-channel type can be employed in the sampling circuit to sample the transient and permanently block the transient blocking device.
    • 一种依赖于瞬态阻塞装置和采样电路的瞬态阻塞的方法和装置。 瞬态阻断装置具有与至少一个耗尽型p沟道器件互连的至少一个耗尽型n沟道器件,使得瞬态改变耗尽型p沟道器件的偏置电压Vp和耗尽型p沟道器件的偏置电压Vn 模式n沟道器件以这样的方式使耗尽型器件相互切断以阻止瞬变。 采样电路与耗尽型p沟道器件和耗尽型n沟道器件互连以确定瞬态是否持续。 在持续瞬变的情况下,采样电路使用断开元件来永久阻塞瞬态阻断装置。 可以在采样电路中采用各种类型的电压夹紧和断开元件,包括n沟道和p沟道型的耗尽型器件,以对瞬态电压进行采样并永久阻断瞬态阻断器件。
    • 13. 发明授权
    • Low resistance transient blocking unit
    • 低电阻瞬态阻塞单元
    • US07492566B2
    • 2009-02-17
    • US11332787
    • 2006-01-12
    • Richard A. Harris
    • Richard A. Harris
    • H02H1/00H02H3/20H02H9/04H02H5/04
    • H02H9/025
    • A transient blocking unit (TBU) having reduced series impedance is provided. A TBU includes two or more depletion mode transistors arranged to provide a low series impedance in normal operation and a high series impedance when the input current exceeds a predetermined threshold. A nonlinear impedance element is included in the TBU that acts as a current limiter having a substantially constant saturation current over a range of applied voltages. This saturation current is selected to be the threshold current of the TBU. When the threshold is exceeded, the voltage developed across the nonlinear impedance element tends to drive the TBU into its high impedance state. When the operating current is below threshold, the TBU series resistance is relatively low because the nonlinear impedance element is in its low-resistance state. The nonlinear impedance element can be a separate circuit element, or it can be integrated with one or more of the TBU transistors.
    • 提供具有减小的串联阻抗的瞬态阻断单元(TBU)。 TBU包括两个或多个耗尽型晶体管,其布置成在正常操作中提供低串联阻抗,并且当输入电流超过预定阈值时包括高串联阻抗。 一个非线性阻抗元件被包含在TBU中,其作为在施加电压范围上具有基本恒定的饱和电流的限流器。 该饱和电流被选择为TBU的阈值电流。 当超过阈值时,在非线性阻抗元件上产生的电压趋于将TBU驱动到其高阻抗状态。 当工作电流低于阈值时,由于非线性阻抗元件处于其低电阻状态,所以TBU串联电阻相对较低。 非线性阻抗元件可以是单独的电路元件,或者它可以与一个或多个TBU晶体管集成。
    • 16. 发明授权
    • Apparatus and method for enhanced transient blocking
    • 用于增强瞬态阻塞的装置和方法
    • US07342433B2
    • 2008-03-11
    • US11270062
    • 2005-11-08
    • Richard A. HarrisFrancois Hebert
    • Richard A. HarrisFrancois Hebert
    • H03K17/687
    • H01L27/0266H02H5/042H02H5/044H02H9/025H02H9/046
    • An apparatus and method for enhanced transient blocking employing a transient blocking unit (TBU) that uses at least one depletion mode n-channel device interconnected with at least one depletion mode p-channel device. The interconnection is performed such that a transient alters a bias voltage Vp of the p-channel device and a bias voltage Vn of the n-channel device such that the p- and n-channel devices mutually switch off to block the transient. The apparatus has an enhancer circuit for applying an enhancement bias to a gate terminal of at least one of the depletion mode n-channel devices of the TBU to reduce a total resistance Rtot of the apparatus. Alternatively, the apparatus has an enhancement mode NMOS transistor and a TBU connected thereto to help provide an enhancement bias to a gate terminal of the enhancement mode NMOS.
    • 一种用于增强瞬态阻塞的装置和方法,其采用使用与至少一个耗尽型p沟道器件互连的至少一个耗尽型n沟道器件的瞬态阻塞单元(TBU)。 执行互连,使得瞬态改变p沟道器件的偏置电压V P和N沟道器件的偏置电压V N n N,使得p - 和n通道设备相互关闭以阻止瞬态。 该装置具有增强器电路,用于向TBU中的至少一个耗尽型n沟道器件的栅极端子施加增强偏置,以减小器件的总电阻R tht。 或者,该装置具有增强型NMOS晶体管和与其连接的TBU,以帮助向增强型NMOS的栅极端提供增强偏置。