专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20080037444A1 Ad-hoc simple configuration 有权
标题翻译：特别简单的配置
公开(公告)号：US20080037444A1
公开(公告)日：2008-02-14
申请号：US11800166
申请日：2007-05-04
申请人： Kapil Chhabra
发明人： Kapil Chhabra
IPC分类号： H04L12/28
CPC分类号： H04W52/0241 , H04W52/0222 , H04W52/0254 , H04W60/00 , H04W84/18 , Y02D70/142 , Y02D70/22
摘要： A protocol governing the operation of an ad-hoc WLAN enables each device in the WLAN to be configured as a registrar and/or an enrollee. Accordingly, each device is configurable to support both the registrar as well as enrollee modes of operations. In response to a time-driven user action, the device may be configured to enter into a registrar mode or an enrollee mode. While in the registrar mode, the device enters into an aggressive beaconing phase by setting its beacon contention window to a relatively very small value. The aggressive beaconing increases the probability of the discovery of the registrar by the enrollees. Optionally the device may prompt the user to select between a registrar and an enrollee mode of operation by displaying the option on an LCD panel.
摘要翻译：管理自组织WLAN的操作的协议使得WLAN中的每个设备被配置为注册器和/或登记者。因此，每个设备都可配置为支持注册器以及注册人操作模式。响应于时间驱动的用户操作，设备可以被配置为进入注册器模式或登记者模式。在注册器模式下，设备通过将其信标竞争窗口设置为相对非常小的值来进入激进的信标阶段。激进的信号增加了参与者发现注册商的可能性。可选地，设备可以通过在LCD面板上显示该选项来提示用户在注册器和登记者操作模式之间进行选择。

12. 发明授权

US07288845B2 Fabrication of wire bond pads over underlying active devices, passive devices and/or dielectric layers in integrated circuits 有权
标题翻译：在集成电路中的底层有源器件，无源器件和/或介电层上制造引线接合焊盘
公开(公告)号：US07288845B2
公开(公告)日：2007-10-30
申请号：US10434524
申请日：2003-05-08
申请人： Sehat Sutardja , Albert Wu , Jin-Yuan Lee , Mou-Shiung Lin
发明人： Sehat Sutardja , Albert Wu , Jin-Yuan Lee , Mou-Shiung Lin
IPC分类号： H01L23/485
CPC分类号： H01L24/05 , H01L24/03 , H01L24/45 , H01L24/48 , H01L2224/04042 , H01L2224/05073 , H01L2224/05166 , H01L2224/05171 , H01L2224/05187 , H01L2224/05556 , H01L2224/05558 , H01L2224/05624 , H01L2224/05644 , H01L2224/45144 , H01L2224/48463 , H01L2224/48624 , H01L2224/48644 , H01L2224/85399 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/05042 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014 , H01L2924/04953 , H01L2924/00
摘要： A wire connection structure for an integrated circuit (IC) die includes a semiconductor wafer with an active device and/or a passive device. One or more dielectric layers are arranged adjacent to the active and/or passive device. One or more metal interconnect layers are arranged adjacent to the active and/or passive device. A contact pad is arranged in an outermost metal interconnect layer. A passivation layer is arranged over the outermost metal interconnect layer and includes at least one passivation opening that exposes the contact pad. A bond pad is arranged over the passivation layer and the active and/or passive device and is connected to the contact pad through the passivation opening. Formation of the bond pad does not damage the active and/or passive device.
摘要翻译：用于集成电路（IC）管芯的导线连接结构包括具有有源器件和/或无源器件的半导体晶片。一个或多个电介质层被布置为与有源和/或无源器件相邻。一个或多个金属互连层布置成与有源和/或无源器件相邻。接触垫布置在最外侧金属互连层中。钝化层布置在最外金属互连层上方，并且包括暴露接触焊盘的至少一个钝化开口。焊接层布置在钝化层和有源和/或无源器件上方，并通过钝化开口连接到接触焊盘。接合焊盘的形成不会损坏有源和/或无源器件。

13. 发明申请

US20070024385A1 Low-noise high-stability crystal oscillator 有权
公开(公告)号：US20070024385A1
公开(公告)日：2007-02-01
申请号：US11242621
申请日：2005-10-03
申请人： Jody Greenberg
发明人： Jody Greenberg
IPC分类号： H03B5/32
CPC分类号： H03L5/00 , H03B5/364
摘要： Circuits, methods, and apparatus that provide low-noise, high-stability crystal oscillators having controlled-amplitude differential output signals and DC level control. A crystal oscillator circuit has two feedback loops, one for setting the DC level of its signals, the other for adjusting the amplitude of those signals. The DC level feedback loop can set the DC component of the oscillator signals to a voltage midway between two supply voltages. The amplitude control loop sets the amplitude of the output of the crystal oscillator signal to be within a range. The amplitude can be set to provide a maximum swing without clipping the supply voltages in order to provide high-stability and minimal jitter. The amplitude control circuit can also be digital for improved noise performance. The time constants of these two loops can be separated such that instabilities are avoided.

14. 发明授权

US10447608B2 Packet scheduling using hierarchical scheduling process with priority propagation 有权
公开(公告)号：US10447608B2
公开(公告)日：2019-10-15
申请号：US14542393
申请日：2014-11-14
申请人： CAVIUM, LLC
发明人： Tsahi Daniel , Vamsi Panchagnula
IPC分类号： H04L12/869 , H04L12/863
摘要： System and method of data routing according to a hierarchical scheduling process. Incoming data traffic is allocated to various queues of a buffer. A scheduling tree has a top level for queues, a bottom level for egress ports, and a plurality of intermediate levels corresponding to different granularities with respect to service categories. Each queue is assigned to a particular node in each intermediate level of the scheduling tree. The scheduling tree traverses through multiple scheduling stages from the bottom to the top level to select a winner node in each level based on a variety of fairness and differentiating variables. A queue associated with the winner nodes in various levels is selected for outgoing transmission at the selected egress port. Priority information is dynamically propagated from upper nodes to lower nodes such that a subsequent scheduling process uses the updated priority information.

15. 发明授权

US07706295B2 Methods and apparatus for breaking and resynchronizing a data link 有权
标题翻译：断开和重新同步数据链路的方法和装置
公开(公告)号：US07706295B2
公开(公告)日：2010-04-27
申请号：US10658666
申请日：2003-09-09
申请人： Francis Campana , William Lo
发明人： Francis Campana , William Lo
IPC分类号： G01R31/08
CPC分类号： H04L7/10 , H04L2007/045
摘要： A resynchronization device for an Ethernet network device with a transmitter and a receiver includes a detector that detects faulty code groups received by the receiver. A counter counts the faulty code groups that are detected by the false carrier detector during a predetermined period. A resynchronization trigger asserts a resynchronization signal if the counter exceeds a predetermined threshold during the predetermined period. The faulty code groups include false carriers, which include non-idle code groups other than frame delimiters. Alternately, the faulty code groups include idle code groups that match idle code groups generated by the transmitter of the local network device.
摘要翻译：具有发射机和接收机的以太网网络设备的再同步装置包括检测器，其检测由接收机接收的故障码组。计数器在预定时段内对由错误载波检测器检测到的故障代码组进行计数。如果计数器在预定时段期间超过预定阈值，则重新同步触发断言重新同步信号。错误的代码组包括虚假载波，其包括除帧分隔符之外的非空闲代码组。或者，故障代码组包括与由本地网络设备的发射机生成的空闲代码组相匹配的空闲代码组。

16. 发明申请

US20080253014A1 Magnetic disk controller and method 有权
标题翻译：磁盘控制器及方法
公开(公告)号：US20080253014A1
公开(公告)日：2008-10-16
申请号：US12012426
申请日：2008-02-01
申请人： Soichi Isono , Minoru Tsukada , Tomoki Oura , Koji Takahashi
发明人： Soichi Isono , Minoru Tsukada , Tomoki Oura , Koji Takahashi
IPC分类号： G11B15/18
CPC分类号： G11B20/1833 , G11B20/10527 , G11B2020/1062 , G11B2220/2516
摘要： Among other disclosed subject matter, a magnetic disk controller can include an index detecting unit to detect an index of the magnetic disk, an error check code generating unit to, after the index detecting unit detects the index, generate a first error check code for first write data based on the first write data and a first physical address of a first sector subsequent to the detected index, and a writing control unit to cause the first error check code generated by the error check code generating unit, the first write data and the first physical address to be written into a second sector subsequent to the first sector.
摘要翻译：在其他公开的主题中，磁盘控制器可以包括检索磁盘的索引的索引检测单元，在索引检测单元检测到索引之后，产生第一错误检查代码的错误检查代码生成单元基于检测到的索引的第一写入数据和第一扇区的第一物理地址写入数据;以及写入控制单元，用于使由错误校验码生成单元生成的第一错误校验码，第一写入数据和第一物理地址被写入第一扇区之后的第二扇区。

17. 发明申请

US20070201331A1 Circuits, architectures, apparatuses, systems, algorithms and methods and software for optimum power calibration for optical disc recording 有权
标题翻译：电路，架构，设备，系统，算法和方法和软件，用于光盘记录的最佳功率校准
公开(公告)号：US20070201331A1
公开(公告)日：2007-08-30
申请号：US11646098
申请日：2006-12-26
申请人： Pantas Sutardja , William R. Foland
发明人： Pantas Sutardja , William R. Foland
IPC分类号： G11B7/12
CPC分类号： G11B20/10009 , G11B7/1267 , G11B20/1217 , G11B2020/1275 , G11B2220/2537
摘要： Methods, software, and apparatus for the calibration of writing characteristics for writing to an optical storage medium, and methods of encoding calibration pattern data and calibration instructions are disclosed. The method of calibration generally includes the steps of (a) receiving pattern data and instructions synchronized with the pattern data, (b) writing the pattern data to the optical storage medium in accordance with the instructions, (c) reading a readback signal corresponding to the pattern data from the optical storage medium, (d) processing the readback signal in accordance with the instructions, and (e) determining a value of a writing characteristic for writing data to the optical storage medium based at least in part on the readback signal. The method provides the ability to flexibly set test parameters and to quickly and accurately test the write characteristics of a recordable or re-writable optical storage medium.
摘要翻译：公开了用于校准写入光学存储介质的写入特性的方法，软件和装置，以及编码校准图案数据和校准指令的方法。校准方法通常包括以下步骤：（a）接收与图案数据同步的图案数据和指令，（b）根据指令将图案数据写入光学存储介质，（c）读取对应于来自光存储介质的图案数据，（d）根据指令处理回读信号，以及（e）至少部分地基于回读信号确定用于将数据写入光存储介质的写入特性的值。该方法提供了灵活设置测试参数并快速准确地测试可记录或可重写光存储介质的写特性的能力。

18. 发明授权

US07173489B1 Programmable gain voltage buffer 有权
标题翻译：可编程增益电压缓冲器
公开(公告)号：US07173489B1
公开(公告)日：2007-02-06
申请号：US10648632
申请日：2003-08-25
申请人： Yonghua Song , Sang Won Son
发明人： Yonghua Song , Sang Won Son
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F2203/45641 , H03F2203/45691 , H03F2203/45696 , H03G1/0088
摘要： A programmable gain voltage buffer circuit with a programmable gain may include transistors in parallel with resistors. The transistors may be used as variable resistors, with the resistors predominating the equivalent resistances at output points in different branches of the buffer circuit. The transistors may have resistances corresponding to programmable gain steps in the circuit.
摘要翻译：具有可编程增益的可编程增益电压缓冲电路可以包括与电阻器并联的晶体管。晶体管可以用作可变电阻器，其中电阻器主要在缓冲电路的不同分支中的输出点处的等效电阻。晶体管可以具有对应于电路中的可编程增益步长的电阻。

19. 发明申请

US20210286672A1 CIRCUIT AND METHOD FOR SOFT-ERROR PROTECTION IN OPERATION OF ECC AND REGISTER 有权
公开(公告)号：US20210286672A1
公开(公告)日：2021-09-16
申请号：US16817717
申请日：2020-03-13
申请人： MARVELL SEMICONDUCTOR, INC.
发明人： Michael A. Ziegerhofer
IPC分类号： G06F11/10 , G06F9/30
摘要： Embodiments of the present disclosure provide an a circuit including: first logic to compare output data from the shift register with output data from error correcting code circuitry (ECC), to output an error signal in response to a data bit output from the shift register being different from a data bit output from the ECC; second logic for receiving the error signal from the first logic gate, and a correctability signal from the ECC, to output an overwrite signal in response to receiving the error signal and the correctability signal; and a selector receiving the overwrite signal and the data bit of the output data from the ECC, and coupled between a data source and an input line to the shift register. The selector causes the shift register to receive the ECC output in response to receiving the overwrite signal.

20. 发明申请

US20040070086A1 Fabrication of wire bond pads over underlying active devices, passive devices and /or dielectric layers in integrated circuits 有权
标题翻译：在集成电路中的底层有源器件，无源器件和/或介电层上制造引线接合焊盘
公开(公告)号：US20040070086A1
公开(公告)日：2004-04-15
申请号：US10434524
申请日：2003-05-08
申请人： Marvell Semiconductor, Inc. , MEGIC Corporation
发明人： Jin-Yuan Lee , Albert Wu , Sehat Sutardja , Mou-Shiung Lin
IPC分类号： H01L023/48 , H01L021/44
CPC分类号： H01L24/05 , H01L24/03 , H01L24/45 , H01L24/48 , H01L2224/04042 , H01L2224/05073 , H01L2224/05166 , H01L2224/05171 , H01L2224/05187 , H01L2224/05556 , H01L2224/05558 , H01L2224/05624 , H01L2224/05644 , H01L2224/45144 , H01L2224/48463 , H01L2224/48624 , H01L2224/48644 , H01L2224/85399 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/05042 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014 , H01L2924/04953 , H01L2924/00
摘要： A wire connection structure for an integrated circuit (IC) die includes a semiconductor wafer with an active device and/or a passive device. One or more dielectric layers are arranged adjacent to the active and/or passive device. One or more metal interconnect layers are arranged adjacent to the active and/or passive device. A contact pad is arranged in an outermost metal interconnect layer. A passivation layer is arranged over the outermost metal interconnect layer and includes at least one passivation opening that exposes the contact pad. A bond pad is arranged over the passivation layer and the active and/or passive device and is connected to the contact pad through the passivation opening. Formation of the bond pad does not damage the active and/or passive device.
摘要翻译：用于集成电路（IC）管芯的导线连接结构包括具有有源器件和/或无源器件的半导体晶片。一个或多个电介质层被布置为与有源和/或无源器件相邻。一个或多个金属互连层布置成与有源和/或无源器件相邻。接触垫布置在最外侧金属互连层中。钝化层布置在最外金属互连层上方，并且包括暴露接触焊盘的至少一个钝化开口。焊接层布置在钝化层和有源和/或无源器件上方，并通过钝化开口连接到接触焊盘。接合焊盘的形成不会损坏有源和/或无源器件。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式