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171. 发明授权

US09285289B2 Pressure sensor with built-in calibration capability 有权
标题翻译：内置校准功能的压力传感器
公开(公告)号：US09285289B2
公开(公告)日：2016-03-15
申请号：US14099149
申请日：2013-12-06
申请人： FREESCALE SEMICONDUCTOR, INC.
发明人： Chad S. Dawson , Peter T. Jones
IPC分类号： G01L27/00 , H01L41/08 , B81C99/00
CPC分类号： G01L27/002 , B81B2201/0264 , B81C99/003 , G01L9/0073 , H01L41/08
摘要： A MEMS pressure sensor (70) includes a sense cell (80), a test cell (82), and a seal structure (84). The test cell includes a test cavity (104), and the seal structure (84) is in communication with the test cavity, wherein the seal structure is configured to be breached to change an initial cavity pressure (51) within the test cavity (104) to ambient pressure (26). Calibration methodology (180) entails obtaining (184) a test signal (186) from the test cell prior to breaching the seal structure, and obtaining (194) another test signal (196) after the seal structure is breached. The test signals are used to calculate a sensitivity (200) of the test cell, the calculated sensitivity is used to estimate the sensitivity (204) of the sense cell, and the estimated sensitivity (204) can be used to calibrate the sense cell.
摘要翻译： MEMS压力传感器（70）包括感测单元（80），测试单元（82）和密封结构（84）。测试单元包括测试空腔（104），并且密封结构（84）与测试空腔连通，其中密封结构构造成被破坏以改变测试空腔（104）内的初始空腔压力（51））到环境压力（26）。校准方法（180）需要在破坏密封结构之前从测试单元获得（184）测试信号（186），并且在密封结构被破坏之后获得（194）另一个测试信号（196）。测试信号用于计算测试单元的灵敏度（200），计算的灵敏度用于估计感测单元的灵敏度（204），并且估计的灵敏度（204）可用于校准感测单元。

172. 发明申请

US20160071943A1 METHOD TO FORM SELF-ALIGNED HIGH DENSITY NANOCRYSTALS 有权
标题翻译：形成自对准高密度纳米晶体的方法
公开(公告)号：US20160071943A1
公开(公告)日：2016-03-10
申请号：US14476827
申请日：2014-09-04
申请人： Euhngi Lee , Sung-Taeg Kang
发明人： Euhngi Lee , Sung-Taeg Kang
IPC分类号： H01L29/423 , H01L21/02 , H01L21/324 , H01L21/308 , H01L29/792 , H01L21/28
CPC分类号： H01L29/42348 , H01L21/02381 , H01L21/0243 , H01L21/02488 , H01L21/02532 , H01L21/02601 , H01L21/0262 , H01L21/02658 , H01L21/02667 , H01L21/28273 , H01L21/28282 , H01L21/324 , H01L21/3247 , H01L29/42328 , H01L29/42344 , H01L29/7881 , H01L29/792
摘要： Methods for fabricating dense arrays of electrically conductive nanocrystals that are self-aligned in depressions at target locations on a substrate, and semiconductor devices configured with nanocrystals situated within a gate stack as a charge storage area for a nonvolatile memory (NVM) device, are provided.
摘要翻译：提供了在衬底上的目标位置处的凹陷中自对准的导电纳米晶体的致密阵列的制造方法，以及配置有位于栅极堆叠内的纳米晶体作为非易失性存储器（NVM）装置的电荷存储区域的半导体器件的方法。

173. 发明申请

US20160070846A1 SYSTEM FOR TESTING IC DESIGN 审中-公开
标题翻译：测试IC设计系统
公开(公告)号：US20160070846A1
公开(公告)日：2016-03-10
申请号：US14481899
申请日：2014-09-09
申请人： Nandini , Rohit Srivastava
发明人： Nandini , Rohit Srivastava
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5022
摘要： A method for testing an integrated circuit design exercises the design using a set of simulation signals, and partitions a representation of the design into a first set of active elements and a second set of inactive elements. Only the active elements of the first set are exercised using a second set of simulation signals during verification of the integrated circuit design.
摘要翻译：用于测试集成电路设计的方法使用一组模拟信号来执行设计，并将设计的表示分割成第一组有源元件和第二组非活动元件。在验证集成电路设计期间，仅使用第二组模拟信号来执行第一组的有源元件。

174. 发明申请

US20160070666A1 METHOD OF CONTROLLING DIRECT MEMORY ACCESS OF A PERIPHERAL MEMORY OF A PERIPHERAL BY A MASTER, AN ASSOCIATED CIRCUITRY, AN ASSOCIATED DEVICE AND AN ASSOCIATED COMPUTER PROGRAM PRODUCT 有权
标题翻译：通过主机，相关电路，相关设备和相关计算机程序产品控制外围存储器的外部存储器的直接存储器访问的方法
公开(公告)号：US20160070666A1
公开(公告)日：2016-03-10
申请号：US14778115
申请日：2013-03-22
申请人： Alistair ROBERSTON , Carl CULSHAW , Alan DEVINE
发明人： ALISTAIR ROBERSTON , CARL CULSHAW , ALAN DEVINE
IPC分类号： G06F13/28 , G06F13/364 , G06F13/42
CPC分类号： G06F13/28 , G06F13/364 , G06F13/4282
摘要： A method of controlling direct memory access of a peripheral memory of a peripheral by a master is described. The method includes checking whether there is a pending request from the peripheral for a direct memory access service, establishing whether an access condition is satisfied in dependence on at least whether there is a pending request, and, if the access condition is satisfied, granting access to the master. Also, an associated device and an associated computer program product are described.
摘要翻译：描述了由主设备控制外围设备的外围存储器的直接存储器访问的方法。该方法包括检查外围设备是否存在用于直接存储器访问服务的未决请求，根据至少是否存在未决请求来确定访问条件是否满足，并且如果访问条件被满足，则授予访问权限给主人。此外，描述了相关联的设备和相关联的计算机程序产品。

175. 发明申请

US20160070619A1 METHOD AND APPARATUS FOR CONFIGURING I/O CELLS OF A SIGNAL PROCESSING IC DEVICE INTO A SAFE STATE 有权
标题翻译：用于将信号处理IC装置的I / O电池配置到安全状态的方法和装置
公开(公告)号：US20160070619A1
公开(公告)日：2016-03-10
申请号：US14482387
申请日：2014-09-10
申请人： ROBERT F. MORAN , ALAN DEVINE , ALISTAIR PAUL ROBERTSON
发明人： ROBERT F. MORAN , ALAN DEVINE , ALISTAIR PAUL ROBERTSON
IPC分类号： G06F11/14 , G01R31/3177
CPC分类号： G06F11/1415 , G01R31/3185 , G01R31/318544 , G06F11/0739 , G06F11/0754 , G06F11/0793 , G06F11/0796 , G06F2201/805
摘要： A peripheral integrated circuit (IC) device for providing support to a data processing IC device. The peripheral IC device comprises a fault detection component arranged to detect an occurrence of fault conditions within the data processing IC device. The peripheral IC device further comprises a safe state control component. Upon detection of a fault condition occurring within the data processing IC device by the fault detection component, the safe state control component is arranged to cause at least one I/O cell of the data processing IC device to be configured into at least one scan-chain, and cause at least one predefined control signal to be scanned into the at least one scan-chain to configure the at least one I/O cell into a state corresponding to the predefined control signal.
摘要翻译：一种用于向数据处理IC设备提供支持的外围集成电路（IC）设备。外围IC器件包括故障检测部件，其被配置为检测数据处理IC器件内的故障状况的发生。外围IC器件还包括安全状态控制部件。在检测到由故障检测部件发生在数据处理IC器件内的故障状况时，安全状态控制部件被配置为使数据处理IC器件的至少一个I / O单元配置成至少一个扫描 - 并且使至少一个预定义的控制信号被扫描到所述至少一个扫描链中，以将所述至少一个I / O单元配置为与所述预定义的控制信号相对应的状态。

176. 发明授权

US09281737B2 Voltage converter 有权
标题翻译：电压转换器
公开(公告)号：US09281737B2
公开(公告)日：2016-03-08
申请号：US14170650
申请日：2014-02-03
申请人： Nishant Singh Thakur
发明人： Nishant Singh Thakur
IPC分类号： H02M3/158 , H02M1/08 , H02M3/155 , H02M1/00
CPC分类号： H02M1/08 , H02M3/155 , H02M2001/0048 , Y02B70/1491
摘要： A voltage converter such as a DC-DC buck regulator includes a driver circuit that enables charge stored on the parasitic capacitance of a transistor switch to be transferred to a load capacitor. Hence, stored charge can be harvested for use by a load, thereby increasing efficiency of the regulator.
摘要翻译：诸如DC-DC降压调节器的电压转换器包括驱动电路，其使存储在晶体管开关的寄生电容上的电荷传输到负载电容器。因此，可以收集储存的电荷以供负载使用，从而提高调节器的效率。

177. 发明申请

US20160065114A1 DEVICE FOR CONTROLLING A MULTI-PHASE MOTOR 有权
标题翻译：用于控制多相电动机的装置
公开(公告)号：US20160065114A1
公开(公告)日：2016-03-03
申请号：US14784040
申请日：2013-04-30
申请人： Wilhard VON WENDORFF
发明人： WILHARD VON WENDORFF
IPC分类号： H02P29/02 , B62D5/04
CPC分类号： H02P29/027 , B62D5/0484 , B62D5/0487
摘要： An electronic device is for controlling motor drive circuits for driving a multi-phase motor in a force assisted system. Each motor drive circuit selectively permitting current to flow into or out of a respective phase of the multi-phase motor connected to the motor drive circuit in response to being driven by respective control signals. A motor control circuit generates the control signals. A fault processor detects at least one fault condition causing a fault current in a first motor drive circuit. In the event of the fault condition being detected, at least one alternative control signal is generated for at least one motor drive circuit for permitting at least one compensation current to flow for reducing a faulty force due to the fault current.
摘要翻译：电子设备用于控制用于在力辅助系统中驱动多相电动机的电动机驱动电路。每个电动机驱动电路响应于由相应的控制信号驱动而选择性地允许电流流入或流出连接到电动机驱动电路的多相电动机的相位。电机控制电路产生控制信号。故障处理器检测至少一个导致第一电动机驱动电路中的故障电流的故障状况。在检测到故障状况的情况下，为至少一个电动机驱动电路产生至少一个替代控制信号，以允许至少一个补偿电流流动，以减少由故障电流引起的故障力。

178. 发明申请

US20160063149A1 DESIGN TOOL APPARATUS, METHOD AND COMPUTER PROGRAM FOR DESIGNING AN INTEGRATED CIRCUIT 有权
标题翻译：设计工具装置，设计集成电路的方法和计算机程序
公开(公告)号：US20160063149A1
公开(公告)日：2016-03-03
申请号：US14778107
申请日：2013-03-21
申请人： Pascal CAUNEGRE , FREESCALE SEMICONDUCTOR, INC.
发明人： PASCAL CAUNEGRE
IPC分类号： G06F17/50
CPC分类号： G06F17/5009 , G06F17/5036 , G06F17/5072 , G06F17/5081 , G06F2217/10
摘要： An integrated circuit design tool apparatus includes a processing resource configured to support a circuit simulator, a circuit sensitivity optimiser and a circuit sensitivity calculator. The circuit sensitivity optimiser is adapted to communicate to the circuit simulator a first dynamic list of selected devices of the circuit; and a second dynamic list of selected process parameters associated with the selected devices of the first dynamic list. The circuit simulator is configured to communicate to the circuit sensitivity calculator, a performance metrics of the circuit in response thereto. The circuit sensitivity calculator is configured to determine one sensitivity coefficient for each device of the first dynamic list in response thereto. The circuit sensitivity calculator is further configured to determine and communicate to the circuit sensitivity optimiser a variance of the performance metrics and also adapted to gradually determine whether or not to further communicate with the circuit simulator.
摘要翻译：集成电路设计工具装置包括配置成支持电路仿真器，电路灵敏度优化器和电路灵敏度计算器的处理资源。电路灵敏度优化器适于与电路模拟器通信电路的所选设备的第一动态列表; 以及与所述第一动态列表的所选设备相关联的所选过程参数的第二动态列表。电路模拟器被配置为与电路灵敏度计算器通信，响应于该电路的性能度量。电路灵敏度计算器被配置为响应于第一动态列表的每个设备确定一个灵敏度系数。电路灵敏度计算器还被配置为确定电路灵敏度优化器并且将其与性能度量的差异通信，并且还适于逐渐确定是否进一步与电路模拟器通信。

179. 发明申请

US20160062810A1 METHODS AND APPARATUS FOR DETECTING SOFTWARE INTEFERENCE 有权
标题翻译：检测软件功能的方法和设备
公开(公告)号：US20160062810A1
公开(公告)日：2016-03-03
申请号：US14469775
申请日：2014-08-27
申请人： WILHARD CHRISTOPHORUS VON WENDORFF
发明人： WILHARD CHRISTOPHORUS VON WENDORFF
IPC分类号： G06F11/07 , G06F11/30 , G06F11/34
CPC分类号： G06F11/079 , G06F11/0721 , G06F11/0757 , G06F11/0796 , G06F11/3024 , G06F11/3055 , G06F11/3409 , G06F11/348 , G06F2201/81 , G06F2201/86 , G06F2201/865 , G06F2201/88
摘要： The present application relates to an apparatus for detecting software interference and the method of operating thereof. A processor and at least one shared resource form a computing shell to execute a first, functional safety critical application and at least one second application in time-shared operation. One or more performance counters are provided to adjust a counter value in response to a performance related event. A reference value storage stores one or more threshold values, each of which is associated with one of the performance counters. A comparator receives the performance counter values, compares the performance counter values with the respective threshold values and generates at least one comparison signal in response to results of the comparisons. An interference indication generator receives the at least one comparison signal and generates at least one interference indication in response to the at least one received comparison signal.
摘要翻译：本申请涉及一种用于检测软件干扰的装置及其操作方法。处理器和至少一个共享资源形成计算外壳以在时间共享操作中执行第一功能安全关键应用和至少一个第二应用。提供一个或多个性能计数器以响应于性能相关事件来调整计数器值。参考值存储存储一个或多个阈值，每个阈值与性能计数器之一相关联。比较器接收性能计数器值，将性能计数器值与相应的阈值进行比较，并响应于比较结果生成至少一个比较信号。干扰指示发生器接收所述至少一个比较信号，并响应于所述至少一个接收到的比较信号而生成至少一个干扰指示。

180. 发明申请

US20160062656A1 Command Set Extension for Non-Volatile Memory 审中-公开
标题翻译：非易失性存储器的命令集扩展
公开(公告)号：US20160062656A1
公开(公告)日：2016-03-03
申请号：US14471871
申请日：2014-08-28
申请人： Ravindraraj Ramaraju , George P. Hoekstra
发明人： Ravindraraj Ramaraju , George P. Hoekstra
IPC分类号： G06F3/06
CPC分类号： G11C16/10 , G11C16/14 , G11C16/3445
摘要： A method and apparatus are provided for generating an adjusted internal electrical parameter for accessing a NAND Flash memory array based on an adjustment control parameter conveyed by a memory access instruction, where the memory access instruction is compliant with an Open NAND Flash Interface (ONFI) protocol to include a two command cycle sequence to specify a command for accessing the NAND Flash memory with the adjusted internal electrical parameter.
摘要翻译：提供了一种方法和装置，用于根据由存储器访问指令传送的调整控制参数产生用于访问NAND闪存阵列的经调整的内部电参数，其中存储器访问指令符合开放NAND闪存接口（ONFI）协议包括两个命令循环序列，以指定用调整的内部电气参数访问NAND闪存的命令。

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