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131. 发明申请

US20090195387A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20090195387A1
公开(公告)日：2009-08-06
申请号：US12358349
申请日：2009-01-23
申请人： Jun KOYAMA , Shunpei YAMAZAKI
发明人： Jun KOYAMA , Shunpei YAMAZAKI
IPC分类号： G08B13/14
CPC分类号： G06K19/0723 , G06K19/0719
摘要： A semiconductor device with improved reliability, in which increase in power consumption can be reduced. The semiconductor device includes an antenna for transmitting and receiving a wireless signal to/from a communication device and at least first and second functional circuits electrically connected to the antenna. The first functional circuit includes a power supply control circuit for controlling power supply voltage output from a power supply circuit in the second functional circuit. A power supply control circuit in the second functional circuit includes a transistor of which first terminal is electrically connected to an output terminal of the power supply circuit and second terminal is electrically connected to a ground line. A gate terminal of the transistor is electrically connected to the power supply control circuit included in one functional circuit.
摘要翻译：具有可靠性提高的能够降低功耗增加的半导体装置。半导体器件包括用于向/从通信设备发送和接收无线信号的天线以及电连接到天线的至少第一和第二功能电路。第一功能电路包括用于控制从第二功能电路中的电源电路输出的电源电压的电源控制电路。第二功能电路中的电源控制电路包括晶体管，其第一端子电连接到电源电路的输出端子，并且第二端子电连接到接地线。晶体管的栅极端子电连接到包括在一个功能电路中的电源控制电路。

132. 发明申请

US20090194771A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090194771A1
公开(公告)日：2009-08-06
申请号：US12421840
申请日：2009-04-10
申请人： Jun KOYAMA , Koji DAIRIKI , Susumu OKAZAKI , Yoshitaka MORIYA , Shunpei YAMAZAKI
发明人： Jun KOYAMA , Koji DAIRIKI , Susumu OKAZAKI , Yoshitaka MORIYA , Shunpei YAMAZAKI
IPC分类号： H01L33/00 , H01L27/088 , H01L23/52
CPC分类号： H01L27/1266 , H01L27/1214 , H01L27/1218 , H01L27/1255 , H01L27/283 , H01L29/78603 , H01L51/0097 , H01L2224/16225 , H01L2924/12044 , Y02E10/549 , Y02P70/521 , H01L2924/00
摘要： An object of the present invention is to provide a semiconductor device which has flexibility and resistance to a physical change such as bending and a method for manufacturing the semiconductor device. A semiconductor device of the present invention includes a plurality of transistors provided over a flexible substrate, each of which has a semiconductor film, a gate electrode provided over the semiconductor film with a gate insulating film therebetween, and an interlayer insulating film provided to cover the gate electrode, and a bending portion provided between the plurality of transistors, in which the bending portion is provided by filling an opening formed in the interlayer insulating film with a material having a lower elastic modulus, a material having a lower glass transition point, or a material having a higher plasticity than that of the interlayer insulating film.
摘要翻译：本发明的目的是提供一种具有柔性和抗弯曲等物理变化的半导体器件以及半导体器件的制造方法。本发明的半导体器件包括设置在柔性基板上的多个晶体管，每个晶体管具有半导体膜，在半导体膜之间设置有栅极绝缘膜的栅电极和设置成覆盖该半导体膜的层间绝缘膜栅电极和设置在多个晶体管之间的弯曲部分，其中通过用具有较低弹性模量的材料填充形成在层间绝缘膜中的开口，具有较低玻璃化转变点的材料，或者具有比层间绝缘膜高的塑性的材料。

133. 发明申请

US20090170227A1 MASK AND CONTAINER AND MANUFACTURING 审中-公开
标题翻译：掩模和容器和制造
公开(公告)号：US20090170227A1
公开(公告)日：2009-07-02
申请号：US12362461
申请日：2009-01-29
申请人： Shunpei YAMAZAKI , Junichiro SAKATA , Hideaki KUWABARA
发明人： Shunpei YAMAZAKI , Junichiro SAKATA , Hideaki KUWABARA
IPC分类号： H01L33/00 , H01L21/50
CPC分类号： G03F1/66 , C23C14/042 , G03F7/70741 , H01L51/0011
摘要： The present invention provides a large mask with a high mask accuracy for conducting selective deposition on a substrate with a large surface area. In accordance with the present invention, the mask body is fixed in a fixing position disposed on a line passing through a thermal expansion center in the width of the mask frame. Further, in accordance with the present invention, the substrate and mask body are fixed and deposition is carried out by moving the deposition source in the X direction or Y direction. A method comprising moving the deposition source in the X direction or Y direction is suitable for deposition on large substrates.
摘要翻译：本发明提供了具有高掩模精度的大掩模，用于在具有大表面积的基板上进行选择性沉积。根据本发明，掩模体固定在布置在通过荫罩框架的宽度的热膨胀中心的线上的固定位置。此外，根据本发明，通过在X方向或Y方向移动沉积源来固定基板和掩模体并进行沉积。包括在X方向或Y方向上移动沉积源的方法适合于沉积在大的衬底上。

134. 发明申请

US20090159885A1 DIODE AND DISPLAY DEVICE INCLUDING DIODE 有权
标题翻译：二极管和显示器件，包括二极管
公开(公告)号：US20090159885A1
公开(公告)日：2009-06-25
申请号：US12336614
申请日：2008-12-17
申请人： Shunpei YAMAZAKI , Kunio HOSOYA , Yasutaka SUZUKI , Saishi FUJIKAWA
发明人： Shunpei YAMAZAKI , Kunio HOSOYA , Yasutaka SUZUKI , Saishi FUJIKAWA
IPC分类号： H01L29/861 , H01L29/04
CPC分类号： H01L29/66765 , H01L27/1222 , H01L27/124 , H01L29/04 , H01L29/458 , H01L29/4908 , H01L29/78696
摘要： A thin film transistor which includes a microcrystalline semiconductor film over a gate electrode with a gate insulating film interposed therebetween to be in an inner region in which end portions of microcrystalline semiconductor film are in an inside of end portions of the gate electrode, an amorphous semiconductor film which covers top and side surfaces of the microcrystalline semiconductor film, and an impurity semiconductor film to which an impurity element imparting one conductivity is added, and which forms a source region and a drain region, wherein the microcrystalline semiconductor film includes an impurity element serving as a donor is provided to reduce off current of a thin film transistor, to reduce reverse bias current of a diode, and to improve an image quality of a display device using a thin film transistor.
摘要翻译：一种薄膜晶体管，其在栅极电极上方具有栅极绝缘膜，该微晶半导体膜位于其内部区域，其中微晶半导体膜的端部位于栅电极的端部的内部，非晶半导体覆盖微晶半导体膜的顶表面和侧表面的膜，以及添加了赋予一种导电性的杂质元素的杂质半导体膜，并且形成源区和漏区，其中微晶半导体膜包括供给的杂质元素为了降低薄膜晶体管的电流而减小二极管的反向偏置电流，并且提高使用薄膜晶体管的显示装置的图像质量，作为供体被提供。

135. 发明申请

US20090140438A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090140438A1
公开(公告)日：2009-06-04
申请号：US12325474
申请日：2008-12-01
申请人： Shunpei YAMAZAKI , Hideaki KUWABARA
发明人： Shunpei YAMAZAKI , Hideaki KUWABARA
IPC分类号： H01L23/535 , H01L21/027
CPC分类号： H01L29/42384 , G02F1/13458 , G02F2001/136236 , H01L27/124 , H01L27/1244 , H01L27/1288 , H01L29/04 , H01L29/4908 , H01L29/66765 , H01L29/78696
摘要： Wirings each having a side face with a different angle, which is made accurately, in a desired portion over one mother glass substrate are provided without increasing the steps. With the use of a multi-tone mask, a photoresist layer is formed, which has a tapered shape in which the area of a cross section is reduced gradually in a direction away from one mother glass substrate. At the time of forming one wiring, one photomask is used and a metal film is selectively etched, whereby one wiring having a side face, the shape (specifically, an angle with respect to a principal plane of a substrate) of which is different depending on a place, is obtained.
摘要翻译：在不增加步骤的情况下，提供各自具有在一个母玻璃基板上的期望部分中准确地制成具有不同角度的侧面的布线。通过使用多色调掩模，形成光致抗蚀剂层，其具有锥形形状，其中横截面的面积在远离一个母玻璃基板的方向上逐渐减小。在形成一个布线时，使用一个光掩模，并且选择性地蚀刻金属膜，由此一个布线具有侧面，其形状（具体地，相对于基板的主平面的角度）根据在某个地方获得。

136. 发明申请

US20090114921A1 THIN FILM TRANSISTOR, AND DISPLAY DEVICE HAVING THE THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管和具有薄膜晶体管的显示器件
公开(公告)号：US20090114921A1
公开(公告)日：2009-05-07
申请号：US12258569
申请日：2008-10-27
申请人： Shunpei YAMAZAKI , Yasuhiro JINBO
发明人： Shunpei YAMAZAKI , Yasuhiro JINBO
IPC分类号： H01L29/04
CPC分类号： H01L29/4908 , H01L29/04 , H01L29/66765 , H01L29/78609 , H01L29/78678 , H01L29/78696
摘要： The thin film transistor includes a gate insulating film formed over a gate electrode; a microcrystalline semiconductor film including an impurity element which serves as a donor, formed over the gate insulating film; a pair of buffer layers formed over the microcrystalline semiconductor film; a pair of semiconductor films to which an impurity element imparting one conductivity type is added, formed over the pair of buffer layers; and wirings formed over the pair of semiconductor films to which an impurity element imparting one conductivity type is added. The concentration of the impurity element which serves as a donor in the microcrystalline semiconductor film is decreased from the gate insulating film side toward the buffer layers, and the buffer layers do not include the impurity element which serves as a donor at a higher concentration than the detection limit of SIMS.
摘要翻译：薄膜晶体管包括形成在栅电极上的栅极绝缘膜; 包括形成在所述栅极绝缘膜上的用作供体的杂质元素的微晶半导体膜; 形成在所述微晶半导体膜上的一对缓冲层; 在一对缓冲层上形成一对添加有赋予一种导电类型的杂质元素的半导体膜; 并且在添加有赋予一种导电类型的杂质元素的一对半导体膜上形成的布线。作为微晶半导体膜中的供体的杂质元素的浓度从栅极绝缘膜侧朝向缓冲层减少，缓冲层不包含作为供体的杂质元素，其浓度高于 SIMS检测限。

137. 发明申请

US20090104750A1 METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, DISPLAY PANEL, AND DISPLAY DEVICE 有权
标题翻译：用于制造半导体衬底，显示面板和显示装置的方法
公开(公告)号：US20090104750A1
公开(公告)日：2009-04-23
申请号：US12253301
申请日：2008-10-17
申请人： Shunpei YAMAZAKI , Hideto OHNUMA , Jun KOYAMA
发明人： Shunpei YAMAZAKI , Hideto OHNUMA , Jun KOYAMA
IPC分类号： H01L21/762
CPC分类号： H01L27/1266 , C03C17/3435 , C03C17/3482 , C03C2218/32 , H01L21/76254 , H01L27/1214 , H01L29/66772 , Y10S438/938 , Y10S438/961
摘要： If the size of a single crystal silicon layer attached is not appropriate, even when a large glass substrate is used, the number of panels to be obtained cannot be maximized. Therefore, in the present invention, a substantially quadrangular single crystal semiconductor substrate is formed from a substantially circular single crystal semiconductor wafer, and a damaged layer is formed by irradiation with an ion beam into the single crystal semiconductor substrate. A plurality of the single crystal semiconductor substrates are arranged so as to be separated from each other over one surface of a supporting substrate. By thermal treatment, a crack is generated in the damaged layer and the single crystal semiconductor substrate is separated while a single semiconductor layer is left over the supporting substrate. After that, one or a plurality of display panels is manufactured from the single crystal semiconductor layer bonded to the supporting substrate.
摘要翻译：如果附着的单晶硅层的尺寸不合适，即使使用大的玻璃基板，也不能使要获得的面板的数量最大化。因此，在本发明中，从大致圆形的单晶半导体晶片形成大致四边形的单晶半导体基板，通过将离子束照射到单晶半导体基板中形成损伤层。多个单晶半导体基板被布置成在支撑基板的一个表面上彼此分离。通过热处理，在损伤层中产生裂纹，并且单个半导体衬底被分离，而单个半导体层留在支撑衬底上。之后，从结合到支撑基板的单晶半导体层制造一个或多个显示面板。

138. 发明申请

US20090098709A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090098709A1
公开(公告)日：2009-04-16
申请号：US12240186
申请日：2008-09-29
申请人： Hideto OHNUMA , Yoichi IIKUBO , Shunpei YAMAZAKI
发明人： Hideto OHNUMA , Yoichi IIKUBO , Shunpei YAMAZAKI
IPC分类号： H01L21/762
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214 , H01L29/66772
摘要： To provide a method of manufacturing a semiconductor device, which prevents impurities from entering an SOI substrate. A source gas including one or plural kinds selected from a hydrogen gas, a helium gas, or halogen gas are excited to generate ions, and the ions are added to a bonding substrate to thereby form a fragile layer in the bonding substrate. Then, a region of the bonding substrate that is on and near the surface thereof, i.e., a region ranging from a shallower position than the fragile layer to the surface is removed by etching, polishing, or the like. Next, after attaching the bonding substrate to a base substrate, the bonding substrate is separated at the fragile layer to thereby form a semiconductor film over the base substrate. After forming the semiconductor film over the base substrate, a semiconductor element is formed using the semiconductor film.
摘要翻译：提供一种防止杂质进入SOI衬底的半导体器件的制造方法。激发包括选自氢气，氦气或卤素气体中的一种或多种的源气体以产生离子，并将离子加入到接合衬底中，从而在接合衬底中形成脆性层。然后，通过蚀刻，抛光等除去在其表面上及其附近，即从比脆弱层更浅的位置到表面的区域的接合基板的区域。接下来，在将接合基板粘贴到基底基板上之后，在脆性层分离接合基板，从而在基底基板上形成半导体膜。在基底基板上形成半导体膜之后，使用半导体膜形成半导体元件。

139. 发明申请

US20090098690A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20090098690A1
公开(公告)日：2009-04-16
申请号：US12247439
申请日：2008-10-08
申请人： Shunpei YAMAZAKI , Takeshi SHICHI , Naoki SUZUKI
发明人： Shunpei YAMAZAKI , Takeshi SHICHI , Naoki SUZUKI
IPC分类号： H01L21/336
CPC分类号： H01L27/1266 , H01L27/1214 , H01L29/66772 , H01L29/78621
摘要： To realize high 2 performance and low power consumption of a semiconductor device by controlling electric characteristics of a transistor in accordance with a required function. Further, to manufacture such a semiconductor device with high yield and high productivity without complicating a manufacturing process. An impurity element imparting one conductivity type is added to a first semiconductor wafer in order to control the threshold voltage of a transistor included in the semiconductor device, before separating a single crystal semiconductor layer used as a channel formation region of the transistor from the first semiconductor wafer and transferring the single crystal semiconductor layer to a second semiconductor wafer.
摘要翻译：通过根据所需功能控制晶体管的电特性来实现半导体器件的高性能和低功耗。此外，制造这种半导体器件的产率高，生产率高，而不会使制造工艺复杂化。在将用作晶体管的沟道形成区域的单晶半导体层与第一半导体分离之前，向第一半导体晶片添加赋予一种导电类型的杂质元素，以便控制包括在半导体器件中的晶体管的阈值电压并将单晶半导体层转移到第二半导体晶片。

140. 发明申请

US20090081845A1 MANUFACTURING METHOD OF SUBSTRATE PROVIDED WITH SEMICONDUCTOR FILMS 有权
标题翻译：具有半导体膜的衬底的制造方法
公开(公告)号：US20090081845A1
公开(公告)日：2009-03-26
申请号：US12211951
申请日：2008-09-17
申请人： Shunpei YAMAZAKI , Makoto FURUNO
发明人： Shunpei YAMAZAKI , Makoto FURUNO
IPC分类号： H01L21/762
CPC分类号： H01L21/02002 , H01L21/76254
摘要： A plurality of rectangular single crystal semiconductor substrates are prepared. Each of the single crystal semiconductor substrates is doped with hydrogen ions and a damaged region is formed at a desired depth, and a bonding layer is formed on a surface thereof. The plurality of single crystal substrates with the damaged regions formed therein and the bonding layers formed thereover are arranged on a tray. Depression portions for holding the single crystal semiconductor substrates are formed in the tray. With the single crystal semiconductor substrates arranged on the tray, the plurality of single crystal semiconductor substrates with the damaged regions formed therein and the bonding layers formed thereover are bonded to a base substrate. By performing heat treatment and dividing the single crystal semiconductor substrates along the damaged regions, the plurality of single crystal semiconductor layers that are sliced are formed over the base substrate.
摘要翻译：制备多个矩形单晶半导体衬底。每个单晶半导体衬底都掺杂有氢离子，并且在期望的深度上形成损伤区域，并且在其表面上形成接合层。其中形成有损伤区域的多个单晶基板和形成在其上的接合层布置在托盘上。用于保持单晶半导体衬底的凹陷部分形成在托盘中。利用布置在托盘上的单晶半导体衬底，其中形成有损坏区域的多个单晶半导体衬底和其上形成的接合层被接合到基底衬底。通过对损伤区域进行热处理和分割单晶半导体基板，在基底基板上形成切片的多个单晶半导体层。

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