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1. 发明申请

US20090194771A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090194771A1
公开(公告)日：2009-08-06
申请号：US12421840
申请日：2009-04-10
申请人： Jun KOYAMA , Koji DAIRIKI , Susumu OKAZAKI , Yoshitaka MORIYA , Shunpei YAMAZAKI
发明人： Jun KOYAMA , Koji DAIRIKI , Susumu OKAZAKI , Yoshitaka MORIYA , Shunpei YAMAZAKI
IPC分类号： H01L33/00 , H01L27/088 , H01L23/52
CPC分类号： H01L27/1266 , H01L27/1214 , H01L27/1218 , H01L27/1255 , H01L27/283 , H01L29/78603 , H01L51/0097 , H01L2224/16225 , H01L2924/12044 , Y02E10/549 , Y02P70/521 , H01L2924/00
摘要： An object of the present invention is to provide a semiconductor device which has flexibility and resistance to a physical change such as bending and a method for manufacturing the semiconductor device. A semiconductor device of the present invention includes a plurality of transistors provided over a flexible substrate, each of which has a semiconductor film, a gate electrode provided over the semiconductor film with a gate insulating film therebetween, and an interlayer insulating film provided to cover the gate electrode, and a bending portion provided between the plurality of transistors, in which the bending portion is provided by filling an opening formed in the interlayer insulating film with a material having a lower elastic modulus, a material having a lower glass transition point, or a material having a higher plasticity than that of the interlayer insulating film.
摘要翻译：本发明的目的是提供一种具有柔性和抗弯曲等物理变化的半导体器件以及半导体器件的制造方法。本发明的半导体器件包括设置在柔性基板上的多个晶体管，每个晶体管具有半导体膜，在半导体膜之间设置有栅极绝缘膜的栅电极和设置成覆盖该半导体膜的层间绝缘膜栅电极和设置在多个晶体管之间的弯曲部分，其中通过用具有较低弹性模量的材料填充形成在层间绝缘膜中的开口，具有较低玻璃化转变点的材料，或者具有比层间绝缘膜高的塑性的材料。

2. 发明申请

US20090057672A1 DISPLAY DEVICE AND MANUFACTURING METHOD OF THE SAME 有权
标题翻译：其显示装置及其制造方法
公开(公告)号：US20090057672A1
公开(公告)日：2009-03-05
申请号：US12196798
申请日：2008-08-22
申请人： Satoshi KOBAYASHI , Ikuko KAWAMATA , Koji DAIRIKI , Shigeki KOMORI , Toshiyuki ISA , Shunpei YAMAZAKI
发明人： Satoshi KOBAYASHI , Ikuko KAWAMATA , Koji DAIRIKI , Shigeki KOMORI , Toshiyuki ISA , Shunpei YAMAZAKI
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： H01L29/04 , H01L29/41733 , H01L29/4908 , H01L29/66765 , H01L29/78696
摘要： A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.
摘要翻译：一种包括具有高电特性和高可靠性的薄膜晶体管的显示装置，以及具有高批量生产率的显示装置的制造方法。在包括反交错通道停止型薄膜晶体管的显示装置中，反交错通道停止型薄膜晶体管包括包含沟道形成区的微晶半导体膜，以及含有杂质元素的杂质区在微晶半导体膜的沟道形成区域中，在不与源极和漏极重叠的区域中选择性地提供一种导电型。

3. 发明申请

US20110059562A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20110059562A1
公开(公告)日：2011-03-10
申请号：US12944841
申请日：2010-11-12
申请人： Shunpei YAMAZAKI , Sachiaki TEDUKA , Satoshi TORIUMI , Makoto FURUNO , Yasuhiro JINBO , Koji DAIRIKI , Hideaki KUWABARA
发明人： Shunpei YAMAZAKI , Sachiaki TEDUKA , Satoshi TORIUMI , Makoto FURUNO , Yasuhiro JINBO , Koji DAIRIKI , Hideaki KUWABARA
IPC分类号： H01L21/336
CPC分类号： C23C16/515 , C23C16/509 , H01L27/1288 , H01L29/04 , H01L29/458 , H01L29/4908 , H01L29/78696
摘要： An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film.
摘要翻译：本发明的目的是提供一种在大面积基板上具有优良质量的微晶半导体膜的制造方法。在栅电极上形成栅极绝缘膜之后，为了提高在初始阶段形成的微晶半导体膜的质量，通过提供具有不同频率的高频功率并且膜的下部附近产生辉光放电等离子体在第一成膜条件下形成具有栅极绝缘膜的界面，其成膜速率低，但是导致良好的膜质量。此后，在成膜速度较高的第二成膜条件下沉积膜的上部，并且还在微晶半导体膜上层叠缓冲层。

4. 发明申请

US20100127261A1 THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管
公开(公告)号：US20100127261A1
公开(公告)日：2010-05-27
申请号：US12467005
申请日：2009-05-15
申请人： Shunpei YAMAZAKI , Koji DAIRIKI , Hidekazu MIYAIRI , Akiharu MIYANAGA , Takuya HIROHASHI
发明人： Shunpei YAMAZAKI , Koji DAIRIKI , Hidekazu MIYAIRI , Akiharu MIYANAGA , Takuya HIROHASHI
IPC分类号： H01L29/786
CPC分类号： H01L29/78696 , H01L27/1288 , H01L29/66765 , H01L29/78669
摘要： The thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode, an amorphous semiconductor layer over the gate insulating layer, a semiconductor layer including an impurity element imparting one conductivity type over the amorphous semiconductor layer. The amorphous semiconductor layer comprises an NH radical. Defects of the amorphous semiconductor layer are reduced by cross-linking dangling bonds with the NH radical in the amorphous semiconductor layer.
摘要翻译：薄膜晶体管包括在具有绝缘表面的衬底上，覆盖栅电极的栅极绝缘层，栅极绝缘层上的非晶半导体层，包括在非晶半导体层上赋予一种导电类型的杂质元素的半导体层。非晶半导体层包含NH自由基。通过与非晶半导体层中的NH自由基交联悬挂键来减少非晶半导体层的缺陷。

5. 发明申请

US20090321737A1 THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管
公开(公告)号：US20090321737A1
公开(公告)日：2009-12-31
申请号：US12490447
申请日：2009-06-24
申请人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI , Takuya HIROHASHI
发明人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI , Takuya HIROHASHI
IPC分类号： H01L29/04
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
摘要翻译：至少在源区和漏区侧，薄膜晶体管包括作为缓冲层的半导体层，该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

6. 发明申请

US20100059748A1 METHOD FOR MANUFACTURING THIN FILM INTEGRATED CIRCUIT, AND ELEMENT SUBSTRATE 有权
标题翻译：制造薄膜集成电路和元件基板的方法
公开(公告)号：US20100059748A1
公开(公告)日：2010-03-11
申请号：US12613650
申请日：2009-11-06
申请人： Shunpei YAMAZAKI , Koji DAIRIKI
发明人： Shunpei YAMAZAKI , Koji DAIRIKI
IPC分类号： H01L29/04 , H01L21/50 , H01L25/16
CPC分类号： H01L27/1266 , G06K19/07749 , G06K19/07758 , H01L21/02667 , H01L21/02675 , H01L21/2026 , H01L27/1214 , H01L27/13 , H01L29/66757 , H01L29/78675
摘要： Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. In view of the above described object, one feature of the invention is to provide the steps of forming a separation layer over an insulating substrate and forming a thin film integrated circuit having a semiconductor film as an active region over the separation layer, wherein the thin film integrated circuit is not separated. There is less limitation on the shape of a mother substrate in the case of using the insulating substrate, when compared with the case of taking a chip out of a circular silicon wafer. Accordingly, reduction in cost of an IC chip can be achieved.
摘要翻译：预期由硅晶片形成的IC芯片的应用形式和需求将增加，并且需要进一步降低成本。本发明的目的是提供一种IC芯片的结构和能够以较低成本生产的方法。鉴于上述目的，本发明的一个特征是提供在绝缘基板上形成分离层并形成薄膜集成电路的步骤，该薄膜集成电路具有半导体薄膜作为分离层上的活性区域，其中薄的胶片集成电路不分离。与使用圆形硅晶片的情况相比，在使用绝缘基板的情况下，母基板的形状受到限制。因此，可以实现IC芯片的成本降低。

7. 发明申请

US20100029068A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE PRODUCTION SYSTEM 有权
标题翻译：半导体器件和半导体器件生产系统
公开(公告)号：US20100029068A1
公开(公告)日：2010-02-04
申请号：US12533401
申请日：2009-07-31
申请人： Atsuo ISOBE , Shunpei YAMAZAKI , Koji DAIRIKI , Hiroshi SHIBATA , Chiho KOKUBO , Tatsuya ARAO , Masahiko HAYAKAWA , Hidekazu MIYAIRI , Akihisa SHIMOMURA , Koichiro TANAKA , Mai AKIBA
发明人： Atsuo ISOBE , Shunpei YAMAZAKI , Koji DAIRIKI , Hiroshi SHIBATA , Chiho KOKUBO , Tatsuya ARAO , Masahiko HAYAKAWA , Hidekazu MIYAIRI , Akihisa SHIMOMURA , Koichiro TANAKA , Mai AKIBA
IPC分类号： H01L21/311 , H01L21/20
CPC分类号： H01L27/1222 , B23K26/0738 , H01L21/02354 , H01L21/02356 , H01L21/02675 , H01L21/02683 , H01L21/02686 , H01L21/02691 , H01L21/2026 , H01L21/32139 , H01L21/84 , H01L27/1214 , H01L27/1218 , H01L27/124 , H01L27/1255 , H01L27/1274 , H01L27/1281 , H01L27/1296 , H01L29/66757 , H01L29/78603 , H01L29/78675 , H01L29/78696 , Y10S118/90 , Y10T117/10 , Y10T117/1004 , Y10T117/1008
摘要： A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
摘要翻译：提供了一种使用激光晶化方法的半导体器件制造系统，其可以避免在TFT的沟道形成区域中形成晶界，从而防止晶界大大降低TFT的迁移率，降低导通电流，并且提高截止电流。在绝缘膜上形成矩形或条纹图案凹陷和突出部分。在绝缘膜上形成半导体膜。通过沿着条形图案凹陷和绝缘膜的突出部分沿着矩形的长轴或短轴方向运行激光来对连续波激光照射半导体膜。尽管在激光中最优选连续波激光，但也可以在照射半导体膜时使用脉冲振荡激光。

8. 发明申请

US20090321743A1 THIN FILM TRANSISTOR, SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE 有权
标题翻译：薄膜晶体管，半导体器件和电子器件
公开(公告)号：US20090321743A1
公开(公告)日：2009-12-31
申请号：US12490458
申请日：2009-06-24
申请人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI
发明人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI
IPC分类号： H01L29/786
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes, as a buffer layer, an amorphous semiconductor layer having nitrogen or an NH group between a gate insulating layer and source and drain regions and at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
摘要翻译：薄膜晶体管包括作为缓冲层的至少在源极和漏极区域上具有氮或NH基的非晶半导体层，栅极绝缘层与源极和漏极区之间。与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

9. 发明申请

US20090218572A1 THIN-FILM TRANSISTOR AND DISPLAY DEVICE 有权
标题翻译：薄膜晶体管和显示器件
公开(公告)号：US20090218572A1
公开(公告)日：2009-09-03
申请号：US12390954
申请日：2009-02-23
申请人： Koji DAIRIKI , Hidekazu MIYAIRI , Yoshiyuki KUROKAWA , Shunpei YAMAZAKI , Hiromichi GODO , Daisuke KAWAE , Satoshi KOBAYASHI
发明人： Koji DAIRIKI , Hidekazu MIYAIRI , Yoshiyuki KUROKAWA , Shunpei YAMAZAKI , Hiromichi GODO , Daisuke KAWAE , Satoshi KOBAYASHI
IPC分类号： H01L33/00 , H01L29/786
CPC分类号： H01L29/78609 , H01L29/04 , H01L29/41733 , H01L29/4908 , H01L29/66765 , H01L29/78618 , H01L29/78669
摘要： A thin-film transistor in which problems with ON-state current and OFF-state current are solved, and a thin-film transistor capable of high-speed operation. The thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions, provided with a space therebetween so as to be overlapped with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of semiconductor layers in which an impurity element which serves as an acceptor is added, overlapped over the gate insulating layers with the gate electrode and the impurity semiconductor layers, and disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer being in contact with the gate insulating layer and the pair of semiconductor layers and extended between the pair of semiconductor layers.
摘要翻译：解决了导通状态电流和截止电流的问题的薄膜晶体管，以及能够进行高速运转的薄膜晶体管。薄膜晶体管包括一对杂质半导体层，其中添加赋予一种导电类型的杂质元素以形成源极和漏极区域，其间具有间隔，以便与具有栅极绝缘层的栅电极重叠插入在栅电极和杂质半导体层之间; 添加作为受体的杂质元素的一对半导体层，与栅极电极和杂质半导体层重叠在栅极绝缘层上，并且在沟道长度方向上间隔设置; 以及与所述栅绝缘层和所述一对半导体层接触并在所述一对半导体层之间延伸的非晶半导体层。

10. 发明申请

US20120064677A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120064677A1
公开(公告)日：2012-03-15
申请号：US13225703
申请日：2011-09-06
申请人： Hidekazu MIYAIRI , Koji DAIRIKI , Shunpei YAMAZAKI , Ryo ARASAWA
发明人： Hidekazu MIYAIRI , Koji DAIRIKI , Shunpei YAMAZAKI , Ryo ARASAWA
IPC分类号： H01L21/336
CPC分类号： H01L29/78678 , H01L29/66765 , H01L29/78606 , H01L29/78648 , H01L29/78669 , H01L29/78696
摘要： Provided is a method for manufacturing a semiconductor device with fewer masks and in a simple process. A gate electrode is formed. A gate insulating film, a semiconductor film, an impurity semiconductor film, and a conductive film are stacked in this order, covering the gate electrode. A source electrode and a drain electrode are formed by processing the conductive film. A source region, a drain region, and a semiconductor layer, an upper part of a portion of which does not overlap with the source region and the drain region is removed, are formed by processing the upper part of the semiconductor film, while the impurity semiconductor film is divided. A passivation film over the gate insulating film, the semiconductor layer, the source region, the drain region, the source electrode, and the drain electrode are formed. An etching mask is formed over the passivation film. At least the passivation film and the semiconductor layer are processed to have an island shape while an opening reaching the source electrode or the drain electrode is formed, with the use of the etching mask. The etching mask is removed. A pixel electrode is formed over the gate insulating film and the passivation film.
摘要翻译：提供一种用于制造具有较少掩模的半导体器件的方法，并且在简单的过程中。形成栅电极。依次层叠栅绝缘膜，半导体膜，杂质半导体膜和导电膜，覆盖栅电极。通过处理导电膜形成源电极和漏电极。通过处理半导体膜的上部，形成源区域，漏极区域和半导体层，其部分的上部不与源极区域和漏极区域重叠，而杂质半导体薄膜被划分。形成栅极绝缘膜，半导体层，源极区域，漏极区域，源极电极和漏极电极之后的钝化膜。在钝化膜上形成蚀刻掩模。通过使用蚀刻掩模，至少钝化膜和半导体层被加工成具有岛状，同时形成到达源电极或漏电极的开口。去除蚀刻掩模。在栅极绝缘膜和钝化膜上形成像素电极。

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