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131. 发明授权

US07972970B2 Fabrication of semiconductor interconnect structure 有权
标题翻译：半导体互连结构的制造
公开(公告)号：US07972970B2
公开(公告)日：2011-07-05
申请号：US11888312
申请日：2007-07-30
申请人： Steven T. Mayer , Daniel A. Koos , Eric Webb
发明人： Steven T. Mayer , Daniel A. Koos , Eric Webb
IPC分类号： H01L21/302
CPC分类号： C23F1/02 , C23C18/1608 , C23C18/1834 , C23F1/18 , C23F1/34 , H01L21/288 , H01L21/32134 , H01L21/76849 , H01L21/76856 , H01L21/76858 , H01L21/76883 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that is subsequently removed from the surface of the substrate. The exposed metal may be oxidized by using solutions containing oxidizing agents such as peroxides or by using oxidizing gases such as those containing oxygen or ozone. The metal oxide produced is then removed using suitable metal oxide etching agents such as glycine. The oxidation and etching may occur in the same solution. In other embodiments, the exposed metal is directly etched without forming a metal oxide. Suitable direct metal etching agents include any number of acidic solutions. The process allows for controlled oxidation and/or etching with reduced pitting. After the metal regions are etched and recessed in the substrate surface, a conductive capping layer is formed using electroless deposition over the recessed exposed metal regions.
摘要翻译：描述了用于选择性地蚀刻衬底的暴露的金属表面并在金属表面上形成导电覆盖层的蚀刻工艺。在一些实施例中，蚀刻工艺涉及暴露的金属的氧化以形成随后从衬底的表面去除的金属氧化物。暴露的金属可以通过使用含有氧化剂如过氧化物的溶液或通过使用氧化气体例如含氧或臭氧的氧化气体来氧化。然后使用合适的金属氧化物蚀刻剂如甘氨酸除去所产生的金属氧化物。氧化和蚀刻可能发生在相同的溶液中。在其它实施例中，暴露的金属被直接蚀刻而不形成金属氧化物。合适的直接金属蚀刻剂包括任何数量的酸性溶液。该方法允许减少点蚀的受控氧化和/或蚀刻。在金属区域被蚀刻并凹入基板表面之后，使用无电沉积形成在凹入的暴露的金属区域上的导电覆盖层。

132. 发明授权

US07947163B2 Photoresist-free metal deposition 有权
标题翻译：无光致抗蚀剂金属沉积
公开(公告)号：US07947163B2
公开(公告)日：2011-05-24
申请号：US11890541
申请日：2007-08-06
申请人： Steven T. Mayer , John Stephen Drewery , Eric G. Webb
发明人： Steven T. Mayer , John Stephen Drewery , Eric G. Webb
IPC分类号： C25F3/14
CPC分类号： C25D5/022 , C25F5/00 , H05K3/07 , H05K3/108 , H05K2203/0108 , H05K2203/0392 , H05K2203/0537 , H05K2203/0713
摘要： Selectively accelerated or selectively inhibited metal deposition is performed to form metal structures of an electronic device. A desired pattern of an accelerator or of an inhibitor is applied to the substrate; for example, by stamping the substrate with a patterned stamp or spraying a solution using an inkjet printer. In other embodiments, a global layer of accelerator or inhibitor is applied to a substrate and selectively modified in a desired pattern. Thereafter, selective metal deposition is performed.
摘要翻译：进行选择性加速或选择性抑制金属沉积以形成电子器件的金属结构。将所需的促进剂或抑制剂的图案施加到基材上; 例如，通过用图案化的印模冲压基板或使用喷墨打印机喷涂溶液。在其它实施方案中，将全局加速剂或抑制剂层施加到基底上并以期望的图案选择性地修饰。此后，进行选择性金属沉积。

133. 发明授权

US07799200B1 Selective electrochemical accelerator removal 有权
标题翻译：选择性电化学促进剂去除
公开(公告)号：US07799200B1
公开(公告)日：2010-09-21
申请号：US11544957
申请日：2006-10-05
申请人： Steven T. Mayer , John Drewery , Richard S. Hill , Timothy Archer , Avishai Kepten
发明人： Steven T. Mayer , John Drewery , Richard S. Hill , Timothy Archer , Avishai Kepten
IPC分类号： C25F3/00 , H01L21/288 , B23H3/00
CPC分类号： B23H5/08 , C25F3/16 , H01L21/02068 , H01L21/2885 , H01L21/32115 , H01L21/7684
摘要： Methods and apparatus are provided for planar metal plating on a workpiece having a surface with recessed regions and exposed surface regions; comprising the steps of: causing a plating accelerator to become attached to said surface including the recessed and exposed surface regions; selectively removing the plating accelerator from the exposed surface regions without performing substantial metal plating on the surface; and after removal of plating accelerator is at least partially complete, plating metal onto the surface, whereby the plating accelerator remaining attached to the surface increases the rate of metal plating in the recessed regions relative to the rate of metal plating in the exposed surface regions.
摘要翻译：提供了用于在具有凹陷区域和暴露表面区域的表面的工件上进行平面金属电镀的方法和装置; 包括以下步骤：使电镀加速器附着到包括凹入和暴露的表面区域的所述表面; 选择性地从暴露的表面区域去除电镀加速器，而不在表面上进行实质的金属电镀; 在去除电镀促进剂至少部分完成后，将金属镀在表面上，由此保持附着在表面上的电镀加速剂相对于露出的表面区域中的金属电镀速率增加凹陷区域中的金属电镀速率。

134. 发明授权

US07686935B2 Pad-assisted electropolishing 失效
标题翻译：垫辅助电解抛光
公开(公告)号：US07686935B2
公开(公告)日：2010-03-30
申请号：US11213190
申请日：2005-08-26
申请人： Steven T. Mayer , Julia Svirchevski , John Stephen Drewery
发明人： Steven T. Mayer , Julia Svirchevski , John Stephen Drewery
IPC分类号： B23H5/06
CPC分类号： C25F3/30 , H01L21/32115 , H01L21/32125 , H01L21/6715
摘要： Pad-assisted electropolishing of the substrate is conducted by performing anodic dissolution of metal at a first portion of the substrate and simultaneously mechanically buffing a second portion of the substrate with a buffing pad. Anodic dissolution includes forming a thin liquid layer of electropolishing liquid between the anodic substrate and a cathodic electropolishing head. The location of electrical contacts between the substrate and power supply allow peripheral edge regions of the substrate to be mechanically buffed with the pad. Preferably, a substrate is further planararized using an isotropic material-removal technique. An apparatus includes an electropolishing head that is movable to a position proximate to a first portion of a substrate to form a thin gap, and a buffing pad that mechanically buffs a second portion of the substrate using minimal pressure.
摘要翻译：通过在衬底的第一部分处执行金属的阳极溶解并且用抛光垫同时机械抛光衬底的第二部分来进行衬底辅助电抛光。阳极溶解包括在阳极底物和阴极电解抛光头之间形成电解抛光液体的薄液体层。基板和电源之间的电触点的位置允许基板的外围边缘区域被该机械抛光。优选地，使用各向同性材料去除技术进一步平坦化基底。一种设备包括电抛光头，该电抛光头可移动到接近基底的第一部分的位置以形成薄间隙;以及抛光垫，其利用最小的压力机械地抛光所述基底的第二部分。

135. 发明申请

US20100015805A1 Wet Etching Methods for Copper Removal and Planarization in Semiconductor Processing 失效
标题翻译：半导体加工中铜去除和平面化的湿蚀刻方法
公开(公告)号：US20100015805A1
公开(公告)日：2010-01-21
申请号：US12535594
申请日：2009-08-04
申请人： Steven T. Mayer , Eric Webb , David W. Porter
发明人： Steven T. Mayer , Eric Webb , David W. Porter
IPC分类号： H01L21/304 , H01L21/306
CPC分类号： C23F1/18 , C23F1/02 , C23F1/34 , C23F3/04 , C25D5/48 , C25D7/123 , C25D17/001 , H01L21/02074 , H01L21/288 , H01L21/32115 , H01L21/32134 , H01L21/67051 , H01L21/6708 , H01L21/76849 , H01L21/76856 , H01L21/76858 , H01L21/76883 , H01L21/76898 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Exposed copper regions on a semiconductor substrate can be etched by a wet etching solution comprising (i) one or more complexing agents selected from the group consisting of bidentate, tridentate, and quadridentate complexing agents; and (ii) an oxidizer, at a pH of between about 5 and 12. In many embodiments, the etching is substantially isotropic and occurs without visible formation of insoluble species on the surface of copper. The etching is useful in a number of processes in semiconductor fabrication, including for partial or complete removal of copper overburden, for planarization of copper surfaces, and for forming recesses in copper-filled damascene features. Examples of suitable etching solutions include solutions comprising a diamine (e.g., ethylenediamine) and/or a triamine (e.g., diethylenetriamine) as bidentate and tridentate complexing agents respectively and hydrogen peroxide as an oxidizer. In some embodiments, the etching solutions further include pH adjustors, such as sulfuric acid, aminoacids, and carboxylic acids.
摘要翻译：可以通过湿式蚀刻溶液蚀刻半导体衬底上的暴露的铜区域，所述湿蚀刻溶液包含（i）一种或多种选自二齿，三齿和四齿络合剂的络合剂; 和（ii）pH在约5和12之间的氧化剂。在许多实施方案中，蚀刻基本上是各向同性的，并且在铜的表面上没有可见的不可见物质形成。该蚀刻在半导体制造中的许多工艺中是有用的，包括部分或全部去除铜覆盖层，用于铜表面的平坦化，以及用于在铜填充的镶嵌特征中形成凹陷。合适的蚀刻溶液的实例包括分别作为二齿和三齿络合剂的二胺（例如乙二胺）和/或三胺（例如二亚乙基三胺）和作为氧化剂的过氧化氢的溶液。在一些实施方案中，蚀刻溶液还包括pH调节剂，例如硫酸，氨基酸和羧酸。

136. 发明申请

US20090280649A1 Topography reduction and control by selective accelerator removal 有权
公开(公告)号：US20090280649A1
公开(公告)日：2009-11-12
申请号：US11890790
申请日：2007-08-06
申请人： Steven T. Mayer , Mark L. Rea , Richard S. Hill , Avishai Kepten , R. Marshall Stowell , Eric G. Webb
发明人： Steven T. Mayer , Mark L. Rea , Richard S. Hill , Avishai Kepten , R. Marshall Stowell , Eric G. Webb
IPC分类号： H01L21/44 , C25D17/00 , H01L21/306
CPC分类号： C25D17/14 , B23H5/08 , C25D5/02 , C25D5/06 , C25D5/08 , C25D5/34 , C25D7/123 , C25D17/001 , C25D17/06 , C25F3/16 , C25F3/30 , H01L21/02068 , H01L21/2885 , H01L21/32115 , H01L21/3212 , H01L21/32134 , H01L21/7684 , H01L21/76849 , H01L21/76877
摘要： Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal protrusion over the metal-filled wide-feature cavity is higher than the height of metal over field regions. Most of the overburden metal is removed using non-contact techniques, such as chemical wet etching. Metal above the wide feature cavity protects the metal-filled wide-feature interconnect against dishing, and improved planarization techniques avoid erosion of the metal interconnect and dielectric insulating layer. In some embodiments, plating of metal onto a substrate is conducted to fill narrow (e.g., high-aspect-ratio feature cavities) in the dielectric layer before selective application of plating accelerator and filling of the wide feature cavity.

137. 发明申请

US20090277802A1 Pad-assisted electropolishing 失效
公开(公告)号：US20090277802A1
公开(公告)日：2009-11-12
申请号：US11213190
申请日：2005-08-26
申请人： Steven T. Mayer , Julia Svirchevski , John Stephen Drewery
发明人： Steven T. Mayer , Julia Svirchevski , John Stephen Drewery
IPC分类号： B23H5/08
CPC分类号： C25F3/30 , H01L21/32115 , H01L21/32125 , H01L21/6715
摘要： Pad-assisted electropolishing of the substrate is conducted by performing anodic dissolution of metal at a first portion of the substrate and simultaneously mechanically buffing a second portion of the substrate with a buffing pad. Anodic dissolution includes forming a thin liquid layer of electropolishing liquid between the anodic substrate and a cathodic electropolishing head. The location of electrical contacts between the substrate and power supply allow peripheral edge regions of the substrate to be mechanically buffed with the pad. Preferably, a substrate is further planararized using an isotropic material-removal technique. An apparatus includes an electropolishing head that is movable to a position proximate to a first portion of a substrate to form a thin gap, and a buffing pad that mechanically buffs a second portion of the substrate using minimal pressure.

138. 发明授权

US06755954B2 Electrochemical treatment of integrated circuit substrates using concentric anodes and variable field shaping elements 有权
标题翻译：使用同心阳极和可变场成形元件的集成电路基板的电化学处理
公开(公告)号：US06755954B2
公开(公告)日：2004-06-29
申请号：US10116077
申请日：2002-04-04
申请人： Steven T. Mayer , Timothy Patrick Cleary , Michael John Janicki , Edmund B. Minshall , Thomas A. Ponnuswamy
发明人： Steven T. Mayer , Timothy Patrick Cleary , Michael John Janicki , Edmund B. Minshall , Thomas A. Ponnuswamy
IPC分类号： C25D500
CPC分类号： C25D17/08 , C25D7/123 , C25D17/001 , C25D17/008 , C25D17/12 , Y10S204/07
摘要： An apparatus for electrochemical treatment of a substrate, in particular for electroplating an integrated circuit wafer. An apparatus preferably includes dynamically operable concentric anodes and dielectric shields in an electrochemical bath. Preferably, the bath height of an electrochemical bath, the substrate height, and the shape and positions of an insert shield and a diffuser shield are dynamically variable during electrochemical treatment operations. Step include varying anode current, bath height and substrate height, shield shape, and shield position.
摘要翻译：一种用于电化学处理衬底的装置，特别是用于电镀集成电路晶片。设备优选地包括在电化学浴中的动态可操作的同心阳极和介电屏蔽。优选地，在电化学处理操作期间，电化学浴的浴高度，基底高度以及插入物屏蔽件和扩散器护罩的形状和位置是动态可变的。步骤包括改变阳极电流，浴槽高度和衬底高度，屏蔽形状和屏蔽位置。

139. 发明授权

US06551483B1 Method for potential controlled electroplating of fine patterns on semiconductor wafers 有权
标题翻译：在半导体晶片上精细图案的电位控制电镀方法
公开(公告)号：US06551483B1
公开(公告)日：2003-04-22
申请号：US09853959
申请日：2001-05-10
申请人： Steven T. Mayer , Jonathan Reid , Robert Contolini
发明人： Steven T. Mayer , Jonathan Reid , Robert Contolini
IPC分类号： C25D2112
CPC分类号： H01L21/2885 , C25D5/18 , C25D7/123
摘要： Controlled-potential electroplating provides an effective method of electroplating metals onto the surfaces of high aspect ratio recessed features of integrated circuit devices. Methods are provided to mitigate corrosion of a metal seed layer on recessed features due to contact of the seed layer with an electrolyte solution. The potential can also be controlled to provide conformal plating over the seed layer and bottom-up filling of the recessed features. For each of these processes, a constant cathodic voltage, pulsed cathodic voltage, or ramped cathodic voltage can be used. An apparatus for controlled-potential electroplating includes a reference electrode placed near the surface to be plated and at least one cathode sense lead to measure the potential at points on the circumference of the integrated circuit structure.
摘要翻译：控制电位电镀提供了将金属电镀到集成电路器件的高纵横比凹陷特征的表面上的有效方法。提供了一种方法，用于减轻由于种子层与电解质溶液的接触而导致的凹陷特征上的金属种子层的腐蚀。还可以控制电位以在种子层上提供适形电镀，并且自下而上地填充凹陷特征。对于这些处理中的每一个，可以使用恒定的阴极电压，脉冲阴极电压或斜坡阴极电压。用于控制电位电镀的装置包括放置在待镀表面附近的参考电极和至少一个阴极检测引线，以测量集成电路结构的圆周上的点处的电位。

140. 发明授权

US06537416B1 Wafer chuck for use in edge bevel removal of copper from silicon wafers 有权
标题翻译：用于从硅晶片去除铜的边缘斜面的晶片卡盘
公开(公告)号：US06537416B1
公开(公告)日：2003-03-25
申请号：US09558249
申请日：2000-04-25
申请人： Steven T. Mayer , Steve Taatjes , Andy McCutcheon , Jim Schall , Jinbin Feng
发明人： Steven T. Mayer , Steve Taatjes , Andy McCutcheon , Jim Schall , Jinbin Feng
IPC分类号： C23F100
CPC分类号： H01L21/6708 , H01L21/67051
摘要： A wafer chuck includes alignment members that allows a semiconductor wafer to be properly aligned on the chuck without using a separate alignment stage. The alignment members may be cams, for example, attached to arms of the wafer chuck. These members may assume an alignment position when a robot arm places the wafer on the chuck. In this position, they guide the wafer into a proper alignment position with respect to the chuck. During rotation at a particular rotational speed, the alignment members move away from the wafer to allow liquid etchant to flow over the entire edge region of the wafer. At still higher rotational speeds, the wafer is clamped into position to prevent it from flying off the chuck. A clamping cam or other device (such as the alignment member itself) may provide the clamping.
摘要翻译：晶片卡盘包括对准部件，其允许半导体晶片在不使用单独的对准阶段的情况下适当地对准卡盘。对准构件可以是凸轮，例如，附接到晶片卡盘的臂。当机器人臂将晶片放置在卡盘上时，这些构件可以采取对准位置。在这个位置上，它们将晶片引导到相对于卡盘的适当对准位置。在以特定转速旋转期间，对准构件远离晶片移动以允许液体蚀刻剂流过晶片的整个边缘区域。在更高的旋转速度下，晶片被夹紧就位以防止其从卡盘上飞走。夹紧凸轮或其他装置（例如对准构件本身）可以提供夹紧。

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