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131. 发明授权

US08156460B2 Method of estimating a leakage current in a semiconductor device 有权
标题翻译：估计半导体器件中漏电流的方法
公开(公告)号：US08156460B2
公开(公告)日：2012-04-10
申请号：US12547729
申请日：2009-08-26
申请人： Kyung-Tae Do , Jung-Yun Choi , Bong-Hyun Lee , Young-Hwan Kim , Hyo-Sig Won , Wook Kim
发明人： Kyung-Tae Do , Jung-Yun Choi , Bong-Hyun Lee , Young-Hwan Kim , Hyo-Sig Won , Wook Kim
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： In a method of estimating a leakage current in a semiconductor device, a chip including a plurality of cells is divided into segments by a grid model. Spatial correlation is determined as spatial correlation between process parameters concerned with the leakage currents in each of the cells. A virtual cell leakage characteristic function of a cell is generated by arithmetically operating actual leakage characteristic functions. A segment leakage characteristic function of a segment is generated by arithmetically operating the virtual cell leakage characteristic functions of all cells in the segment. Then, a full chip leakage characteristic function of the chip is generated by statistically operating the segment leakage characteristic functions of all segments in the chip. Accordingly, computational loads of Wilkinson's method for generating the full chip leakage characteristic function can remarkably be reduced.
摘要翻译：在估计半导体器件中的漏电流的方法中，包括多个单元的芯片通过栅格模型被划分为段。空间相关性被确定为与每个单元中的泄漏电流有关的工艺参数之间的空间相关性。通过算术运算实际泄漏特性函数产生单元的虚拟单元泄漏特性函数。通过对片段中所有单元的虚拟单元泄漏特性函数进行算术运算，产生段的段泄漏特性函数。然后，通过统计操作芯片中所有段的段泄漏特性函数来产生芯片的全芯片泄漏特性功能。因此，Wilkinson用于产生全芯片泄漏特性功能的方法的计算负载可以显着降低。

132. 发明申请

US20120051978A1 PREFABRICATED VOL-OXIDIZER FOR SPENT NUCLEAR FUEL FOR CONVENIENT OPERATION AND MAINTENANCE 有权
标题翻译：用于易于操作和维护的预燃核燃料的预制氧化剂
公开(公告)号：US20120051978A1
公开(公告)日：2012-03-01
申请号：US13105010
申请日：2011-05-11
申请人： Young Hwan Kim , Geun Il Park , Jae Hoo Jung , Jung Won Lee , Ki Ho Kim , Young Soon Lee , Do Youn Lee
发明人： Young Hwan Kim , Geun Il Park , Jae Hoo Jung , Jung Won Lee , Ki Ho Kim , Young Soon Lee , Do Youn Lee
IPC分类号： G21C1/01
CPC分类号： G21C19/44 , Y02W30/882
摘要： A vol-oxidizer for spent nuclear fuel is provided. The vol-oxidizer includes a reactor module in which the spent nuclear fuel is put and oxidized; a heating module to heat the reactor module to a high temperature; a utility module to control an inner state of the reactor module, being connected with the reactor module; a support module to support the heating module and the reactor module; a drive module to supply a driving force for transferring the spent nuclear fuel within the reactor module; a valve module to control discharge of the spent nuclear fuel being oxidized in the reactor module; and a collecting container module to collect the spent nuclear fuel being oxidized and discharged from the reactor module. The respective modules are assembled and disassembled with respect to one another.
摘要翻译：提供了用于乏核燃料的挥发氧化剂。体积氧化剂包括反应堆模块，其中废核燃料被放置和氧化; 将反应器模块加热到高温的加热模块; 用于控制反应堆模块的内部状态的实用模块，与反应堆模块连接; 支撑模块，用于支撑加热模块和反应堆模块; 驱动模块，用于提供用于在所述反应堆模块内传送废核燃料的驱动力; 阀模块，用于控制在所述反应堆模块中被氧化的废核燃料的排放; 以及收集容器模块，用于收集从反应器模块氧化和排出的废核燃料。相应的模块相对于彼此组装和拆卸。

133. 发明申请

US20120001217A1 COMPOSITION FOR LIGHT-EMITTING PARTICLE-POLYMER COMPOSITE, LIGHT-EMITTING PARTICLE-POLYMER COMPOSITE, AND DEVICE INCLUDING THE LIGHT-EMITTING PARTICLE-POLYMER COMPOSITE 审中-公开
标题翻译：用于发光颗粒聚合物复合材料的组合物，发光颗粒聚合物复合材料和包括发光颗粒聚合物复合材料的装置
公开(公告)号：US20120001217A1
公开(公告)日：2012-01-05
申请号：US13175133
申请日：2011-07-01
申请人： Hyun A. KANG , Eun Joo JANG , Young Hwan KIM , Shin Ae JUN , Hyo Sook JANG
发明人： Hyun A. KANG , Eun Joo JANG , Young Hwan KIM , Shin Ae JUN , Hyo Sook JANG
IPC分类号： H01L33/52 , C09K11/54 , C09K11/02 , B82Y99/00
CPC分类号： C08G75/045 , C08L81/02 , C09K11/02 , C09K11/56 , C09K11/70 , C09K11/883 , H01L33/501 , H01L2224/16145 , H01L2224/48091 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
摘要： A composition for manufacture of a light emitting particle-polymer composite, the composition including a light emitting particle, a first monomer including at least two thiol groups, each located at a terminal end of the first monomer, and a second monomer including at least two unsaturated carbon-carbon bonds, each located at a terminal end of the second monomer.
摘要翻译：用于制造发光粒子 - 聚合物复合材料的组合物，所述组合物包含发光粒子，包含至少两个硫醇基团的第一单体，每个位于第一单体的末端，第二单体包含至少两个不饱和碳 - 碳键，各自位于第二单体的末端。

134. 发明授权

US08046724B2 Method of timing criticality calculation for statistical timing optimization of VLSI circuit 有权
标题翻译： VLSI电路统计时序优化的定时临界计算方法
公开(公告)号：US08046724B2
公开(公告)日：2011-10-25
申请号：US12474547
申请日：2009-05-29
申请人： Hyoun Soo Park , Young Hwan Kim , Dai Joon Hyun , Wook Kim
发明人： Hyoun Soo Park , Young Hwan Kim , Dai Joon Hyun , Wook Kim
IPC分类号： G06F9/455 , G06F17/50
CPC分类号： G06F17/5031 , G06F17/505
摘要： Provided is a method of optimizing statistical timing of an integration circuit, the method including applying subtle changes of mean arrival times with respect to each of nodes in a timing graph of an integrated circuit to ADD operations and MAX operations of a block-based statistical static timing analysis (SSTA) method and approximating the corresponding operations; generating Jacobian matrixes between each node by using matrix components including differential coefficients calculated during linear approximation of the operations; calculating changed arrival time values of the circuit by propagating the Jacobian matrixes from a virtual sink node to a virtual source node; and calculating timing yield criticalities, which are variances of timing yield of the circuit due to subtle changes of mean arrival times with respect to each node, based on values obtained by the propagation. Accordingly, timing yield criticality is calculated based on linear approximation of ADD operations and MAX operations of statistical static timing analysis (SSTA), and thus the calculation complexity is linear with respect to the total number of nodes, and critical nodes significantly affecting the timing yield of a circuit can be extracted more accurately.
摘要翻译：提供了一种优化集成电路的统计定时的方法，该方法包括对集成电路的定时图中的每个节点应用平均到达时间的微妙变化，以ADD操作和基于块的统计静态的MAX操作时序分析（SSTA）方法和近似相应的操作; 通过使用包括在操作的线性近似期间计算的微分系数的矩阵分量来生成每个节点之间的雅可比矩阵; 通过将雅可比矩阵从虚拟汇聚节点传播到虚拟源节点来计算电路的改变的到达时间值; 以及基于通过传播获得的值，计算由于平均到达时间相对于每个节点的微妙变化而导致的电路的定时收益率的定时收益率临界。因此，基于统计静态时序分析（SSTA）的ADD操作和MAX操作的线性近似来计算定时收益关键性，因此计算复杂度相对于总节点数是线性的，关键节点显着影响定时收益可以更准确地提取电路。

135. 发明申请

US20110241044A1 LIQUID CRYSTAL DISPLAY DEVICE INCLUDING WHITE LIGHT EMITTING DIODE 有权
标题翻译：液晶显示装置，包括白光发光二极管
公开(公告)号：US20110241044A1
公开(公告)日：2011-10-06
申请号：US12969935
申请日：2010-12-16
申请人： Eun-Joo JANG , Young-Hwan KIM , Shin-Ae JUN , Hyo-Sook JANG , Seok-Hwan HONG , Soo-Kyung KWON
发明人： Eun-Joo JANG , Young-Hwan KIM , Shin-Ae JUN , Hyo-Sook JANG , Seok-Hwan HONG , Soo-Kyung KWON
IPC分类号： H01L33/50 , H01L33/00
CPC分类号： H01L33/504 , C09K11/02 , C09K11/565 , C09K11/883 , G02F1/133603 , G02F2001/133614 , H01L33/505 , Y02B20/181
摘要： A white light emitting diode and a liquid crystal display device that realizes images using the white light are provided. The white light emitting diode includes a blue light emitting diode (“LED”) light source, and a light conversion layer which converts incident light from the LED light source into white light. The light conversion layer includes green light emitting semiconductor nanocrystal and red light emitting semiconductor nanocrystal. A light emitting peak wavelength of the green light emitting semiconductor nanocrystal is about 520 nanometer (nm) or more, a light emitting peak wavelength of the red semiconductor nanocrystal is about 610 nanometer (nm) or more, and full width at half maximums (FWHMs) of light emitting peaks of the green and red light emitting semiconductor nanocrystals are about 45 nanometer (nm) or less.
摘要翻译：提供了使用白光实现图像的白色发光二极管和液晶显示装置。白色发光二极管包括蓝色发光二极管（“LED”）光源，以及将来自LED光源的入射光转换成白光的光转换层。光转换层包括绿色发光半导体纳米晶体和红色发光半导体纳米晶体。绿色发光半导体纳米晶体的发光峰值波长为约520nm（nm）以上，红色半导体纳米晶体的发光峰值波长为约610nm（nm）以上，全宽为半峰（FWHMs ）绿色和红色发光半导体纳米晶体的发光峰值约为45纳米（nm）以下。

136. 发明申请

US20110149202A1 LIGHT GUIDE PLATE FOR DISPLAYING THREE-DIMENSIONAL IMAGE, AND THREE-DIMENSIONAL IMAGE DISPLAY APPARATUS EMPLOYING THE SAME 有权
标题翻译：用于显示三维图像的光导板和使用其的三维图像显示装置
公开(公告)号：US20110149202A1
公开(公告)日：2011-06-23
申请号：US12969838
申请日：2010-12-16
申请人： Byung-hee SOHN , Young-hwan Kim , Hong-seok Lee , Hee-kyung Kim
发明人： Byung-hee SOHN , Young-hwan Kim , Hong-seok Lee , Hee-kyung Kim
IPC分类号： G02F1/1335 , F21V8/00
CPC分类号： G02B6/0065 , G02B6/0036 , G02B27/225
摘要： A light guide plate for displaying a three-dimensional (3D) image, and a 3D image display apparatus employing the same. The light guide plate includes a transparent body formed in a flat panel shape, and for guiding light with total internal reflection in the transparent body; and a plurality of viewing zone separation units aligned inside the transparent body. Light incident on two side surfaces of the light guide plate is separated into different viewing zones by reflective surfaces of the viewing zone separation units.
摘要翻译：用于显示三维（3D）图像的导光板，以及采用该导光板的3D图像显示装置。导光板包括形成为平板形状的透明体，并且用于将全反射的光引导到透明体中; 以及在透明体内对准的多个观察区分离单元。入射在导光板的两个侧表面上的光被观察区分离单元的反射表面分离成不同的观察区。

137. 发明申请

US20100306724A1 METHOD OF INCREMENTAL STATISTICAL STATIC TIMING ANALYSIS BASED ON TIMING YIELD 有权
标题翻译：基于时序的增量统计静态时序分析方法
公开(公告)号：US20100306724A1
公开(公告)日：2010-12-02
申请号：US12475545
申请日：2009-05-31
申请人： Jinwook Kim , Young Hwan Kim , Wook Kim
发明人： Jinwook Kim , Young Hwan Kim , Wook Kim
IPC分类号： G06F17/50
CPC分类号： G06F17/5031 , G06F2217/84
摘要： Provided is a method of incremental SSTA (statistical static timing analysis) of a digital circuit, the method including a first step in which, when a gate is replaced in the digital circuit, delay propagation is performed from a node of a replaced gate to a virtual sink node based on SSTA; a second step in which, if a changed value of a gate timing yield at each gate which propagates delay toward the virtual sink node is smaller than a predetermined threshold value, delay propagation with respect to a fanout gate of the corresponding gate is stopped; and a third step in which, when a delay with respect to the node of the replaced gate is propagated to the virtual sink node, a new timing yield is calculated at the virtual sink node.
摘要翻译：提供了数字电路的增量SSTA（统计静态时序分析）的方法，该方法包括第一步骤，其中当在数字电路中替换门时，从更换的门的节点执行延迟传播基于SSTA的虚拟汇聚节点; 第二步骤，如果在向虚拟汇聚节点传播延迟的每个门的门定时收益的改变值小于预定阈值，则停止相对于相应门的扇出门的延迟传播; 以及第三步骤，当相对于所替换的门的节点的延迟传播到虚拟宿节点时，在虚拟宿节点处计算新的定时收益。

138. 发明授权

US07830213B2 Signal generator, signal generation method, and RF communication system using the same 失效
标题翻译：信号发生器，信号发生方法和使用其的RF通信系统
公开(公告)号：US07830213B2
公开(公告)日：2010-11-09
申请号：US11523534
申请日：2006-09-20
申请人： Sang-Min Han , Seong-soo Lee , Young-hwan Kim , Alexander S. Dmitriev
发明人： Sang-Min Han , Seong-soo Lee , Young-hwan Kim , Alexander S. Dmitriev
IPC分类号： H03B1/00 , H03B5/24 , H03B29/00 , H03C1/00 , H03K3/03 , H03K7/00 , H04L27/00
CPC分类号： H03G3/3036 , H04B1/7174 , H04L27/001
摘要： A signal generator, a signal generation method, and a communication system using the same are provided. The signal generator includes a plurality of nonlinear elements which are connected in a ring; and a signal distributor which is arranged in the ring to form a closed loop, feeds part of a signal to one of the plurality of the nonlinear elements, and outputs signal generated by one of the plurality of nonlinear elements. The method includes arranging a plurality of nonlinear elements connected in a ring; inputting a signal to one of the nonlinear elements; amplifying the signal; receiving the amplified signal and generating a harmonic component of a frequency; clipping the signal; and feeding part of the signal back to one of the nonlinear elements and outputting a remainder of the signal. The system includes a chaotic signal generator; a signal distributor; a modulator; and a transmission circuit.
摘要翻译：提供信号发生器，信号生成方法和使用该信号发生方法的通信系统。信号发生器包括以环形连接的多个非线性元件; 以及信号分配器，其布置在所述环中以形成闭环，将部分信号馈送到所述多个非线性元件中的一个，并输出由所述多个非线性元件之一产生的信号。该方法包括布置连接在环中的多个非线性元件; 将信号输入到非线性元件之一; 放大信号; 接收放大的信号并产生频率的谐波分量; 剪辑信号; 并将信号的一部分馈送回非线性元件中的一个，并输出信号的剩余部分。该系统包括混沌信号发生器; 信号分配器; 调制器和发送电路。

139. 发明授权

US07773637B2 Signal transmitting method and apparatus using length division multiple access 有权
标题翻译：使用长度分割多路访问的信号发送方法和装置
公开(公告)号：US07773637B2
公开(公告)日：2010-08-10
申请号：US11360524
申请日：2006-02-24
申请人： Jae-hyon Kim , Young-hwan Kim , Su Khiong Yong , Seong-soo Lee
发明人： Jae-hyon Kim , Young-hwan Kim , Su Khiong Yong , Seong-soo Lee
IPC分类号： H04J3/06
CPC分类号： H04L27/001
摘要： A method and apparatus for simplifying a structure needed to delay data in delay units when a reference signal and data are transmitted by using chaotic signals are provided. The method includes delaying data by at least two delay times, wherein each of the delay times occurs sequentially; multiplexing the data, which has been delayed, according to a control signal; and transmitting the data and a reference signal which corresponds to the data at an interval of delay time. The apparatus includes a first delay unit which is configured to delay data for a first delay time; a second delay unit which is configured to delay the data output from the first delay unit for a second delay time; and a multiplexer which is configured to multiplex the data from the first and second delay units according to a control signal.
摘要翻译：提供一种用于简化当通过使用混沌信号发送参考信号和数据时以延迟单元延迟数据所需的结构的方法和装置。该方法包括将数据延迟至少两个延迟时间，其中每个延迟时间顺序地发生; 根据控制信号对已被延迟的数据进行多路复用; 并以延迟时间的间隔发送对应于数据的数据和参考信号。该装置包括：第一延迟单元，被配置为延迟第一延迟时间的数据; 第二延迟单元，其被配置为将来自所述第一延迟单元的数据延迟第二延迟时间; 以及多路复用器，被配置为根据控制信号来复用来自第一和第二延迟单元的数据。

140. 发明申请

US20100156371A1 SINGLE SUPPLY PASS GATE LEVEL CONVERTER FOR MULTIPLE SUPPLY VOLTAGE SYSTEM 有权
标题翻译：单电源电压电平转换器多电源电压系统
公开(公告)号：US20100156371A1
公开(公告)日：2010-06-24
申请号：US12639188
申请日：2009-12-16
申请人： Jiyeon An , Young Hwan Kim , Hyoun Soo Park
发明人： Jiyeon An , Young Hwan Kim , Hyoun Soo Park
IPC分类号： G05F1/10
CPC分类号： H03K19/018571
摘要： The present invention relates to a level converter used in a multiple supply voltage system that is required to design a low-power and high-performance semiconductor, and more particularly, to a single supply pass gate level converter (SPLC) for a multiple supply voltage system, which has low power consumption, operates at high speed, and uses only a single supply voltage. The SPLC includes an input data providing circuit unit which receives an input signal of a low supply voltage; a data inversion circuit unit which receives input data from the input data providing circuit unit and outputs inversed input data; a feedback circuit unit which is fed back by an output of the data inversion circuit unit; and a data output buffer which inverses an output of the data inversion circuit unit and outputs an inversed signal. The input data providing circuit unit, the data inversion circuit unit, the feedback circuit unit, and the data output buffer are all driven by a high supply voltage such that only a single supply voltage which is the high supply voltage is required.
摘要翻译：本发明涉及一种用于设计低功率和高性能半导体所需的多电源电压系统中的电平转换器，更具体地说，涉及一种用于多电源电压的单电源通过门电平转换器（SPLC）系统功耗低，运行速度快，仅使用单电源电压。 SPLC包括输入数据提供电路单元，其接收低电源电压的输入信号; 数据反转电路单元，其从输入数据提供电路单元接收输入数据并输出反相输入数据; 反馈电路单元，由数据反转电路单元的输出反馈; 以及数据输出缓冲器，其反转数据反转电路单元的输出并输出反相信号。输入数据提供电路单元，数据反转电路单元，反馈电路单元和数据输出缓冲器均由高电源电压驱动，使得仅需要作为高电源电压的单个电源电压。

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