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121. 发明授权

US5982770A Check system for checking information indicative of connections in multistage switching network 失效
标题翻译：检查系统以检查指示多级交换网络中的连接的信息
公开(公告)号：US5982770A
公开(公告)日：1999-11-09
申请号：US864369
申请日：1997-05-28
申请人： Yasuharu Sekine
发明人： Yasuharu Sekine
IPC分类号： H04Q1/20 , H04Q1/24 , H04Q3/52 , H04Q3/68 , H04L12/50 , H04Q11/00
CPC分类号： H04Q1/24 , H04Q3/68 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13292 , H04Q2213/13393
摘要： In a check system for checking information indicative of connections in a multistage switching network comprising S stages of switching groups and a main control section for controlling the switching groups, the multistage switching network has a switching size of M by N (M.times.N) that is defined by M input lines and N output lines. Each of the switching groups comprises a plurality of switching sections each of which has a plurality of input terminals, a plurality of output terminals, a switching unit for use in connecting these terminals with each other, and a switch control unit for controlling the switching unit. The main control section comprises a memory unit which stores information indicative of connections between the individual switching sections. The main control section has a function of checking whether an output terminal having a specific number of a switching group in a C-th stage (C.ltoreq.(S-1)) can logically be connected to an input terminal having other specific number of a switching group in a (C+1)-th stage, in which the function checks for each connection path in terms of the information that is stored in the memory unit and is indicative of the connections.
摘要翻译：在用于检查指示包括S级切换组的多级交换网络中的连接的信息的检查系统和用于控制交换组的主控制部分的情况下，多级交换网络具有定义为M×N（M×N）的切换大小由M条输入线和N条输出线组成。每个开关组包括多个开关部分，每个开关部分具有多个输入端子，多个输出端子，用于将这些端子彼此连接的开关单元和用于控制开关单元的开关控制单元。主控制部分包括存储指示各个切换部分之间的连接的信息的存储器单元。主控制部分具有检查在第C级具有特定数目的开关组的输出端子（C（S-1））是否可逻辑地连接到具有其他特定数量的输入端子的功能（C + 1）级中的切换组，其中功能根据存储在存储器单元中的信息来检查每个连接路径并指示连接。

122. 发明授权

US5801641A Controller for a non-blocking broadcast network 失效
标题翻译：用于非阻塞广播网络的控制器
公开(公告)号：US5801641A
公开(公告)日：1998-09-01
申请号：US529582
申请日：1995-09-18
申请人： Yuanyuan Yang , Gerald M. Masson
发明人： Yuanyuan Yang , Gerald M. Masson
IPC分类号： H04Q3/68 , H04Q9/00
CPC分类号： H04Q3/68
摘要： A controller for a nonblocking broadcast switching network comprising an input stage, an output stage, and a middle stage. The input stage has N.sub.1 or n.sub.1 r.sub.1 input ports and r.sub.1 switches, where n.sub.1 .gtoreq.2 and r.sub.1 .gtoreq.1 and are integers. The network also includes an output stage. The output stage has N.sub.2 or n.sub.2 r.sub.2 output ports and r.sub.2 switches, where n.sub.2 .gtoreq.2 and r.sub.1 .gtoreq.1 and are integers. There is also a middle stage. The middle stage has m switches, where ##EQU1## The m switches are in communication with the r.sub.1 switches and r.sub.2 switches. The middle stage of m switches has L inputs, where L.gtoreq.r.sub.1 and is an integer, and J outputs, where J.gtoreq.r.sub.2 and is an integer, corresponding to the n.sub.1 input ports and n.sub.2 output ports, x or fewer of the m switches, where 1.ltoreq.x.ltoreq.m, always available to form a connection between an idle input port and a plurality of idle output ports, but no output port is connected to more than 1 input port. In a preferred embodiment, the controller includes a mechanism for determining which middle stage switches are idle at a given time in the network. The controller also includes a mechanism for choosing middle stage switches from only the idle middle stage switches to form a desired broadcast connection between an idle input port and a plurality of idle output ports. Preferably, the mechanism for choosing chooses the minimum number of idle middle stage switches to form the desired broadcast connection.
摘要翻译：一种用于非阻塞广播交换网络的控制器，包括输入级，输出级和中级。输入级有N1或n1r1输入端口和r1开关，其中n1> / = 2和r1> / = 1并且是整数。该网络还包括一个输出级。输出级有N2或n2r2输出端口和r2开关，其中n2> / = 2和r1> / = 1并且是整数。还有一个中间阶段。中间有m个开关，其中开关和r2开关。 m个开关的中间阶段有L个输入，其中L> / = r1是一个整数，J输出，其中J> / = r2是一个整数，对应于n1个输入端口和n2个输出端口，x个或更少的m个开关，其中1

123. 发明授权

US5717871A Crossbar switch with input/output buffers having multiplexed control inputs 失效
标题翻译：具有输入/输出缓冲器的交叉开关具有复用的控制输入
公开(公告)号：US5717871A
公开(公告)日：1998-02-10
申请号：US516319
申请日：1995-08-17
申请人： Wen-Jai Hsieh , Chi-Song Horng , Chun Chiu Daniel Wong , Gerchih Chou , Shrikant Sathe , Kent Dahlgren
发明人： Wen-Jai Hsieh , Chi-Song Horng , Chun Chiu Daniel Wong , Gerchih Chou , Shrikant Sathe , Kent Dahlgren
IPC分类号： G06F13/40 , H04L12/56 , H04Q3/68 , G06F3/00
CPC分类号： G06F13/4022 , H04L49/25 , H04Q3/68 , H04L49/254 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/13106 , H04Q2213/13141 , H04Q2213/13214 , H04Q2213/13292 , H04Q2213/1332 , H04Q2213/13322
摘要： An electronic crossbar switch employs a switch array for selectively routing signals between its terminals. A separate port provided for each terminal buffers signals flowing in and out of the switch. Each port can be configured to operate with or without tristate buffering under control of a tristate control signal, to optionally latch input or output signals in response to clock and clock enable signals, and to buffer signals passing in or out of the switch terminal in response to a direction control signal. A set of control inputs are provided in common to all ports, allowing an external host to transmit control signals in parallel to each port. Each port may be programmed to select any of its control inputs as its tristate, clock enable, clocking or direction control signal. A parallel "key" bus is also provided in common to all ports for conveying a key address from the host controller. Each port stores an internal port address and when the key address matches the port address, the port asserts an internal "KEY" signal. Each port may be configured to use the KEY signal selectively as either its tristate, clock enable, clock or direction control signal.
摘要翻译：电子交叉开关采用开关阵列，用于在其端子之间选择性地路由信号。为每个端子提供的单独端口缓冲流入和流出开关的信号。每个端口可以被配置为在三态控制信号的控制下操作有或没有三态缓冲，以响应于时钟和时钟使能信号来选择性地锁存输入或输出信号，以及响应于缓冲转换到终端的信号到方向控制信号。为所有端口提供一组控制输入，允许外部主机与每个端口并行发送控制信号。每个端口可以被编程为选择其任何控制输入作为其三态，时钟使能，时钟或方向控制信号。还向所有端口提供并行“键”总线，用于从主机控制器传送密钥地址。每个端口存储内部端口地址，当密钥地址与端口地址匹配时，端口置位一个内部“KEY”信号。每个端口可以被配置为选择性地使用KEY信号作为其三态，时钟使能，时钟或方向控制信号。

124. 发明授权

US5604734A ATM-system adapted three stage switching unit 失效
标题翻译： ATM系统采用三级切换单元
公开(公告)号：US5604734A
公开(公告)日：1997-02-18
申请号：US463559
申请日：1995-06-05
申请人： Magnus K. S. Buhrgard
发明人： Magnus K. S. Buhrgard
IPC分类号： H04Q3/00 , H04L12/54 , H04L12/70 , H04L12/933 , H04L12/935 , H04Q3/52 , H04Q3/68 , H04Q11/00 , H04Q11/04 , H04L12/56 , H04J14/08
CPC分类号： H04Q11/0005 , H04L12/5601 , H04L49/1553 , H04L49/1576 , H04L49/3081 , H04Q3/685 , H04L2012/5605 , H04L2012/5679 , H04Q11/0066
摘要： The invention is directed to an ATM-System adapted three-step switching unit, including an input circuit including a number of incoming group related conductors connected to a first switching stage, an output circuit including a number of outgoing group related conductors connected to a second switching stage and a third switching stage. A control unit coacts with said switching stages in order to connect one of said incoming conductors with a selected outgoing conductor by way of a connecting path, pointed out through the third switching stage. Each of the outgoing conductors belonging to the first switching stage coacts with an electro-optical converter. The respective connections between the first switching stage and the third switching stage consist of an optical conductor. The third switching stage is adapted to transfer optical information-carrying signals through the connecting path. The connections between the third switching stage and the second switching stage consist of optical conductors and incoming conductors belonging to said second switching stage, which are pre-connected by an opto-electrical converter.
摘要翻译：本发明涉及一种ATM系统适应的三步切换单元，包括一个输入电路，该输入电路包括连接到第一开关级的多个输入组相关导体，一个输出电路，包括多个输出组相关导体，开关级和第三开关级。控制单元与所述开关级共同作用，以便通过第三开关级指出的连接路径将所述输入导体之一与选定的输出导体连接。属于第一开关级的每个输出导体与电光转换器共同作用。第一开关级和第三开关级之间的相应连接由光导体组成。第三切换级适于通过连接路径传送光信息载体信号。第三开关级和第二开关级之间的连接由属于所述第二开关级的光导体和入射导体组成，其由光电转换器预连接。

125. 发明授权

US5495476A Parallel algorithm to set up benes switch; trading bandwidth for set up time 失效
标题翻译：并行算法设置benes切换; 交易带宽设置时间
公开(公告)号：US5495476A
公开(公告)日：1996-02-27
申请号：US378755
申请日：1995-01-26
申请人： Manoj Kumar
发明人： Manoj Kumar
IPC分类号： H04Q3/68 , H04Q3/18 , H04Q3/32
CPC分类号： H04Q3/68
摘要： Benes networks are very effective in providing inter-processor communication in SIMD parallel machines, provided the communication patterns are compile-time determinable. These networks are ill suited when communication patterns are dynamically varying because of the long set up time requirements. The present invention is a method for handling dynamically varying communication patterns efficiently by operating the Benes network in a time division multiplexed manner, wherein during a given transmission period, the middle stage switches of the Benes network are configured as a portion of the middle stage switches of a Clos network configured to route all signals in a single period.
摘要翻译：如果通信模式是编译时可确定的，Benes网络在SIMD并行机中提供处理器间通信非常有效。当通信模式由于设置时间长的要求而动态变化时，这些网络不合适。本发明是一种通过以时分复用方式操作Benes网络来有效地处理动态变化的通信模式的方法，其中在给定的传输周期期间，Benes网络的中间级交换机被配置为中间级交换机的一部分被配置为在单个周期内路由所有信号的Clos网络。

126. 发明授权

US5495475A Resolution of race conditions in cascaded switches 失效
标题翻译：分级开关中的竞争条件
公开(公告)号：US5495475A
公开(公告)日：1996-02-27
申请号：US394934
申请日：1995-02-27
申请人： Peter A. Franaszek , Martin W. Sachs
发明人： Peter A. Franaszek , Martin W. Sachs
IPC分类号： H04Q3/52 , H04L12/56 , H04M3/00 , H04Q3/545 , H04Q3/68 , H04J3/02
CPC分类号： H04L49/15 , H04Q3/68 , H04L49/101 , H04L49/201 , H04L49/205 , H04L49/254
摘要： A method for resolving race conditions in cascaded switches. More specifically, cross links between the cascaded switches are assigned preferred directions relative to each of the switches. A connection request or a response emanating from a switch will always use a send preference cross link if such link is available.
摘要翻译：一种用于解决级联交换机中的竞态条件的方法。更具体地，级联交换机之间的交叉链路被分配给相对于每个交换机的优选方向。如果此类链接可用，则从交换机发出的连接请求或响应将始终使用发送首选项交叉链接。

127. 发明授权

US5469001A Switch network 失效
标题翻译：切换网络
公开(公告)号：US5469001A
公开(公告)日：1995-11-21
申请号：US156905
申请日：1993-11-24
申请人： Bruno Vaillant
发明人： Bruno Vaillant
IPC分类号： H04Q3/68 , H04L12/00
CPC分类号： H04Q3/68 , Y10T307/492 , Y10T307/74 , Y10T307/747
摘要： A network of switches for a multiple channel installation adapted to establish connections each between one of N input ports and one of T output ports includes: a plurality of cords each having a first end connected to a first nodal switch, a second end connected to a second nodal switch and, between said two ends, at least one cord switch; optionally, a plurality of branches which comprise a switch having one pole at most connected to an input port, two poles available for the connection of output ports and one pole connected to a pole of a nodal switch; and a plurality of nodal switches interconnected by cords, the input and output ports being connected to the available poles of the switches of the network.
摘要翻译：一种用于多通道安装的开关网络，其适于在N个输入端口和T个输出端口中的一个之间建立连接，包括：多个电线，每个电线具有连接到第一节点开关的第一端，第二端连接到第二节点开关，并且在所述两端之间，至少一个线开关; 可选地，包括多个分支，其包括具有一个极点至多连接到输入端口的开关，可用于连接输出端口的两个极点和连接到节点开关的极点的一个极点; 以及由电线互连的多个节点开关，输入和输出端口连接到网络的开关的可用极点。

128. 发明授权

US5414706A Multi-stage switching equipment 失效
标题翻译：多级开关设备
公开(公告)号：US5414706A
公开(公告)日：1995-05-09
申请号：US127448
申请日：1993-09-27
申请人： Johann Muhr
发明人： Johann Muhr
IPC分类号： H04Q3/52 , H04Q3/68 , H04Q11/04
CPC分类号： H04Q3/68
摘要： Multi-stage switching equipment comprises a plurality of n/2n space-division couplers in a first switching matrix stage, "m" x/x space-division couplers combined into a switching matrix in a middle switching matrix stage, and a plurality of 2n/n space-division couplers in a third switching matrix stage and canonically connected intermediate lines between the switching matrix stages are replaced by connecting cables that respectively connect interface output ports of the first switching matrix stage to coupler input ports and coupler output ports to interface input ports of the third switching matrix stage.
摘要翻译：多级交换设备包括在第一交换矩阵级中的多个n / 2n空分分离耦合器，在中间交换矩阵级中组合成开关矩阵的“m”x / x空分耦合器，以及多个2n 在第三开关矩阵级中的/ n个空分耦合器和在开关矩阵级之间的经典连接的中间线由连接电缆代替，所述连接电缆将第一开关矩阵级的接口输出端口连接到耦合器输入端口和耦合器输出端口到接口输入端口的第三个开关矩阵级。

129. 发明授权

US5414696A Cell exchanging apparatus 失效
标题翻译：细胞交换装置
公开(公告)号：US5414696A
公开(公告)日：1995-05-09
申请号：US975104
申请日：1992-11-12
申请人： Munenori Tsuzuki , Hideaki Yamanaka , Hirotaka Saito , Kazuyoshi Oshima
发明人： Munenori Tsuzuki , Hideaki Yamanaka , Hirotaka Saito , Kazuyoshi Oshima
IPC分类号： H04Q3/68 , H04L12/815 , H04L12/863 , H04L12/931 , H04L12/943 , H04Q3/00 , H04Q11/04 , H04J3/14
CPC分类号： H04L12/5601 , H04L49/106 , H04L49/153 , H04L49/405 , H04Q11/0478 , H04L2012/5679 , H04L2012/5681
摘要： An ATM cell exchanging apparatus includes an ATM cell switch for a first system #1 and an ATM cell switch for a second system. These cell switches distribute input cells to appropriate output lines. The system also includes selectors for switching the ATM cell switches in accordance with a selection signal that is output from an external system. The ATM switches output an idle cell when there is no cell to be output. When the selector judges that it is necessary to switch the systems as indicated by the change-over signal, the selector switches the system after it confirms that an idle cell is output from both ATM cell switches. The idle cell that is output indicates that there is no cell stored in either system; thus, it is easy to switch the systems without causing the duplication or omission of a cell.
摘要翻译： ATM信元交换装置包括用于第一系统＃1的ATM信元交换机和用于第二系统的ATM信元交换机。这些单元开关将输入单元分配到适当的输出线。该系统还包括用于根据从外部系统输出的选择信号来切换ATM信元交换机的选择器。当没有单元被输出时，ATM交换机输出一个空闲单元。当选择器判断需要按照切换信号切换系统时，选择器在确认从两个ATM信元交换机输出空闲信元之后切换系统。输出的空闲单元表示两个系统中都没有存储单元; 因此，很容易切换系统而不引起单元的重复或省略。

130. 发明授权

US5408231A Connection path selection method for cross-connect communications networks 失效
标题翻译：交叉连接通信网络的连接路径选择方法
公开(公告)号：US5408231A
公开(公告)日：1995-04-18
申请号：US282705
申请日：1994-07-29
申请人： Edward K. Bowdon
发明人： Edward K. Bowdon
IPC分类号： H04Q3/52 , G06F15/173 , H04L12/56 , H04Q3/545 , H04Q3/68 , H04Q11/04 , H04Q11/06 , H04Q3/00 , H04Q3/495
CPC分类号： H04L12/5601 , H04L49/106 , H04L49/1553 , H04L49/1576 , H04L49/256 , H04Q3/68 , H04Q3/685 , H04J2203/0012 , H04L2012/5627 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/13056 , H04Q2213/13076 , H04Q2213/13141 , H04Q2213/13144 , H04Q2213/13146 , H04Q2213/1334 , H04Q2213/13341
摘要： A method and system for finding a path through a communications matrix represents the assignment of a center stage switch through an input switch to input gates by an input stage array, center stage switch connections between an input stage switch and an output stage switch by a center stage array, and output stage switch connections to output gates by an output stage array, as well as representing idle input switch links to the center stage switches by an idle input array and idle output switch links from the center stage switches by an idle output array. The method and system perform a process of pumping the input stage array, output stage array and center stage array using information in the idle input link array and the idle output link array to determine an optimal center stage switch having both an idle input link between a predetermined input gate and the optimal center stage and an idle output link from the optimal center stage to a predetermined output gate as identified by the idle input link and idle output link arrays. The pumping process relies on the idle input array and idle output array for connection status data. The method and system may be used advantageously with a rearrangeable communications matrix to establish optimal connection configurations during both normal and rearrangement operations.
摘要翻译：用于寻找通过通信矩阵的路径的方法和系统表示通过输入开关将中心级开关分配给输入级阵列的输入门，输入级开关与输出级开关之间的中心级开关连接中心阶段阵列和输出级开关通过输出级阵列连接到输出门，以及通过空闲输入阵列和来自中心级开关的空闲输出开关链路通过空闲输出阵列来表示到中心级开关的空闲输入开关链路。该方法和系统使用空闲输入链路阵列和空闲输出链路阵列中的信息来执行泵浦输入级阵列，输出级阵列和中心级阵列的过程，以确定最佳中心级开关，其具有空载输入链路预定输入门和最佳中心级以及从最佳中心级到由空闲输入链路和空闲输出链路阵列标识的预定输出门的空闲输出链路。泵送过程依赖于空闲输入阵列和空闲输出阵列用于连接状态数据。该方法和系统可以有利地用于可重排通信矩阵，以在正常和重新布置操作期间建立最佳连接配置。

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