专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

111. 发明授权

US2981471A Information manipulating apparatus 失效
标题翻译：信息操纵装置
公开(公告)号：US2981471A
公开(公告)日：1961-04-25
申请号：US70143557
申请日：1957-12-09
申请人： HONEYWELL REGULATOR CO
发明人： EACHUS JOSEPH J
IPC分类号： H03M7/12
CPC分类号： H03M7/12

112. 发明授权

US2924815A Binary decimal translators 失效
标题翻译：二进制十进制翻译器
公开(公告)号：US2924815A
公开(公告)日：1960-02-09
申请号：US46714554
申请日：1954-11-05
申请人： SMITH CORONA MARCHANT INC
发明人： REYNOLDS EUGENE E
IPC分类号： H03M7/12
CPC分类号： H03M7/12

113. 发明授权

US2909993A Printer for calculating unit 失效
标题翻译：打印机用于计算单位
公开(公告)号：US2909993A
公开(公告)日：1959-10-27
申请号：US46959254
申请日：1954-11-18
申请人： IBM
发明人： SHAFER ORVILLE B , ROHLAND WILLIAM S
IPC分类号： G06F11/10 , G06K5/02 , G06K15/00 , H03M7/12
CPC分类号： G06F11/104 , G06K5/02 , G06K15/00 , H03M7/12

114. 发明授权

US2864557A Number converter 失效
标题翻译：数字转换器
公开(公告)号：US2864557A
公开(公告)日：1958-12-16
申请号：US47732554
申请日：1954-12-13
申请人： GEN ELECTRIC
发明人： HOBBS GEORGE W
IPC分类号： H03M7/12
CPC分类号： H03M7/12

115. 发明授权

US2860831A Radix converter 失效
标题翻译：基数转换器
公开(公告)号：US2860831A
公开(公告)日：1958-11-18
申请号：US39928353
申请日：1953-12-21
申请人： GEN ELECTRIC
发明人： HOBBS GEORGE W
IPC分类号： H03M7/12
CPC分类号： H03M7/12

116. 发明授权

US11967973B2 Low overhead transition encoding codes 有权
公开(公告)号：US11967973B2
公开(公告)日：2024-04-23
申请号：US17389146
申请日：2021-07-29
申请人： Samsung Display Co., Ltd.
发明人： Aliazam Abbasfar
IPC分类号： H03M7/12 , H03M5/12 , H03M13/00
CPC分类号： H03M5/12 , H03M13/6502
摘要： A processing circuit configured to: receive original data; partition the original data into a plurality of original q-bit words; assemble a data packet including N original q-bit words from the plurality of original q-bit words; identify a first encoder value and a second encoder value that are absent from the values of the N original q-bit words; encode the N original q-bit words based on a one-to-one mapping from q-bit original values to q-bit encoded values based on the first encoder value and the second encoder value to generate N encoded q-bit payload words, the N encoded q-bit payload words being free of words that are all-zeroes and free of words that are all-ones; generate a key representing the first encoder value and the second encoder value; and transmit the key and the N encoded q-bit payload words.

117. 发明授权

US09665347B2 Apparatus and method for performing conversion operation 有权
公开(公告)号：US09665347B2
公开(公告)日：2017-05-30
申请号：US14582812
申请日：2014-12-24
申请人： ARM Limited
发明人： David Raymond Lutz , Neil Burgess , Christopher Neal Hinds
IPC分类号： G06F5/00 , G06F7/483 , G06F7/499 , G06F9/30 , G06F17/16 , H03M7/12 , H03M7/24 , G06F11/34 , G06F11/36 , G06F5/01 , G06F7/38 , G06F7/48 , G06F7/507 , G06F9/38 , G06F7/506
CPC分类号： G06F7/483 , G06F5/012 , G06F7/38 , G06F7/48 , G06F7/4991 , G06F7/49915 , G06F7/49921 , G06F7/49942 , G06F7/506 , G06F7/507 , G06F9/3001 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30036 , G06F9/30112 , G06F9/3016 , G06F9/30185 , G06F9/30192 , G06F9/3885 , G06F11/3404 , G06F11/3476 , G06F11/348 , G06F11/3636 , G06F11/3644 , G06F11/3648 , G06F17/16 , G06F2201/865 , G06F2207/483 , H03M7/12 , H03M7/24
摘要： An apparatus comprises processing circuitry to perform a conversion operation to convert a vector comprising a plurality of data elements representing respective bit significance portions of a binary value to a scalar value comprising an alternative representation of said binary value.

118. 发明授权

US09455738B2 Decoding a Manchester code without a PLL for short data sequences 有权
标题翻译：对没有PLL的曼彻斯特码进行解码以用于短数据序列
公开(公告)号：US09455738B2
公开(公告)日：2016-09-27
申请号：US14938536
申请日：2015-11-11
申请人： SEW-EURODRIVE GMBH & CO. KG
发明人： Olaf Simon , Steffen Quadt , Michael Müller , Julian Hoffmann
IPC分类号： H03M7/12 , H03M5/12
CPC分类号： H03M5/12
摘要： In a decoding device for a Manchester-encoded signal, at least one moving data average and/or one moving clock average is/are formed relative to mutually differing average times using moving-type averaging units, and from these moving average values, binary output signals are made available as data signal and/or clock signal with the aid of comparators.
摘要翻译：在用于曼彻斯特编码信号的解码装置中，使用运动型平均单元相对于相互不同的平均时间形成至少一个移动数据平均值和/或一个移动时钟平均值，并且根据这些移动平均值，二进制输出借助于比较器，信号可用作数据信号和/或时钟信号。

119. 发明申请

US20160126974A1 APPARATUS AND METHOD FOR PERFORMING CONVERSION OPERATION 有权
标题翻译：用于执行转换操作的装置和方法
公开(公告)号：US20160126974A1
公开(公告)日：2016-05-05
申请号：US14582812
申请日：2014-12-24
申请人： ARM Limited
发明人： David Raymond LUTZ , Neil BURGESS , Christopher Neal HINDS
IPC分类号： H03M7/12 , H03M7/24
CPC分类号： G06F7/483 , G06F5/012 , G06F7/38 , G06F7/48 , G06F7/4991 , G06F7/49915 , G06F7/49921 , G06F7/49942 , G06F7/506 , G06F7/507 , G06F9/3001 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30036 , G06F9/30112 , G06F9/3016 , G06F9/30185 , G06F9/30192 , G06F9/3885 , G06F11/3404 , G06F11/3476 , G06F11/348 , G06F11/3636 , G06F11/3644 , G06F11/3648 , G06F17/16 , G06F2201/865 , G06F2207/483 , H03M7/12 , H03M7/24
摘要： An apparatus comprises processing circuitry to perform a conversion operation to convert a vector comprising a plurality of data elements representing respective bit significance portions of a binary value to a scalar value comprising an alternative representation of said binary value.
摘要翻译：一种装置包括处理电路，以执行转换操作，以将包含表示二进制值的相应比特有效部分的多个数据元素的矢量转换为包括所述二进制值的替代表示的标量值。

120. 发明授权

US08588540B2 Arithmetic encoding apparatus executing normalization and control method 有权
标题翻译：算术编码装置执行归一化和控制方法
公开(公告)号：US08588540B2
公开(公告)日：2013-11-19
申请号：US12440867
申请日：2007-10-30
申请人： Shingo Nozawa
发明人： Shingo Nozawa
IPC分类号： H03M7/26 , H03M7/12 , H04N7/30 , H03M7/30
CPC分类号： H03M7/4006 , H04N19/13
摘要： The number of times of processing to increment the number of reserved bits in arithmetic coding processing is reduced. For this purpose, upon inputting a binary symbol, a zone is divided into two zones at a ratio between occurrence probabilities of MPS and LPS, and one of the divided zones is selected according to the input symbol. When the length of the selected zone is shorter than a predetermined length, normalization is performed. Then it is determined whether or not a threshold for determining a decimal place of interest exists within the zone of interest. When the threshold exists within the zone of interest, the number of reserved bits is incremented by one. When the threshold exists without the zone, 1-bit data determined based on a relative position between the zone of interest and the threshold is outputted, bit data corresponding to the number of reserved bits is determined and outputted, and the number of reserved bits is cleared to zero.
摘要翻译：在算术编码处理中增加保留比特数的处理次数减少。为此，在输入二进制符号时，以MPS和LPS的发生概率之间的比例将区域划分为两个区域，并且根据输入符号选择一个分割区域。当所选区域的长度小于预定长度时，执行归一化。然后确定在感兴趣区域内是否存在用于确定小数位置的阈值。当阈值存在于感兴趣区域内时，保留比特数增加1。当没有区域的情况下存在阈值时，输出基于感兴趣区域和阈值之间的相对位置确定的1位数据，确定并输出与保留位数相对应的位数据，保留位数为清零

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式