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    • 105. 发明授权
    • Surface-coated cutting tool
    • 表面切割工具
    • US07087295B2
    • 2006-08-08
    • US10501527
    • 2003-01-14
    • Yoshio OkadaHideki Moriguchi
    • Yoshio OkadaHideki Moriguchi
    • B23B27/14
    • C23C16/30C23C30/005Y10T428/24942Y10T428/24975Y10T428/265
    • A coated cutting tool can suppress film spalling due to adhesion. The tool has on its substrate an inner layer, intermediate layer, and outer layer. The inner layer is composed of at least one material selected from the group consisting of the carbide, nitride, carbonitride, boride, boronitride, borocarbonitride, oxide, oxycarbide, oxynitride, and oxycarbonitride of the elements belonging to the IVa, Va, and VIa groups. The inner layer includes at least one layer having a columnar-crystal structure. The outer layer is composed of at least one oxide selected from the group consisting of aluminum oxide, zirconium oxide, hafnium oxide, and their solid solutions. The intermediate layer is composed of titanium boronitride, TiBxNy (x, y: atomic %), that satisfies 0.001
    • 涂覆的切削工具可以抑制由于粘附而产生的膜剥落。 该工具在其衬底上具有内层,中间层和外层。 内层由选自属于IVa,Va和VIa族的元素的碳化物,氮化物,碳氮化物,硼化物,氮化硼,硼碳氮化物,氧化物,碳氧化物,氧氮化物和碳氮氧化物中的至少一种材料组成 。 内层包括具有柱状晶体结构的至少一层。 外层由选自氧化铝,氧化锆,氧化铪及其固溶体中的至少一种氧化物构成。 中间层由满足0.001
    • 110. 发明授权
    • Semiconductor integrated circuit with input protection circuit
    • 半导体集成电路与输入保护电路
    • US4849654A
    • 1989-07-18
    • US158728
    • 1988-02-22
    • Yoshio Okada
    • Yoshio Okada
    • H01L27/04H01L21/822H01L21/8238H01L27/02H01L27/092H01L29/78H03K17/08H03K17/16
    • H01L27/0251H03K17/08H03K17/16
    • A semiconductor device having an input protection circuit is disclosed. The semiconductor device includes a power-on reset circuit which generates a pulse having a pulse width determined according to an input surge, applied to an input terminal when an input voltage has risen to a preset level. In response to a pulse generated by the power-on reset circuit, a CMOS inverter supplies a predetermined voltage to the base of a bipolar transistor and controls the bipolar transistor so that it clamps an input voltage supplied thereto to a voltage level lower than the withstanding voltage of the internal circuit in a period corresponding to the pulse width. Thus, the input protection circuit constituted by the bipolar transistor clamps an input voltage, supplied by the input terminal to the internal circuit, to a predetermined level. In this invention, the control circuit activates the bipolar transistor at the time the input voltage rises and keeps it active while the power-on reset circuit is generating a pulse, causing an input surge to be bypassed through the bipolar transistor, during this period of time. Thus, the input voltage can be clamped to a level lower than the withstanding voltage of the internal circuit, protecting the internal circuit, even when a surge voltage higher than the withstanding voltage is generated.
    • 公开了一种具有输入保护电路的半导体器件。 半导体器件包括上电复位电路,其产生具有根据输入浪涌确定的脉冲宽度的脉冲,当输入电压上升到预设电平时,该电源施加到输入端子。 响应于由上电复位电路产生的脉冲,CMOS反相器向双极晶体管的基极提供预定的电压并控制双极晶体管,使得它将所提供的输入电压钳位到低于耐受电压的电压电平 内部电路的电压在与脉冲宽度对应的周期内。 因此,由双极晶体管构成的输入保护电路将由输入端提供的输入电压钳位到内部电路,达到预定的电平。 在本发明中,控制电路在输入电压升高时激活双极晶体管,并且在上电复位电路产生脉冲时保持其活动,从而在该时间段期间使输入浪涌被旁路通过双极晶体管 时间。 因此,即使当产生高于耐受电压的浪涌电压时,输入电压也可以被钳位到比内部电路的耐受电压低的水平,保护内部电路。