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    • 101. 发明申请
    • MEMORY SYSTEM WITH REDUNDANT DATA STORAGE AND ERROR CORRECTION
    • 具有冗余数据存储和错误校正的存储器系统
    • US20110083041A1
    • 2011-04-07
    • US12995297
    • 2008-06-20
    • Michael RohlederGary HayStephan MuellerManfred Thanner
    • Michael RohlederGary HayStephan MuellerManfred Thanner
    • G06F11/14
    • G06F11/167G11C29/74G11C2029/0411
    • A system comprises at least two random access memory (RAM) elements arranged to store data redundantly. The system further comprises RAM routing logic comprising comparison logic operably coupled to the at least two RAM elements and arranged to compare redundant data read from the at least two RAM elements, and check and validation logic, independent of the RAM routing logic, operably coupled to the at least two RAM elements and arranged to additionally detect an error in the redundant data read from the at least two RAM elements and provide an error indication signal to the RAM routing logic in response thereto. The RAM routing logic further comprises selection logic arranged to dynamically select redundant data from one of the at least two RAM elements based on the comparison of the redundant data and the error indication signal.
    • 系统包括被布置为冗余地存储数据的至少两个随机存取存储器(RAM)元件。 所述系统还包括RAM路由逻辑,其包括可操作地耦合到所述至少两个RAM元件的比较逻辑,并且被布置为比较从所述至少两个RAM元素读取的冗余数据,以及独立于所述RAM路由逻辑的检查和验证逻辑,其可操作地耦合到 所述至少两个RAM元件并且被布置为附加地检测从所述至少两个RAM元素读取的冗余数据中的错误,并且响应于此向RAM路由逻辑提供错误指示信号。 RAM路由逻辑还包括选择逻辑,其被布置为基于冗余数据和错误指示信号的比较来动态地从至少两个RAM元素中的一个RAM元素中选择冗余数据。