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91. 发明授权

US07571536B2 Method of making capacitive/resistive devices 有权
标题翻译：制造电容/电阻设备的方法
公开(公告)号：US07571536B2
公开(公告)日：2009-08-11
申请号：US11698423
申请日：2007-01-26
申请人： David Ross McGregor
发明人： David Ross McGregor
IPC分类号： H01C17/28
CPC分类号： H05K1/167 , H01L2924/19105 , H05K1/162 , H05K3/429 , H05K2201/0355 , H05K2201/09309 , H05K2201/09672 , H05K2201/09763 , H05K2203/1453 , Y10T29/49101 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165
摘要： A method of making capacitive/resistive devices provides both resistive and capacitive functions. The capacitive/resistive devices may be embedded within a layer of a printed wiring board. Embedding the capacitive/resistive devices conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability.
摘要翻译：制造电容/电阻器件的方法提供电阻和电容功能。电容/电阻器件可以嵌入印刷线路板的层内。嵌入电容/电阻器件节省了电路板表面的空间，并减少了焊接连接的数量，从而提高了可靠性。

92. 发明申请

US20090175000A1 Halogen-free circuitized substrate with reduced thermal expansion, method of making same, multilayered substrate structure utilizing same, and information handling system utilizing same 有权
标题翻译：具有减少热膨胀的无卤素电路化基板，其制造方法，利用其的多层基板结构以及利用其的信息处理系统
公开(公告)号：US20090175000A1
公开(公告)日：2009-07-09
申请号：US12380618
申请日：2009-03-02
申请人： Robert M. Japp , Voya R. Markovich , Kostas I. Papthomas
发明人： Robert M. Japp , Voya R. Markovich , Kostas I. Papthomas
IPC分类号： H05K7/00 , H05K3/30
CPC分类号： H05K3/4688 , H01L23/145 , H01L23/3733 , H01L23/49833 , H01L2224/16225 , H01L2924/00011 , H01L2924/00014 , H01L2924/15311 , H01L2924/3011 , H05K1/0366 , H05K1/0373 , H05K3/4652 , H05K3/4655 , H05K2201/0209 , H05K2201/0278 , H05K2201/09309 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , H01L2224/0401
摘要： A circuitized substrate including a composite layer comprising a first dielectric sub-layer comprised of a halogen-free resin and fibers dispersed therein and a second dielectric sub-layer without fibers but also including a halogen-free resin with inorganic particulates therein. A method of making such a substrate is also provided, as is a multilayered assembly including one or more such circuitized substrates, possibly in combination with other substrates. An information handling system designed for having one or more such circuitized substrates is also provided.
摘要翻译：一种电路化基板，包括复合层，该复合层包括由不含卤素的树脂和分散在其中的纤维构成的第一介电子层和不含纤维的第二电介质子层，并且还包括无卤素树脂和无机颗粒。还提供了制造这种基板的方法，以及包括一个或多个这样的电路化基板的多层组件，可能与其它基板组合。还提供了设计用于具有一个或多个这样的电路化基板的信息处理系统。

93. 发明申请

US20090173524A1 DUAL DENSITY PRINTED CIRCUIT BOARD ISOLATION PLANES AND METHOD OF MANUFACTURE THEREOF 审中-公开
标题翻译：双密度印刷电路板隔离板及其制造方法
公开(公告)号：US20090173524A1
公开(公告)日：2009-07-09
申请号：US11970360
申请日：2008-01-07
申请人： Chad W. Morgan
发明人： Chad W. Morgan
IPC分类号： H05K1/09 , H05K1/00 , H05K3/00
CPC分类号： H05K3/4623 , H05K1/0218 , H05K1/0253 , H05K1/18 , H05K2201/0723 , H05K2201/0792 , H05K2201/09309 , H05K2201/0969 , H05K2203/1572 , Y10T29/49124
摘要： A conductive power isolation plane for reducing interlayer cross-talk in a printed circuit board between conductive through vias on one side of the printed circuit board and conductive through vias on the other side of the printed circuit board and a method of manufacturing the same. In one embodiment, a printed circuit board includes a (1) conductive power isolation plane interlaminated within a plurality of insulating dielectric layers, (2) a first dielectric layer having a conductive through via laminated to a surface of the plurality of insulating dielectric layers, (3) a second dielectric layer having a conductive through via laminated to a surface of the plurality of insulating dielectric layers opposite the first dielectric layer and (4) a conductive ground via extending through the first dielectric layer, the plurality of insulating layers, including the conductive power isolation plane, and the second dielectric layer.
摘要翻译：一种导电功率隔离平面，用于在印刷电路板的一侧上的导电通孔之间减少印刷电路板中的层间串扰，并且在印刷电路板的另一侧上通过导电孔，以及制造印刷电路板的方法。在一个实施例中，印刷电路板包括层叠在多个绝缘电介质层内的（1）导电功率隔离面，（2）具有层压到多个绝缘介电层的表面的导电通孔的第一介电层，（3）第二电介质层，其具有层压到与所述第一电介质层相对的所述多个绝缘电介质层的表面的导电通孔，以及（4）延伸穿过所述第一介电层的导电接地，所述多个绝缘层包括导电功率隔离面和第二介质层。

94. 发明授权

US07553738B2 Method of fabricating a microelectronic device including embedded thin film capacitor by over-etching thin film capacitor bottom electrode and microelectronic device made according to the method 有权
标题翻译：通过过蚀刻薄膜电容器底部电极和根据该方法制造的微电子器件制造包括嵌入式薄膜电容器的微电子器件的方法
公开(公告)号：US07553738B2
公开(公告)日：2009-06-30
申请号：US11609295
申请日：2006-12-11
申请人： Yongki Min , Huankiat Seh
发明人： Yongki Min , Huankiat Seh
IPC分类号： H01L21/20
CPC分类号： H01G4/33 , H01G4/232 , H01L21/4857 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L27/016 , H01L2924/0002 , H05K1/162 , H05K3/4644 , H05K2201/09309 , H05K2201/09481 , H05K2201/09518 , H05K2201/09718 , H05K2203/1184 , Y10S438/957 , Y10T29/41 , Y10T29/417 , Y10T29/43 , H01L2924/00
摘要： A microelectronic device, a method of fabricating the device, and a system including the device. The method includes: providing a substrate including an underlying conductive layer and a polymer build-up layer overlying the underlying conductive layer; providing a passive microelectronic structure; embedding the passive structure in the polymer build-up layer of the substrate; and patterning the passive structure after embedding, patterning including over-etching the bottom electrode layer. The passive microelectronic structure being embedded includes an unpatterned bottom electrode layer; an unpatterned capacitor dielectric layer overlying the bottom electrode layer; and an unpatterned top electrode layer overlying the capacitor dielectric layer.
摘要翻译：微电子器件，制造该器件的方法以及包括该器件的系统。该方法包括：提供包括下面的导电层和覆盖在下面的导电层上的聚合物堆积层的衬底; 提供无源微电子结构; 将被动结构嵌入衬底的聚合物堆积层中; 并且在嵌入之后图案化被动结构，图案化包括对底部电极层进行过蚀刻。嵌入的被动微电子结构包括未图案化的底电极层; 覆盖底部电极层的未图案化的电容器电介质层; 以及覆盖电容器介电层的未图案化的顶部电极层。

95. 发明申请

US20090159315A1 Wiring substrate 审中-公开
标题翻译：接线基板
公开(公告)号：US20090159315A1
公开(公告)日：2009-06-25
申请号：US12314435
申请日：2008-12-10
申请人： Atsuhisa Fukuoka
发明人： Atsuhisa Fukuoka
IPC分类号： H05K7/20
CPC分类号： H05K1/0272 , H01L2224/16225 , H01L2224/48227 , H01L2224/48465 , H05K1/0203 , H05K1/0207 , H05K2201/064 , H05K2201/09309 , H01L2924/00
摘要： Disclosed herewith is a wiring substrate for releasing a heat generated by an electronic part efficiently through a heat pipe. The wiring substrate of the present invention includes a built-in heat pipe. The substrate also has amounting area. In the mounting area, an IC chip is mounted on a mounting surface. The substrate has a heat pipe formed so that its distance from the mounting area with respect to the mounting surface becomes shorter than its distance from an outside area provided outside the mounting area.
摘要翻译：这里公开了一种用于通过热管有效地释放由电子部件产生的热的布线基板。本发明的布线基板包括内置热管。基材也有相当的面积。在安装区域中，IC芯片安装在安装面上。基板具有形成为使得其相对于安装面的安装区域的距离比距离设置在安装区域外侧的外部区域的距离短的热管。

96. 发明申请

US20090145646A1 Electromagnetic bandgap structure and printed circuit board 有权
标题翻译：电磁带隙结构和印刷电路板
公开(公告)号：US20090145646A1
公开(公告)日：2009-06-11
申请号：US12230871
申请日：2008-09-05
申请人： Mi-Ja Han , Dae-Hyun Park , Han Kim
发明人： Mi-Ja Han , Dae-Hyun Park , Han Kim
IPC分类号： H01G4/228 , H05K1/18
CPC分类号： H01P1/20327 , H01L2224/16225 , H01P1/2005 , H05K1/0236 , H05K2201/09309 , H05K2201/09663 , H05K2201/09681
摘要： According to the present invention, the board can include a dielectric layer; a plurality of conductive plates; and a stitching via, to electrically connect two of the conductive plates to each other. Here, the stitching via can include a first via and a second via, respectively, passing through the dielectric layer and having one end part being placed on a same planar surface as each of the two conductive plates; a connection pattern, having each end part being connected to the other end part of the first via and the second via, respectively; and a first extension pattern, placed on the same planar surface as one of the conductive plates and having one end part being connected to the one end part of the first via and the end part being connected to one of the conductive plates.
摘要翻译：根据本发明，电路板可以包括电介质层; 多个导电板; 以及缝合通孔，以将两个导电板彼此电连接。这里，缝合通孔可以分别包括通过电介质层的第一通孔和第二通孔，并且具有一个端部与两个导电板中的每一个放置在同一平面上; 连接图案，其每个端部分别连接到第一通孔和第二通孔的另一端部; 和第一延伸图案，其放置在与导电板之一相同的平面上，并且具有一个端部连接到第一通孔的一个端部，并且端部连接到导电板之一。

97. 发明申请

US20090090542A1 MULTILAYER PRINTED WIRING BOARD 有权
标题翻译：多层印刷接线板
公开(公告)号：US20090090542A1
公开(公告)日：2009-04-09
申请号：US12272892
申请日：2008-11-18
申请人： Yasushi INAGAKI , Katsuyuki Sano
发明人： Yasushi INAGAKI , Katsuyuki Sano
IPC分类号： H05K1/11
CPC分类号： H05K1/0237 , H01L21/4857 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/5383 , H01L23/66 , H01L24/81 , H01L2223/6616 , H01L2223/6622 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/13111 , H01L2224/16225 , H01L2224/81192 , H01L2224/81801 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01058 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15312 , H01L2924/15787 , H01L2924/19041 , H01L2924/19105 , H01L2924/19106 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/351 , H01L2924/3511 , H05K1/0224 , H05K1/0263 , H05K1/0265 , H05K1/111 , H05K1/115 , H05K1/144 , H05K1/185 , H05K3/4602 , H05K2201/0352 , H05K2201/09309 , H05K2201/09536 , H05K2201/09736 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 μm and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 μm. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved.
摘要翻译：用于高频区域的IC芯片，特别是即使超过3GHz也不发生故障或错误的封装衬底。在芯基板上形成厚度为30μm的导电层，形成层间树脂绝缘层上的导体电路，厚度为15μm。通过增厚导电层，可以增加导体的体积并降低电阻。此外，通过使用导电层作为电源层，可以提高向IC芯片供电的能力。

98. 发明申请

US20090080172A1 Electromagnetic band gap structures and method for making same 有权
标题翻译：电磁带隙结构及其制作方法
公开(公告)号：US20090080172A1
公开(公告)日：2009-03-26
申请号：US11903510
申请日：2007-09-21
申请人： Ali Nadir Arslan , Mikko Ville Samuli Hurskainen
发明人： Ali Nadir Arslan , Mikko Ville Samuli Hurskainen
IPC分类号： H05K9/00
CPC分类号： H05K1/0236 , H05K3/4611 , H05K3/4614 , H05K2201/055 , H05K2201/09309 , H05K2201/09663
摘要： A folded EBG structure has a plurality of cells arranged in a two-dimensional array. Each of the cells has an electrically conductive patch and an electrically conductive via coupled between the patch and a ground plane. In one dimension of the folded EBG structure, at least one patch in that dimension is folded into three sections located in different planes. In general, both ends of the folded EBS structure have folded patches. Via walls having electrically conductive vias are provided on both ends of a folded EBG structure for connecting the cell vias to the ground plane. The distance between each via wall and the folded EBGs is substantially equal to the length of the vias connected to patches.
摘要翻译：折叠的EBG结构具有以二维阵列排列的多个单元。每个电池具有导电贴片和耦合在贴片和接地平面之间的导电通孔。在折叠的EBG结构的一个维度中，该尺寸中的至少一个贴片被折叠成位于不同平面中的三个部分。通常，折叠的EBS结构的两端具有折叠的贴片。具有导电通孔的通孔设置在折叠的EBG结构的两端，用于将电池通孔连接到接地平面。每个通孔壁和折叠的EBG之间的距离基本上等于连接到贴片的通孔的长度。

99. 发明申请

US20090079274A1 Electromagnetic Morphing Apparatus for Hot Pluggable Architected Systems 失效
标题翻译：用于热插拔建筑系统的电磁变形装置
公开(公告)号：US20090079274A1
公开(公告)日：2009-03-26
申请号：US11858663
申请日：2007-09-20
申请人： Moises Cases , Byron L. Krauter , Bhyrav M. Mutnury , Nam H. Pham
发明人： Moises Cases , Byron L. Krauter , Bhyrav M. Mutnury , Nam H. Pham
IPC分类号： H02B1/20 , H01B7/30 , H01R12/16
CPC分类号： H01P1/047 , H01R13/6464 , H05K1/0216 , H05K1/0231 , H05K1/0262 , H05K2201/093 , H05K2201/09309 , H05K2201/09663 , H05K2201/10189
摘要： In electronic devices with signal traces positioned between a ground layer and a voltage reference layer, systems and methods are provided for connecting a hot pluggable device to the electronic device in a manner that diminishes signal degradation due to parasitic effects. The first device has a second reference layer near the connector that connects to a second device voltage reference layer maintained at a given voltage level across the connector. In the first device near the connector the signal trace is positioned in between a ground layer of the first device and the second reference layer which is maintained at a given voltage by a voltage regulator of the second device. The signal return current travels past the second reference layer to a first reference layer of the first device which is maintained by the first device's voltage regulator through AC decoupling capacitors minimizing the current return path discontinuity.
摘要翻译：在具有位于接地层和电压参考层之间的信号迹线的电子设备中，提供了用于以可减少由于寄生效应引起的信号劣化的方式将热可插拔设备连接到电子设备的系统和方法。第一设备具有连接器附近的第二参考层，其连接到跨连接器保持在给定电压电平的第二设备电压参考层。在连接器附近的第一器件中，信号迹线位于第一器件的接地层和由第二器件的电压调节器保持在给定电压之间的第二参考层之间。信号返回电流经过第二参考层行进到第一器件的第一参考层，该第一参考层由第一器件的电压调节器通过AC去耦电容器维持，使电流返回路径不连续性最小化。

100. 发明申请

US20090071709A1 Electromagnetic bandgap structure and printed circuit board including multi-via 有权
标题翻译：电磁带隙结构和印刷电路板，包括多通孔
公开(公告)号：US20090071709A1
公开(公告)日：2009-03-19
申请号：US12076650
申请日：2008-03-20
申请人： Mi-Ja Han , Han Kim , Ja-Bo Koo
发明人： Mi-Ja Han , Han Kim , Ja-Bo Koo
IPC分类号： H05K1/02
CPC分类号： H05K1/0236 , H05K2201/09309 , H05K2201/09627 , H05K2201/09663
摘要： An electromagnetic bandgap structure and a printed circuit board that intercepts to transfer a signal having a predetermined frequency band are disclosed. In particularly, the electromagnetic bandgap structure includes a first metal layer and a second metal layer; a metal plate, placed between the first metal layer and a second metal layer; a multi-via, penetrating the first metal layer, passing through the same planar surface as an outer metal layer and turning toward the first metal layer to connect the metal plate and the first metal layer; and a dielectric layer, stacked in between the first metal layer and the metal plate, between the metal plate and the second metal layer and between the first metal layer and the outer metal layer. With the present invention, a bandgap frequency can be decreased without increasing the size of the metal plate.
摘要翻译：公开了一种电磁带隙结构和用于传送具有预定频带的信号的印刷电路板。特别地，电磁带隙结构包括第一金属层和第二金属层; 金属板，放置在第一金属层和第二金属层之间; 穿过第一金属层的多通孔，穿过与外部金属层相同的平面，并朝着第一金属层转动以连接金属板和第一金属层; 以及电介质层，层叠在所述第一金属层和所述金属板之间，所述金属板与所述第二金属层之间以及所述第一金属层与所述外部金属层之间。通过本发明，可以在不增加金属板的尺寸的情况下降低带隙频率。

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