专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20100308893A1 Semiconductor device and method of operating the same 审中-公开
标题翻译：半导体装置及其操作方法
公开(公告)号：US20100308893A1
公开(公告)日：2010-12-09
申请号：US12662359
申请日：2010-04-13
申请人： Atsuhisa Fukuoka
发明人： Atsuhisa Fukuoka
IPC分类号： H03K17/78
CPC分类号： H03K17/14
摘要： A semiconductor device includes: a high VT part including a first transistor with first threshold voltage; a low VT part including a second transistor with second threshold voltage lower than the first voltage; a temperature detector which measures a temperature of the semiconductor device, determines whether the temperature is in a high temperature state where the temperature is higher than a predetermined temperature or a low temperature state where the temperature is lower than the predetermined temperature, and outputs a signal indicating the high temperature state or the low temperature state; and a controller which receives the signal indicating the high temperature state or the signal indicating the low temperature state, and performs control to cause the high VT part to operate based on the signal indicating the high temperature state and to cause the low VT part to operate based on the signal indicating the low temperature state.
摘要翻译：半导体器件包括：高VT部分，包括具有第一阈值电压的第一晶体管; 低VT部分，包括具有低于第一电压的第二阈值电压的第二晶体管; 测量半导体器件的温度的温度检测器确定温度是否处于温度高于预定温度或温度低于预定温度的低温状态的高温状态，并输出信号表示高温状态或低温状态; 接收指示高温状态的信号或表示低温状态的信号的控制器，根据表示高温状态的信号进行高VT部的动作控制，使低VT部动作基于指示低温状态的信号。

2. 发明申请

US20090159315A1 Wiring substrate 审中-公开
标题翻译：接线基板
公开(公告)号：US20090159315A1
公开(公告)日：2009-06-25
申请号：US12314435
申请日：2008-12-10
申请人： Atsuhisa Fukuoka
发明人： Atsuhisa Fukuoka
IPC分类号： H05K7/20
CPC分类号： H05K1/0272 , H01L2224/16225 , H01L2224/48227 , H01L2224/48465 , H05K1/0203 , H05K1/0207 , H05K2201/064 , H05K2201/09309 , H01L2924/00
摘要： Disclosed herewith is a wiring substrate for releasing a heat generated by an electronic part efficiently through a heat pipe. The wiring substrate of the present invention includes a built-in heat pipe. The substrate also has amounting area. In the mounting area, an IC chip is mounted on a mounting surface. The substrate has a heat pipe formed so that its distance from the mounting area with respect to the mounting surface becomes shorter than its distance from an outside area provided outside the mounting area.
摘要翻译：这里公开了一种用于通过热管有效地释放由电子部件产生的热的布线基板。本发明的布线基板包括内置热管。基材也有相当的面积。在安装区域中，IC芯片安装在安装面上。基板具有形成为使得其相对于安装面的安装区域的距离比距离设置在安装区域外侧的外部区域的距离短的热管。

3. 发明申请

US20100327951A1 Semiconductor integrated circuit 审中-公开
标题翻译：半导体集成电路
公开(公告)号：US20100327951A1
公开(公告)日：2010-12-30
申请号：US12662712
申请日：2010-04-29
申请人： Atsuhisa Fukuoka
发明人： Atsuhisa Fukuoka
IPC分类号： H03K17/14
CPC分类号： H03K17/14 , H03K2217/0036
摘要： A semiconductor integrated circuit includes a first circuit, a second circuit and a control circuit. The first circuit is configured by a first MOS transistor, and a threshold voltage of the first MOS transistor is a first threshold voltage. The second circuit has same logic as the first circuit, and is configured by a second MOS transistor. A threshold voltage of the second MOS transistor is a second threshold voltage, and the second threshold voltage is lower than the first threshold voltage. The control circuit makes one of the first circuit and the second circuit operate depending on a temperature of a chip. The first circuit and the second circuit are installed in a chip.
摘要翻译：半导体集成电路包括第一电路，第二电路和控制电路。第一电路由第一MOS晶体管构成，第一MOS晶体管的阈值电压为第一阈值电压。第二电路具有与第一电路相同的逻辑，并由第二MOS晶体管构成。第二MOS晶体管的阈值电压为第二阈值电压，第二阈值电压低于第一阈值电压。控制电路使得第一电路和第二电路之一根据芯片的温度而工作。第一电路和第二电路安装在芯片中。

4. 发明申请

US20080258292A1 Macro-cell block and semiconductor device 审中-公开
标题翻译：宏单元块和半导体器件
公开(公告)号：US20080258292A1
公开(公告)日：2008-10-23
申请号：US11902745
申请日：2007-09-25
申请人： Atsuhisa Fukuoka
发明人： Atsuhisa Fukuoka
IPC分类号： H01L23/52
CPC分类号： H01L23/5286 , H01L2224/05001 , H01L2224/05026 , H01L2224/0557 , H01L2224/05571 , H01L2224/16225 , H01L2924/00014 , H01L2224/05599 , H01L2224/05099
摘要： There have been cases where the wirings are not led out when a semiconductor chip comprising a conventional macro is mounted on a package substrate.The macro-cell block is a macro-cell block formed polygonal having a plurality of sides and formed in a semiconductor chip, and is characterized by comprising a signal terminal portion, a power terminal portion, and a ground terminal portion, which are connected to the outside of a semiconductor chip, wherein the signal terminal portion is disposed along one side of the plurality of sides, and the power terminal portion is disposed along a side different from the side where the signal terminal portion is disposed, and the ground terminal portion is disposed along a side different from the side where the signal terminal portion is disposed.
摘要翻译：当包括常规宏的半导体芯片安装在封装基板上时，存在布线不被引出的情况。宏单元块是形成为具有多个边并且形成在半导体芯片中的多边形的宏单元块，其特征在于包括信号端子部分，电源端子部分和接地端子部分，其连接到半导体芯片的外部，其中信号端子部分沿着多个侧面的一侧设置，并且电源端子部分沿着与设置信号端子部分的一侧不同的一侧设置，并且接地端子部分沿着与设置信号端子部分的一侧不同的一侧设置。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式