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    • 4. 发明申请
    • Sensor and apparatus for measuring the flow electric potential
    • 用于测量流动电位的传感器和装置
    • US20070103172A1
    • 2007-05-10
    • US11297834
    • 2005-12-07
    • Shin-Jong OhSeung-Ho AhnHyun-Min AhnMyong-Han KimCheol-Han KimSung-Moo Ryew
    • Shin-Jong OhSeung-Ho AhnHyun-Min AhnMyong-Han KimCheol-Han KimSung-Moo Ryew
    • G01R27/26
    • G01N27/221
    • The present invention provides a sensor and apparatus for measuring flow electric potential for evaluation of a degree of electrodeposition of paint applied to the body or chassis of a vehicle. The sensor includes a base plate part, a dielectric polymer member, a positive (+) electrode terminal and a negative (−) electrode terminal, and an insulation part. The base plate part is mounted on the outer and inner body or chassis of a vehicle, and is electrically connected to ground. The dielectric polymer member is patterned and formed on the base plate part. The positive (+) electrode terminal is connected to the dielectric polymer member and is configured to have a positive (+) polarity. The negative (−) electrode terminal is connected to the base plate part and is configured to have a negative (−) polarity. The insulation part is formed to insulate the positive (+) and negative (−) electrode terminals from each other.
    • 本发明提供了一种用于测量流动电位的传感器和装置,用于评估施加到车辆的车身或底盘上的涂料的电沉积程度。 传感器包括基板部分,电介质聚合物部件,正极(+)电极端子和负极( - )电极端子以及绝缘部件。 基板部分安装在车辆的外部和内部主体或底盘上,并且电连接到地面。 介电聚合物构件被图案化并形成在基板部分上。 正(+)电极端子连接到电介质聚合物构件并且被配置为具有正(+)极性。 负( - )电极端子连接到基板部分并且被配置为具有负极( - )极性。 绝缘部分形成为使正极(+)和负极( - )彼此绝缘。
    • 5. 发明授权
    • Nonvolatile memory device and memory system having the same
    • 非易失性存储器件和具有相同的存储器系统
    • US08238160B2
    • 2012-08-07
    • US12639119
    • 2009-12-16
    • Soo-Han KimDae Han Kim
    • Soo-Han KimDae Han Kim
    • G11C16/04
    • G11C11/5642G11C16/26
    • A non-volatile memory device including a cell array having memory cells arranged at intersections of word lines and bit lines; an address decoder configured to select one of the word lines in response to an address; a write circuit configured to write program data in memory cells connected with the selected word line; and a control circuit configured to control the address decoder and the write circuit such that a plurality of band program (write) operations are sequentially executed during a write operation, wherein the control circuit is further configured to select each band write operation the optimal write condition of the next band write operation. A plurality of available write conditions are stored as trim information in a plurality of registers. The control circuit selects the register storing information for performing programming under the optimal write condition.
    • 一种非易失性存储器件,包括具有布置在字线和位线的交点处的存储单元的单元阵列; 地址解码器,被配置为响应于地址选择一条字线; 写入电路,被配置为将程序数据写入与所选择的字线连接的存储器单元中; 以及控制电路,被配置为控制地址解码器和写入电路,使得在写入操作期间顺序地执行多个频带程序(写入)操作,其中所述控制电路还被配置为选择每个频带写入操作的最佳写入条件 的下一个频带写操作。 多个可用写入条件作为修剪信息存储在多个寄存器中。 控制电路选择用于在最佳写入条件下进行编程的寄存器存储信息。
    • 10. 发明申请
    • NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAME
    • 非易失性存储器件和具有该存储器件的存储器系统
    • US20100214843A1
    • 2010-08-26
    • US12639119
    • 2009-12-16
    • Soo-Han KimDae Han Kim
    • Soo-Han KimDae Han Kim
    • G11C16/04
    • G11C11/5642G11C16/26
    • A non-volatile memory device including a cell array having memory cells arranged at intersections of word lines and bit lines; an address decoder configured to select one of the word lines in response to an address; a write circuit configured to write program data in memory cells connected with the selected word line; and a control circuit configured to control the address decoder and the write circuit such that a plurality of band program (write) operations are sequentially executed during a write operation, wherein the control circuit is further configured to select each band write operation the optimal write condition of the next band write operation. A plurality of available write conditions are stored as trim information in a plurality of registers. The control circuit selects the register storing information for performing programming under the optimal write condition.
    • 一种非易失性存储器件,包括具有布置在字线和位线的交点处的存储单元的单元阵列; 地址解码器,被配置为响应于地址选择一条字线; 写入电路,被配置为将程序数据写入与所选择的字线连接的存储器单元中; 以及控制电路,被配置为控制地址解码器和写入电路,使得在写入操作期间顺序地执行多个频带程序(写入)操作,其中所述控制电路还被配置为选择每个频带写入操作的最佳写入条件 的下一个频带写操作。 多个可用写入条件作为修剪信息存储在多个寄存器中。 控制电路选择用于在最佳写入条件下进行编程的寄存器存储信息。