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91. 发明申请

US20060120494A1 Minimal area integrated circuit implementation of a polyphase interpolation filter using coefficients symmetry 有权
标题翻译：使用系数对称的多相插值滤波器的最小面积集成电路实现
公开(公告)号：US20060120494A1
公开(公告)日：2006-06-08
申请号：US11215319
申请日：2005-08-29
申请人： Aditya Bhuvanagiri , Harvinder Singh , Rakesh Malik , Nitin Chawla
发明人： Aditya Bhuvanagiri , Harvinder Singh , Rakesh Malik , Nitin Chawla
IPC分类号： H04B1/10
CPC分类号： H03H17/0275 , H03H17/0657
摘要： A minimal area integrated polyphase interpolation filter uses a symmetry of coefficients for a channel of input data. The filter includes an input interface block for synchronizing the input signal to a first internal clock signal; a memory block for providing multiple delayed output signals; a multiplexer input interface block for outputting a selected plurality of signals for generating mirror image coefficient sets in response to a second set of internal control signals, a coefficient block for generating mirror image and/or symmetric coefficient sets, and to output a plurality of filtered signals, an output multiplexer block for performing selection, gain control and data width control on said plurality of filtered signals, an output register block synchronizing the filtered signals, and a control block generating clock signals for realization of the filter and to delay between two channels to access a coefficient set, thereby minimizing hardware in the filter.
摘要翻译：最小面积集成多相插值滤波器使用输入数据通道的系数对称性。滤波器包括用于使输入信号与第一内部时钟信号同步的输入接口块; 用于提供多个延迟输出信号的存储块; 多路复用器输入接口块，用于响应于第二组内部控制信号输出用于产生镜像系数组的所选择的多个信号，用于产生镜像和/或对称系数集的系数块，以及输出多个滤波器信号，用于对所述多个滤波信号执行选择，增益控制和数据宽度控制的输出多路复用器块，同步滤波后的信号的输出寄存器块以及用于实现滤波器并在两个通道之间延迟的控制块以访问系数集合，从而最小化过滤器中的硬件。

92. 发明申请

US20060103555A1 Sample rate converter for reducing the sampling frequency of a signal by a fractional number 有权
$Sample rate converter for reducing the sampling frequency of a signal by a fractional number$
标题翻译：采样率转换器，用于将信号的采样频率降低分数
公开(公告)号：US20060103555A1
公开(公告)日：2006-05-18
申请号：US11272254
申请日：2005-11-10
申请人： Gabriel Antonesei
发明人： Gabriel Antonesei
IPC分类号： H03M7/00
CPC分类号： H03H17/0275 , H03H17/0685
摘要： A sample rate converter reduces the sampling rate of a signal by a fractional number U/D, where U represents an up-sampling rate and D represents a down-sampling rate. The converter comprises an input for receiving an input data stream at a first rate and an FIR filtering stage. The FIR filtering stage comprises a set of D polyphase filter branches, each branch including a set of filter coefficients which operate on a sample of the input signal. The converter also comprises a commutative switch which selectively connects a sample of the input data stream to one of the polyphase filter branches, the switch being arranged to skip every U-1 filter branches during a cycle through the filter branches. An output outputs an output data stream at a second data rate which is lower than the first data rate.
摘要翻译：采样率转换器将信号的采样率降低了分数U / D，其中U表示上采样率，D表示下采样率。转换器包括用于以第一速率和FIR滤波级接收输入数据流的输入。 FIR滤波级包括一组D多相滤波器分支，每个分支包括在输入信号的样本上操作的一组滤波器系数。转换器还包括可选择性地将输入数据流的样本连接到多相滤波器分支之一的交换开关，该开关被布置成在通过滤波器分支的周期期间跳过每个U-1滤波器分支。输出以低于第一数据速率的第二数据速率输出输出数据流。

93. 发明授权

US06963890B2 Reconfigurable digital filter having multiple filtering modes 失效
标题翻译：具有多种过滤模式的可重构数字滤波器
公开(公告)号：US06963890B2
公开(公告)日：2005-11-08
申请号：US09871198
申请日：2001-05-31
申请人： Santanu Dutta , David Molter
发明人： Santanu Dutta , David Molter
IPC分类号： G06T5/20 , H03H17/02 , G06F17/10
CPC分类号： H03H17/0275 , H03H17/0294
摘要： A hardware-configurable digital filter is adaptable for providing multiple filtering modes. In one embodiment, the digital filter includes a register-based array of logic circuitry, computational circuitry and mode selection circuitry. By reconfiguring data flow within the logic circuitry and the computational circuitry, the mode selection circuitry switches the digital filter between different ones of the multiple filtering modes. Each of the multiplication and addition logic circuits has outputs and inputs selectably coupled to the other of the multiplication and addition logic circuits along a Y direction, with the selectivity being responsive to the mode selection circuitry for arranging the registers as being functionally linear or functionally nonlinear. In a more specific embodiment the filtering modes include polyphase filtering and general purpose filtering applications (such as FIR filtering), and in another more specific embodiment the filtering modes include polyphase direct filtering, polyphase transposed filtering, and at least one general purpose filtering. A specific example application of the above type of digital filter is directed to filtering video pixel components, for example, in resizing a horizontal line of pixels.
摘要翻译：硬件可配置的数字滤波器适用于提供多种过滤模式。在一个实施例中，数字滤波器包括基于寄存器的逻辑电路阵列，计算电路和模式选择电路。通过重新配置逻辑电路和计算电路内的数据流，模式选择电路在多个滤波模式的不同之间切换数字滤波器。乘法和加法逻辑电路中的每一个具有输出和输入，其可选择性地耦合到沿着Y方向的乘法和加法逻辑电路中的另一个，其选择性响应于模式选择电路，用于将寄存器布置为功能线性或功能非线性。在更具体的实施例中，滤波模式包括多相滤波和通用滤波应用（例如FIR滤波），并且在另一个更具体的实施例中，滤波模式包括多相直接滤波，多相转置滤波和至少一个通用滤波。上述类型的数字滤波器的具体示例应用涉及滤波视频像素分量，例如，在调整水平线像素的大小中。

94. 发明申请

US20050018796A1 Method of combining an analysis filter bank following a synthesis filter bank and structure therefor 审中-公开
标题翻译：组合合成滤波器组之后的分析滤波器组的方法及其结构
公开(公告)号：US20050018796A1
公开(公告)日：2005-01-27
申请号：US10614357
申请日：2003-07-07
申请人： Ravindra Sande , Anantharaman Balasubramanian
发明人： Ravindra Sande , Anantharaman Balasubramanian
IPC分类号： H03H17/02 , H03H17/06 , H04B1/10 , H04B3/21 , H04B3/23
CPC分类号： H03H17/0266 , H03H17/0275 , H03H17/0685 , H04B3/21 , H04B3/23
摘要： An efficient method and structure for combining an M-channel synthesis filter bank followed by an L-channel analysis filter bank.
摘要翻译：一种用于组合M信道合成滤波器组和L信道分析滤波器组的有效方法和结构。

95. 发明授权

US06778106B2 Digital sample sequence conversion device 有权
标题翻译：数字采样序列转换装置
公开(公告)号：US06778106B2
公开(公告)日：2004-08-17
申请号：US10184017
申请日：2002-06-26
申请人： Thierry Lenez , Eric Petit
发明人： Thierry Lenez , Eric Petit
IPC分类号： H03M700
CPC分类号： H03H17/0275 , H03H17/0685
摘要： A device for automatically converting a digital sample sequence X(n) inputted at a first frequency fe and converted into an output digital sample sequence Y(m) at a second frequency fs which is smaller than fe. An interpolator-decimator assembly having a decimation rate equal to &ggr;, selected so as to correspond to the frequency offset fe/fs is based on a polyphased filter having p tables of q elements each, said filter being designed such that samples X(n) are input at the fe frequency and table components are activated according to clocking of a second clock derived from the fe clock and wherein one clock pulse is removed.
摘要翻译：一种用于自动转换以第一频率fe输入的数字采样序列X（n）并以小于fe的第二频率fs转换成输出数字采样序列Y（m）的装置。具有等于γ的抽取率等于γ的内插器 - 抽取器组件基于具有每个q个元件的p个表的多相滤波器，所述滤波器被设计为使得样本X（n）以fe频率输入，并且根据从时钟导出的第二时钟的时钟激活表分量，并且其中一个时钟脉冲被去除。

96. 发明授权

US06480535B1 Generating multi-channel outputs simultaneously in a receiver using polyphase filter 失效
标题翻译：使用多相滤波器在接收机中同时产生多通道输出
公开(公告)号：US06480535B1
公开(公告)日：2002-11-12
申请号：US09360603
申请日：1999-07-26
申请人： Eric F. Witmayer
发明人： Eric F. Witmayer
IPC分类号： H03H730
CPC分类号： H03H17/0275
摘要： The present invention is a method and apparatus to generate one or more channel outputs from an input signal having N channels. The input signal is filtered by a polyphase filter to generate N filtered signals. The one or more channel outputs are extracted from the N filtered signal based on one or more phasors corresponding to the one or more channel outputs.
摘要翻译：本发明是一种从具有N个信道的输入信号产生一个或多个信道输出的方法和装置。输入信号由多相滤波器滤波以产生N个滤波信号。基于与一个或多个信道输出相对应的一个或多个相量，从N个滤波信号中提取一个或多个信道输出。

97. 发明授权

US6134268A Apparatus for performing a non-integer sampling rate change in a multichannel polyphase filter 有权
标题翻译：用于在多通道多相滤波器中执行非整数采样率变化的装置
公开(公告)号：US6134268A
公开(公告)日：2000-10-17
申请号：US176781
申请日：1998-10-22
申请人： James Wesley McCoy
发明人： James Wesley McCoy
IPC分类号： H03H17/00 , H03H17/02 , H03H17/06 , H04B14/04 , H04L27/00 , H03H7/30
CPC分类号： H03H17/0685 , H03H17/0273 , H03H17/0275 , H03H2218/06
摘要： A multichannel polyphase filter (304, 602) includes a processing system (204, 506) for accepting and processing M input channels of data, each sampled at an input sampling rate, wherein M is a positive integer greater than unity. The processing system is programmed to provide a commutator (308, 606) for the multichannel polyphase filter, wherein the position of the commutator is decoupled from the phase of a filter impulse response selected for the position, thereby allowing the multichannel polyphase filter to be operated at a sampling rate that is a non-integer multiple of the input sampling rate. The processing system is further programmed to operate the multichannel polyphase filter at the non-integer multiple of the input sampling rate to obtain a non-integer sampling rate change.
摘要翻译：多通道多相滤波器（304,602）包括用于接收和处理M个输入的数据通道的处理系统（204,506），每个输入通道以输入采样率进行采样，其中M是大于1的正整数。处理系统被编程为提供用于多通道多相滤波器的换向器（308,606），其中换向器的位置与为该位置选择的滤波器脉冲响应的相位分离，从而允许多通道多相滤波器被操作以采样率为输入采样率的非整数倍。处理系统进一步被编程为以输入采样率的非整数倍操作多通道多相滤波器以获得非整数采样率变化。

98. 发明授权

US10003324B2 Fast FIR filtering technique for multirate filters 有权
公开(公告)号：US10003324B2
公开(公告)日：2018-06-19
申请号：US14799950
申请日：2015-07-15
申请人： Vecima Networks Inc.
发明人： Brian Berscheid , Aroutchelvame Mayilavelane
IPC分类号： H03H17/06 , H03H17/02
CPC分类号： H03H17/0621 , H03H17/0275 , H03H2017/0247
摘要： Data samples are filtered by using a digital filter where the length of an impulse response of the digital filter is finite, an impulse response of the digital filter is symmetric and the operation of the digital filter is multi-rate. The method uses a polyphase decomposition to break down the input data stream into N parallel substreams and the multi-rate digital filter is separated by a polyphase decomposition into multiple lower-rate sub-filters where each of the sub-filters is separated into a set of simpler sub-sub-filters which operate upon the same set of input samples and which have impulse responses which are jointly centro-symmetric, a set of pre-filtering arithmetic structures, and a set of post-filtering arithmetic structures and performing each such pair of sub-sub-filtering operations using a single shared filter structure, a set of pre-filtering combining adders, and a set of post-filtering separating adders.

99. 发明授权

US09990935B2 System aspects of an audio codec 有权
公开(公告)号：US09990935B2
公开(公告)日：2018-06-05
申请号：US14916545
申请日：2014-09-10
申请人： DOLBY LABORATORIES LICENSING CORPORATION , DOLBY INTERNATIONAL AB
发明人： Alexander Groeschel , Jens Popp , Martin Wolters , Jeffrey Riedmiller , Michael Ward , Karl Jonas Roeden , Holger Hoerich , Karsten Linzmeier , Tobias Friedrich
IPC分类号： G06F17/00 , G10L19/24 , G10L19/008 , H03H17/02 , H03H17/04 , H04S3/02 , G10L19/16 , G10L25/18 , G10L19/005
CPC分类号： G10L19/24 , G10L19/005 , G10L19/008 , G10L19/167 , G10L25/18 , H03H17/0275 , H03H17/0277 , H03H17/0455 , H04S3/02 , H04S2400/03 , H04S2400/05
摘要： The present document relates to the design of anti-aliasing and/or anti-imaging filters for resamplers using rational resampling factors. In particular, the present document relates to a method for implementing such anti-aliasing and/or anti-imaging filters with reduced computational complexity. In addition, the present document relates to further aspects of an audio encoding and decoding system, such as the phase relation between the channels of a multi-channel audio signal and/or the structure of the bitstream of an encoded audio signal.

100. 发明申请

US20170262409A1 Complex Exponential Modulated Filter Bank for High Frequency Reconstruction or Parametric Stereo 有权
公开(公告)号：US20170262409A1
公开(公告)日：2017-09-14
申请号：US15608175
申请日：2017-05-30
申请人： Dolby International AB
发明人： Per Ekstrand
IPC分类号： G06F17/11 , H04R3/04 , H03H17/02 , G10L19/02 , G10L19/26
CPC分类号： H04R3/04 , G06F17/10 , G06F17/11 , G10L19/008 , G10L19/0204 , G10L19/0208 , G10L19/26 , G10L19/265 , G10L21/00 , H03H17/0201 , H03H17/0248 , H03H17/0266 , H03H17/0275 , H03H17/0294 , H03H2017/0297 , H04S7/307
摘要： An apparatus and method are disclosed for filtering an audio signal. The apparatus includes a high frequency reconstructor or parametric stereo processor, a phase shifter, and a synthesis filter bank. The high frequency reconstructor or parametric stereo processor generates modified complex-valued subband samples. A phase shifter unshifts a phase of the modified complex-valued subband samples by an amount. The synthesis filter bank receives the modified complex valued subband samples and generates time domain output audio samples.

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