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91. 发明申请

US20050146336A1 Connector for measuring electric resistance, apparatus and method for measuring electric resistance of circuit board 有权
标题翻译：用于测量电阻的连接器，用于测量电路板电阻的装置和方法
公开(公告)号：US20050146336A1
公开(公告)日：2005-07-07
申请号：US10507891
申请日：2003-04-30
申请人： Kiyoshi Kimura , Ken-ichi Koyama , Fujio Hara
发明人： Kiyoshi Kimura , Ken-ichi Koyama , Fujio Hara
IPC分类号： G01R1/073 , G01R1/06 , G01R27/02 , G01R31/28 , H05K1/02 , H05K1/11 , G01R31/02
CPC分类号： G01R31/2812 , G01R31/2805 , G01R31/2808 , H05K1/0268 , H05K1/116
摘要： A connector for measurement of electric resistance, an electric resistance-measuring apparatus for circuit boards, and methods of measurement of electric resistance. The connector includes an insulating base plate, a plurality of connecting electrode pairs provided on a front surface of the insulating base plate, and composed of core electrodes arranged in accordance with a pattern corresponding to a pattern of a plurality of electrodes to be inspected in a circuit board to be inspected and ring-like electrodes arranged to surround the respective core electrodes in a state electrically insulated from the core electrodes, and a plurality of relay electrodes provided on a back surface of the insulating base plate and electrically connected to either one of the core electrode or ring-like electrode of the connecting electrode pairs.
摘要翻译：用于测量电阻的连接器，用于电路板的电阻测量装置和电阻测量方法。连接器包括绝缘基板，设置在绝缘基板的前表面上的多个连接电极对，并且由根据与待检查的多个电极的图案相对应的图案布置的芯电极组成被检查的电路板和以与芯电极电绝缘的状态包围各个芯电极的环状电极，以及设置在绝缘基板的背面上并电连接到连接电极对的芯电极或环状电极。

92. 发明授权

US06806718B2 On-circuit board continuity tester 失效
公开(公告)号：US06806718B2
公开(公告)日：2004-10-19
申请号：US10644477
申请日：2003-08-21
申请人： Ryan S. Berkely
发明人： Ryan S. Berkely
IPC分类号： G01R3100
CPC分类号： G01R31/046 , G01R31/2812 , G01R31/2813 , H05K1/0268
摘要： For qualification testing in product development, a test assembly contains a surrogate circuit board (7) and surrogate electronic modules (5) supported thereon. The terminals (5a-5j) of the modules are joined to respective bonding pads (2a-2j) on the circuit board to form bonded joints. The modules terminals and the wiring of the associated bonding pads is configured to produce at least one test series circuit (21) associated with each module that includes the bonded joints. A tester (9) supported on the circuit board monitors the test series circuit and produces a persistent indication (10) should a break or interruption occur in a bonded joint or any other portion of the test series circuit. This allows indications of transient breaks that occurred when the test assembly was being subjected to stresses, such as those induced by temperature excursions, mechanical vibration, and/or mechanical shock to be preserved and recorded at a later time.

93. 发明授权

US06731124B2 Integrated device for testing contacts 失效
标题翻译：用于测试联系人的集成设备
公开(公告)号：US06731124B2
公开(公告)日：2004-05-04
申请号：US09965453
申请日：2001-09-27
申请人： Maurice Alexander Hugo Donners
发明人： Maurice Alexander Hugo Donners
IPC分类号： G01R3102
CPC分类号： G01R31/048 , G01R31/2812
摘要： The invention relates to a device (10) for testing a series of contacts (Cij), which are provided with connection conductors (G, H) for supplying electric current to the contacts (Cij). The known device is less suitable for testing large numbers of contacts (Cij), at least because it is expensive and the testing operation is tedious. A device (10) according to the invention includes a (semiconductor) body (1) on which the contacts (Cij) are present in the form of an array (A) , connection conductors (G, H) which are provided with a selection device. (S) enabling maximally two contacts (C11, C11′) to be selected, the connection conductors (G, H) being formed within maximally two separate metal layers (2, 3). Such a device (10) is inexpensive and easy to manufacture, and it also enables a large number of contacts (Cij) to be (semi-) quantitatively tested at a high speed. In one embodiment, the selection devices (S) are formed by diodes (D) in a matrix of a limited number of connection conductors (G, H) , enabling only one pair of contacts (C11, C11′) to be tested. In another embodiment, the selection means (S) are formed by series-connected capacitors Zij and inductors Lij, enabling each contact (C11) to be individually tested within a network N.
摘要翻译：本发明涉及一种用于测试一系列触点（Cij）的装置（10），它们具有用于向触点（Cij）提供电流的连接导体（G，H）。已知的设备不太适用于测试大量的触点（Cij），至少因为它是昂贵的，并且测试操作是繁琐的。根据本发明的装置（10）包括（半导体）主体（1），触点（Cij）以阵列（A）的形式存在于其上，连接导体（G，H）设置有选择设备。（S）能够最大限度地选择两个触点（C11，C11'），连接导体（G，H）形成在最多两个分离的金属层（2,3）内。这种装置（10）便宜且易于制造，并且还能够以高速定量测试大量的触点（Cij）。在一个实施例中，选择装置（S）由有限数量的连接导体（G，H）的矩阵中的二极管（D）形成，从而只能测试一对触点（C11，C11'）。在另一个实施例中，选择装置（S）由串联连接的电容器Zij和电感器Lij形成，使得每个触点（C11）能够在网络N内单独测试。

94. 发明申请

US20030199110A1 Method for test conditions 失效
标题翻译：测试条件的方法
公开(公告)号：US20030199110A1
公开(公告)日：2003-10-23
申请号：US10269127
申请日：2002-10-10
申请人： Hitachi, Ltd.
发明人： Yuichi Hamamura , Takaaki Kumazawa , Hisao Asakura , Kazuyuki Tsunokuni , Aritoshi Sugimoto
IPC分类号： H01L021/66
CPC分类号： G01R31/2812 , G01R31/2818
摘要： A manufacturing method of an electronic device is to improve test efficiency using test structure and improve yield. The manufacturing method performs test using a first lead wire disposed on an insulating layer formed on a substrate and a second lead wire electrically connected to the substrate and disposed on the insulating layer and manages the electronic device on the basis of results of the test to manufacture the electronic device. The manufacturing method includes a step of testing whether the first lead wire is disconnected or not by measuring an electric resistance between both ends of the first lead wire and a step of testing whether the first and second lead wires are short-circuited or not by measuring an electric resistance between the first lead wire and the substrate.
摘要翻译：电子设备的制造方法是使用测试结构提高测试效率并提高产量。该制造方法使用设置在形成于基板上的绝缘层上的第一引线和与基板电连接并设置在绝缘层上的第二引线进行测试，并基于制造试验的结果来管理电子设备电子设备。该制造方法包括通过测量第一引线的两端之间的电阻和通过测量第一和第二引线是否短路的步骤来测试第一引线是否断开的步骤第一引线与基板之间的电阻。

95. 发明申请

US20030114996A1 System and method for identifying solder joint defects 失效
标题翻译：用于识别焊点缺陷的系统和方法
公开(公告)号：US20030114996A1
公开(公告)日：2003-06-19
申请号：US10024101
申请日：2001-12-17
发明人： Tracy Kristine Ragland
IPC分类号： G06F019/00
CPC分类号： G01R31/2812 , G01N23/04
摘要： An improved circuit inspection system incorporates an automated measuring technique that accounts for acceptable Z-axis elevation variance across both a printed-circuit device and a mounting surface when making solder-joint pass/fail decisions. The improved solder-joint inspection system applies a near neighbor solder joint diameter error analysis for each solder joint on a printed-circuit device. A near neighbor solder joint diameter error outlier analysis is used to identify solder joint defects with improved accuracy.
摘要翻译：改进的电路检查系统包括自动测量技术，其在制作焊点通过/失败决定时考虑印刷电路器件和安装表面两者之间的可接受的Z轴仰角差异。改进的焊点检查系统对印刷电路器件上的每个焊点应用近邻焊点直径误差分析。近邻焊点直径误差异常值分析用于以更高的精度识别焊点缺陷。

96. 发明授权

US06518766B2 Method of inspecting an electrical disconnection between circuits by calculating physical quantities thereof based on capacitances regarding the circuits measured twice 有权
标题翻译：通过基于两次测量的电路的电容计算其物理量来检查电路之间的电断开的方法
公开(公告)号：US06518766B2
公开(公告)日：2003-02-11
申请号：US09887521
申请日：2001-06-25
申请人： Morishiro Sudo
发明人： Morishiro Sudo
IPC分类号： G01R3108
CPC分类号： G01R31/2812
摘要： A disconnection-inspecting method for inspecting an electrical disconnection between circuits formed on both surfaces of a board is provided. The method includes the steps of: placing the board on an insulating sheet laid on a reference conductor; measuring a first capacitance between the reference conductor and one of the circuits formed on a surface of both surfaces opposite to the other surface facing the insulating sheet; measuring a second capacitance between the reference conductor and the one of the circuits by changing a first physical quantity of the insulating sheet; calculating a second physical quantity of each of the circuits based on the first capacitance and the second capacitance measured in the steps of measuring; and judging the presence of the electrical disconnection based on the second physical quantity calculated in the step of calculating.
摘要翻译：提供了用于检查形成在电路板的两个表面上的电路之间的断电的断线检查方法。该方法包括以下步骤：将板放置在放置在参考导体上的绝缘片上; 测量参考导体与形成在与面向绝缘片的另一表面相对的两个表面的表面上的一个电路之间的第一电容; 通过改变所述绝缘片的第一物理量来测量所述参考导体和所述一个电路之间的第二电容; 基于在测量步骤中测量的第一电容和第二电容来计算每个电路的第二物理量; 以及基于在计算步骤中计算出的第二物理量判断电断线的存在。

97. 发明申请

US20020180456A1 Printed circuit board testing apparatus 失效
标题翻译：印刷电路板测试仪
公开(公告)号：US20020180456A1
公开(公告)日：2002-12-05
申请号：US09970373
申请日：2001-10-03
申请人： Delta Electronics, Inc.
发明人： Lee Chin Ta , Chang Ko Wei
IPC分类号： H01H031/02
CPC分类号： G01R31/2812 , G01R31/2805 , G01R31/2813
摘要： The printed circuit board testing apparatus for use to test the short circuit in an induction element is provided. The apparatus includes: a signal generating device for providing a first signal; an inducing device for performing a mutual inductance effect with the induction element and making the first signal to produce a second signal in response to the mutual inductance effect; a signal converting device for converting the second signal into a direct current signal and obtaining a peak value voltage from the direct current signal; a signal processing device for outputting a controlling signal according to the relationship between the peak value voltage and a reference voltage; and a warning device for generating a warning signal in response to the status change of the controlling signal when a relative voltage standard is not identical to a predetermined voltage standard, thereby judging whether there is any short circuit formed.
摘要翻译：提供了用于测试感应元件中的短路的印刷电路板测试装置。该装置包括：信号发生装置，用于提供第一信号; 感应装置，用于与感应元件进行互感效应，并使第一信号响应于互感效应产生第二信号; 信号转换装置，用于将第二信号转换为直流信号，并从直流信号获得峰值电压; 信号处理装置，用于根据峰值电压和参考电压之间的关系输出控制信号; 以及警报装置，用于当相对电压标准与预定电压标准不相同时，响应于控制信号的状态变化产生警告信号，从而判断是否形成短路。

98. 发明申请

US20020075008A1 Method of inspecting an electrical disconnection between circuits by calculating physical quantities thereof based on capacitances regarding the circuits measured twice 有权
标题翻译：通过基于两次测量的电路的电容计算其物理量来检查电路之间的电断开的方法
公开(公告)号：US20020075008A1
公开(公告)日：2002-06-20
申请号：US09887521
申请日：2001-06-25
发明人： Morishiro Sudo
IPC分类号： G01R031/08
CPC分类号： G01R31/2812
摘要： A disconnection-inspecting method for inspecting an electrical disconnection between circuits formed on both surfaces of a board is provided. The method comprises the steps of: placing the board on an insulating sheet laid on a reference conductor; measuring a first capacitance between the reference conductor and one of the circuits formed on a surface of both surfaces opposite to the other surface facing the insulating sheet; measuring a second capacitance between the reference conductor and the one of the circuits by changing a first physical quantity of the insulating sheet; calculating a second physical quantity of each of the circuits based on the first capacitance and the second capacitance measured in the steps of measuring; and judging the presence of the electrical disconnection based on the second physical quantity calculated in the step of calculating.
摘要翻译：提供了用于检查形成在电路板的两个表面上的电路之间的断电的断线检查方法。该方法包括以下步骤：将板放置在放置在参考导体上的绝缘片上; 测量参考导体与形成在与面向绝缘片的另一表面相对的两个表面的表面上的一个电路之间的第一电容; 通过改变所述绝缘片的第一物理量来测量所述参考导体和所述一个电路之间的第二电容; 基于在测量步骤中测量的第一电容和第二电容来计算每个电路的第二物理量; 以及基于在计算步骤中计算出的第二物理量判断电断线的存在。

99. 发明授权

US06297652B1 Electric resistance measuring apparatus and method for circuit board 有权
标题翻译：电阻测量装置及电路板方法
公开(公告)号：US06297652B1
公开(公告)日：2001-10-02
申请号：US09510673
申请日：2000-02-22
申请人： Sugiro Shimoda , Kiyoshi Kimura
发明人： Sugiro Shimoda , Kiyoshi Kimura
IPC分类号： G01R2702
CPC分类号： G01R31/2812
摘要： Provided are an electric resistance measuring apparatus for circuit boards, and an electric resistance measuring method using the same. An electric resistance measuring apparatus includes a one-side inspection circuit board having a plurality of connecting electrodes, and layer connector members provided on the inspection circuit board and formed of a conductive elastomer. Each of the layer connector members is brought into simultaneous contact with a plurality of connecting electrodes at one side thereof to be electrically connected thereto, and at the other side thereof, brought into simultaneous contact with a plurality of electrodes to be inspected to be electrically connected thereto. In this measurable state, two connecting electrodes are used for current supply and for voltage measurement, thereby performing measurement of electric resistance on a specified electrode to be inspected. Another electric resistance measuring apparatus includes a connector member provided on the surface of the inspection circuit board. The connector member is composed of an insulating base, front-side terminals, back-side terminals and a short-circuit member for electrically connecting the adjacent front-side terminals to each other.
摘要翻译：本发明提供一种电路基板用电阻测量装置及使用该电阻测量方法的电阻测量方法。电阻测量装置包括具有多个连接电极的单面检查电路板和设置在检查电路上的层连接器构件并由导电弹性体形成。每个层连接器构件与其一侧的多个连接电极同时接触以与其电连接，并且在另一侧与多个电极同时接触以被检查以电连接到此。在这种可测量状态下，使用两个连接电极进行电流供给和电压测量，从而对要检查的规定电极进行电阻的测量。另一个电阻测量装置包括设置在检查电路板的表面上的连接器部件。连接器构件由绝缘基座，前侧端子，后侧端子和用于将相邻的前侧端子彼此电连接的短路构件构成。

100. 发明授权

US5977775A System and method for detecting shorts, opens and connected pins on a printed circuit board using automatic equipment 失效
标题翻译：使用自动设备检测印刷电路板上的短路，开路和连接引脚的系统和方法
公开(公告)号：US5977775A
公开(公告)日：1999-11-02
申请号：US559905
申请日：1995-11-17
申请人： Kevin G. Chandler , Barry A. Alcorn , Bryan D. Boswell , John M. Heumann , Ed O. Schlotzhauer
发明人： Kevin G. Chandler , Barry A. Alcorn , Bryan D. Boswell , John M. Heumann , Ed O. Schlotzhauer
IPC分类号： G01R31/02 , G01R31/28 , G01R31/3183 , G01R31/319 , G01R27/26
CPC分类号： G01R31/318342 , G01R31/2812 , G01R31/31915 , G01R31/3191
摘要： An automatic circuit board tester for testing for shorts, opens, and interconnected pins or nodes on a circuit board. The tester first classifies the nodes as being in one of three categories based upon the design of the board and the intended interconnection of the nodes. The categories of nodes are: (1) connected to ground; (2) interconnected to all other nodes in the test group; or (3) isolated from all other nodes. The circuit board tester has a testhead containing a plurality of test channels, each configured to be coupled to a node on the circuit board. The testhead utilizes a digital signal from a digital driver to drive the node, at a predetermined voltage and a digital receiver to read the node voltage to determine if it is coupled to ground. Each test channel also includes a switch to connect the digital driver and receiver to the test node as well as a ground switch to selectively couple the node to ground. Various combinations of switch positions and testing sequences enables the circuit board tester to test all node connections and to ensure that the physical embodiment of the circuit board accurately reflects the circuit board design.
摘要翻译：一种用于测试电路板上短路，开路和互连引脚或节点的自动电路板测试仪。测试仪首先根据电路板的设计和节点的预期互连，将节点分类为三类之一。节点类别有：（1）连接到地面; （2）与测试组中的所有其他节点互连; 或（3）与所有其他节点隔离。电路板测试器具有包含多个测试通道的测试头，每个测试通道被配置为耦合到电路板上的节点。测试头利用来自数字驱动器的数字信号来驱动节点，以预定电压和数字接收机读取节点电压，以确定其是否耦合到地。每个测试通道还包括将数字驱动器和接收器连接到测试节点的开关以及用于选择性地将节点耦合到地的接地开关。开关位置和测试序列的各种组合使得电路板测试仪能够测试所有节点连接，并确保电路板的物理实施例精确地反映电路板设计。

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