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    • 92. 发明申请
    • Control System, Integrated Control Apparatus, And Control Program
    • 控制系统,集成控制装置和控制程序
    • US20090308089A1
    • 2009-12-17
    • US12485490
    • 2009-06-16
    • Yoshinori TanabeAtsushi OuchiYoshio Ozawa
    • Yoshinori TanabeAtsushi OuchiYoshio Ozawa
    • F25D21/06G05B15/00
    • F25D21/002F25B5/02F25B2347/021F25B2400/22F25B2600/2513
    • An object of the present invention is to provide a control system, an integrated control apparatus, and a control program that are capable of well maintaining freshness and quality of food articles, by reducing time for performing a recovery operation following a frost removing operation of cooling devices. In response to a start of the frost removing operation of a first showcase, an integrated control apparatus provides a second device controller (device control unit) with a “lower limit cooling instruction (increase instruction)” to increase the refrigerant supplied to a second showcase to an amount larger than that before the frost removing operation starts. In response to the “lower limit cooling instruction (increase instruction),” the second device controller (device control unit) increases the amount of the refrigerant supplied to the second showcase.
    • 本发明的目的是提供一种控制系统,综合控制装置和控制程序,其能够通过在冷却除霜操作之后减少执行恢复操作的时间来保持食品的新鲜度和质量 设备。 响应于第一展示柜的霜除去操作的开始,集成控制装置向第二设备控制器(设备控制单元)提供“下限冷却指令(增加指令)”,以增加供应到第二陈列柜的制冷剂 达到大于除霜操作开始之前的量。 响应于“下限制冷指令(增加指令)”,第二设备控制器(设备控制单元)增加供给第二陈列柜的制冷剂量。
    • 93. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
    • 非易失性半导体存储器件及其制造方法
    • US20090294828A1
    • 2009-12-03
    • US12405474
    • 2009-03-17
    • Yoshio OzawaFumiki Aiso
    • Yoshio OzawaFumiki Aiso
    • H01L29/788H01L21/336
    • H01L27/11578H01L21/8221H01L27/11568H01L27/11582
    • A nonvolatile semiconductor memory device includes: a semiconductor member; a memory film provided on a surface of the semiconductor member and being capable of storing charge; and a plurality of control gate electrodes provided on the memory film, spaced from each other, and arranged along a direction parallel to the surface. Average dielectric constant of a material interposed between one of the control gate electrodes and a portion of the semiconductor member located immediately below the control gate electrode adjacent to the one control gate electrode is lower than average dielectric constant of a material interposed between the one control gate electrode and a portion of the semiconductor member located immediately below the one control gate electrode.
    • 非易失性半导体存储器件包括:半导体部件; 记录膜,设置在所述半导体构件的表面上并能够存储电荷; 以及设置在所述存储膜上的多个控制栅电极,彼此间​​隔开并且沿着与所述表面平行的方向布置。 插入在一个控制栅电极之间的材料和位于与控制栅电极相邻的控制栅电极正下方的部分的平均介电常数低于介于一个控制栅之间的材料的平均介电常数 电极和位于一个控制栅电极正下方的半导体部件的一部分。
    • 96. 发明授权
    • Semiconductor device and method for manufacturing the same
    • 半导体装置及其制造方法
    • US07485918B2
    • 2009-02-03
    • US11797670
    • 2007-05-07
    • Akihito YamamotoYoshio Ozawa
    • Akihito YamamotoYoshio Ozawa
    • H01L29/788
    • H01L29/42336H01L27/115H01L27/11521H01L27/11524
    • A semiconductor device including a gate dielectric film provided on at least one site on a surface of a semiconductor substrate, at least one first gate electrode provided on the gate dielectric film, an inter-electrode dielectric film provided while covering a surface of the first gate electrode, at least partial film thickness of a portion covering a portion other than a corner portion that does not come into contact with the gate dielectric film from among a plurality of corner portions of the first gate electrode being formed to be smaller than at least partial film thickness of a portion covering the corner portion that does not come into contact with the gate dielectric film, and a second gate electrode provided while covering a surface of the inter-electrode dielectric film.
    • 一种半导体器件,包括设置在半导体衬底的表面上的至少一个位置处的栅极电介质膜,设置在栅极电介质膜上的至少一个第一栅电极,设置在覆盖第一栅极的表面的电极间电介质膜 所述第一栅电极的多个角部中的与所述栅电介质膜不接触的角部以外的部分的至少部分膜厚成形为小于至少部分 覆盖与栅极电介质膜不接触的角部的部分的膜厚度以及覆盖电极间电介质膜的表面的第二栅电极。
    • 97. 发明授权
    • Nonvolatile semiconductor memory device
    • 非易失性半导体存储器件
    • US07414285B2
    • 2008-08-19
    • US11870793
    • 2007-10-11
    • Hiroshi AkahoriWakako TakeuchiYoshio Ozawa
    • Hiroshi AkahoriWakako TakeuchiYoshio Ozawa
    • H01L27/108
    • H01L29/7881H01L27/115H01L27/11521H01L27/11524H01L29/42324H01L29/513
    • A nonvolatile semiconductor memory device includes a first insulating film provided on a surface of a semiconductor substrate, a charge accumulation layer provided on the first insulating film, a second insulating film provided above the charge accumulation layer and contains silicon and nitrogen, a third insulating film provided on the second insulating film, and composed of a single-layer insulating film containing oxygen or a plural-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, relative dielectric constant thereof being larger than it of a silicon oxide film, a fourth insulating film provided on the third insulating film and contains silicon and nitrogen, a control gate provided above the fourth insulating film, and a fifth insulating film provided between the charge accumulation layer and the second insulating film or between the fourth insulating film and the control gate, and contains silicon and oxygen.
    • 非易失性半导体存储器件包括设置在半导体衬底的表面上的第一绝缘膜,设置在第一绝缘膜上的电荷累积层,设置在电荷累积层上方并含有硅和氮的第二绝缘膜,第三绝缘膜 设置在第二绝缘膜上,并且由包含氧的单层绝缘膜或至少其顶层和底层上的膜含有氧的多层堆叠绝缘膜组成,其相对介电常数大于 氧化硅膜,设置在第三绝缘膜上并含有硅和氮的第四绝缘膜,设置在第四绝缘膜上方的控制栅极和设置在电荷累积层和第二绝缘膜之间的第五绝缘膜, 第四绝缘膜和控制栅,并含有硅和氧。
    • 98. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    • 非易失性半导体存储器件
    • US20080087937A1
    • 2008-04-17
    • US11870793
    • 2007-10-11
    • Hiroshi AkahoriWakako TakeuchiYoshio Ozawa
    • Hiroshi AkahoriWakako TakeuchiYoshio Ozawa
    • H01L29/788
    • H01L29/7881H01L27/115H01L27/11521H01L27/11524H01L29/42324H01L29/513
    • A nonvolatile semiconductor memory device includes a first insulating film provided on a surface of a semiconductor substrate, a charge accumulation layer provided on the first insulating film, a second insulating film provided above the charge accumulation layer and contains silicon and nitrogen, a third insulating film provided on the second insulating film, and composed of a single-layer insulating film containing oxygen or a plural-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, relative dielectric constant thereof being larger than it of a silicon oxide film, a fourth insulating film provided on the third insulating film and contains silicon and nitrogen, a control gate provided above the fourth insulating film, and a fifth insulating film provided between the charge accumulation layer and the second insulating film or between the fourth insulating film and the control gate, and contains silicon and oxygen.
    • 非易失性半导体存储器件包括设置在半导体衬底的表面上的第一绝缘膜,设置在第一绝缘膜上的电荷累积层,设置在电荷累积层上方并含有硅和氮的第二绝缘膜,第三绝缘膜 设置在第二绝缘膜上,并且由包含氧的单层绝缘膜或至少其顶层和底层上的膜含有氧的多层堆叠绝缘膜组成,其相对介电常数大于 氧化硅膜,设置在第三绝缘膜上并含有硅和氮的第四绝缘膜,设置在第四绝缘膜上方的控制栅极和设置在电荷累积层和第二绝缘膜之间的第五绝缘膜, 第四绝缘膜和控制栅,并含有硅和氧。
    • 100. 发明申请
    • Method of manufacturing semiconductor device
    • 制造半导体器件的方法
    • US20070117314A1
    • 2007-05-24
    • US11598053
    • 2006-11-13
    • Yoshio Ozawa
    • Yoshio Ozawa
    • H01L21/8242
    • H01L21/28273H01L27/115H01L27/11519H01L27/11521
    • A method of manufacturing a semiconductor device, comprises forming a gate insulating film on a surface of a semiconductor substrate, forming a first group of at least one strip-like gate electrode and a second group of strip-like gate electrodes on a surface of the gate insulating film, each strip-like gate electrode having a first face contacting the gate insulating film, a second face vertically extending from a long side of the first face and a third face curved and extending between the first and second faces, and a gap between the third faces of the adjacent gate electrode being narrower, at the surface of the gate insulating film, than a gap between the second faces of the adjacent gate electrode, and introducing dopant atoms into the surface of the semiconductor substrate through the gaps between the gate electrodes, thereby forming diffusion layers in the semiconductor substrate.
    • 一种制造半导体器件的方法,包括在半导体衬底的表面上形成栅极绝缘膜,在所述半导体衬底的表面上形成第一组至少一个带状栅电极和第二组带状栅极电极 栅极绝缘膜,每个带状栅电极具有与栅极绝缘膜接触的第一面,从第一面的长边垂直延伸的第二面和在第一和第二面之间弯曲并延伸的第三面, 相邻栅电极的第三面之间的栅极绝缘膜的表面比邻近的栅电极的第二面之间的间隙窄,并且通过这些间隙之间的间隙将掺杂剂原子引入到半导体衬底的表面中 从而在半导体衬底中形成扩散层。