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91. 发明授权

US07413930B2 Lead frame and method of manufacturing the lead frame 失效
标题翻译：引线框架和引线框架的制造方法
公开(公告)号：US07413930B2
公开(公告)日：2008-08-19
申请号：US10569577
申请日：2003-08-29
申请人： Fujio Ito , Hiromichi Suzuki , Toshio Sasaki
发明人： Fujio Ito , Hiromichi Suzuki , Toshio Sasaki
IPC分类号： H01L21/82
CPC分类号： H01L23/49541 , H01L21/4842 , H01L23/49558 , H01L2924/0002 , H01L2924/00
摘要： A plurality of inner leads, a plurality of outer leads formed in one with each of the inner lead, a bar lead of the square ring shape arranged inside a plurality of inner leads, a corner part lead which has been arranged between the inner leads of the end portion of the inner lead groups which adjoin among four inner lead groups corresponding to each side of the bar lead, and was connected with the bar lead, and a tape member joined to the tip part of each inner lead, a bar lead, and a corner part lead are included. Since the corner part lead is formed as an object for reinforcement of a frame body between adjoining inner lead groups, the rigidity of the lead frame can be increased.
摘要翻译：多个内部引线，多个外部引线，每个外部引线与内部引线中的每一个形成一个，方形环形状的引脚布置在多个内部引线内;角部引线，其设置在内部引线之间所述内引线组的与所述棒引线的每一侧相对应的四个内引线组中相邻的所述内引线组的端部与所述引线连接，以及与所述内引线的前端接合的带部件，并包括角落部分铅。由于角部引线形成为在相邻的内引线组之间加强框架体的对象，所以可以提高引线框架的刚性。

92. 发明申请

US20080054894A1 MAGNETIC DETECTION DEVICE HAVING ELEMENT PROVIDED WITH MULTI-LAYERED PROTECTION LAYER AND A METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：具有多层保护层的元件的磁性检测装置及其制造方法
公开(公告)号：US20080054894A1
公开(公告)日：2008-03-06
申请号：US11678812
申请日：2007-02-26
申请人： Toshio Sasaki , Kiyoshi Sato , Ichiro Tokunaga
发明人： Toshio Sasaki , Kiyoshi Sato , Ichiro Tokunaga
IPC分类号： G01R33/02
CPC分类号： G01R33/093 , B82Y25/00
摘要： The invention provides a magnetic detection device having excellent thermal resistance and water resistance by changing a configuration of layers of an insulating protection layer covering a magnetic detection element. A magnetic detection element is covered with an insulating protection layer, and the insulating protection layer has an alumina layer covering the magnet detection element and a silica layer covering the alumina layer. According to the embodiment, thermal resistance and water resistance can be properly improved, and therefore a magnetic detection device having excellent magnetic sensitivity and a high reliability can be realized without degrading characteristics of the magnetic detection device.
摘要翻译：本发明通过改变覆盖磁检测元件的绝缘保护层的层的结构来提供具有优异的耐热性和耐水性的磁检测装置。磁性检测元件被绝缘保护层覆盖，绝缘保护层具有覆盖磁体检测元件的氧化铝层和覆盖氧化铝层的二氧化硅层。根据本实施方式，可以适当地提高耐热性和耐水性，因此能够实现磁性检测装置的特性降低的磁敏感性和高可靠性的磁检测装置。

93. 发明申请

US20080019253A1 Information recording/reproducing device and information reproducing method 审中-公开
标题翻译：信息记录/再现装置和信息再现方法
公开(公告)号：US20080019253A1
公开(公告)日：2008-01-24
申请号：US11826433
申请日：2007-07-16
申请人： Toshio Sasaki
发明人： Toshio Sasaki
IPC分类号： G11B7/00
CPC分类号： G11B7/0065 , G11B7/083 , G11B7/0938 , G11B7/1275 , G11B7/128
摘要： In an information recording/reproducing device, pattern images of information light and reference light are formed by a micromirror device to produce the information light and the reference light, which have a coaxial relationship. The information light and the reference light are condensed by an objective lens and are recoded in a recording medium as interference fringes. Information light is reproduced from the recording medium in which interference fringes are recoded in advance. As to the reproduced information light, density of the pattern image thereof is calculated. A pattern-image forming-position adjuster changes a position of the pattern image of the reference light, which is formed on the micromirror device, by a predetermined number of pixels to determine the position from which the best reproduction pattern image is obtained.
摘要翻译：在信息记录/再现装置中，信息光和参考光的图案图像由微镜装置形成，以产生具有同轴关系的信息光和参考光。信息光和参考光被物镜聚光，并在记录介质中被重新编码为干涉条纹。信息光从其中预先重新编码干涉条纹的记录介质再现。对于再现的信息光，计算其图案图像的浓度。图案形成位置调整器将形成在微镜装置上的参考光的图案图像的位置改变预定数量的像素，以确定获得最佳再现图案图像的位置。

94. 发明授权

US06538926B2 Nonvolatile semiconductor memory system with capability of starting a new program operation while an existing program operation is being performed 有权
标题翻译：非易失性半导体存储器系统，其具有在执行现有程序操作时启动新的程序操作的能力
公开(公告)号：US06538926B2
公开(公告)日：2003-03-25
申请号：US09984816
申请日：2001-10-31
申请人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
发明人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
IPC分类号： G11C1604
CPC分类号： G11C16/0416 , G11C8/08 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/34 , G11C16/3418 , G11C16/3427 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/7883 , H01L29/7885
摘要： Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.
摘要翻译：公开了一种非易失性存储器系统，包括至少一个非易失性存储器，每个非易失性存储器具有多个非易失性存储单元和缓冲存储器; 以及耦合到所述非易失性存储器的控制装置。控制装置能够接收外部数据并将数据应用于非易失性存储器，并且使非易失性存储器能够操作程序操作，包括将接收的数据存储到缓冲存储器并将保存在缓冲存储器中的数据存储到缓冲存储器中的非易失性存储单元。此外，控制装置能够在非易失性存储器在程序操作中操作时接收外部数据。此外，缓冲存储器能够接收与程序运行一次要存储的数据的数据长度相等的数据单位，数据长度大于1字节。

95. 发明授权

US06370059B2 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US06370059B2
公开(公告)日：2002-04-09
申请号：US09880934
申请日：2001-06-15
申请人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
发明人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
IPC分类号： G11C1604
CPC分类号： G11C16/0416 , G11C8/08 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/34 , G11C16/3418 , G11C16/3427 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/7883 , H01L29/7885
摘要： Each memory cell of a nonvolatile semiconductor memory, essentially, consists of a one-transistor type memory cell such as a MOSFET having a floating gate electrode. When an electric programming operation is carried out, a positive voltage is applied to an n type drain region, a negative voltage is applied to a control gate and a source region is grounded. When an erasing operation is carried out, the positive voltage is applied to the control gate while all the other electrodes and a semiconductor substrate are grounded. Low power consumption can be accomplished because both of the programming operation and erasing operations are carried out by utilizing a tunneling mechanism. Furthermore, because th negative voltage applied to the word line, a drain voltage at the time of programming of data can be lowered, so that degradation of a gate oxide film at a channel portion can be mitigated.
摘要翻译：非易失性半导体存储器的每个存储单元基本上由诸如具有浮置栅电极的MOSFET的单晶体管型存储单元组成。当执行电编程操作时，向n型漏极区域施加正电压，向控制栅极施加负电压，并且源极区域接地。当执行擦除操作时，正电压被施加到控制栅极，而所有其它电极和半导体衬底接地。可以实现低功耗，因为通过利用隧道机制来执行编程操作和擦除操作两者。此外，由于施加到字线的负电压，可以降低数据编程时的漏极电压，从而可以减轻沟道部分处的栅极氧化膜的劣化。

96. 发明授权

US06335880B2 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US06335880B2
公开(公告)日：2002-01-01
申请号：US09881020
申请日：2001-06-15
申请人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
发明人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
IPC分类号： G11C700
CPC分类号： G11C16/0416 , G11C8/08 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/34 , G11C16/3418 , G11C16/3427 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/7883 , H01L29/7885
摘要： Each memory cell of a nonvolatile semiconductor memory, essentially, consists of a one-transistor type memory cell such as a MOSFET having a floating gate electrode. When an electric programming operation is carried out, a positive voltage is applied to an n type drain region, a negative voltage is applied to a control gate and a source region is grounded. When an erasing operation is carried out, the positive voltage is applied to the control gate while all the other electrodes and a semiconductor substrate are grounded. Low power consumption can be accomplished because both of the programming operation and erasing operations are carried out by utilizing a tunneling mechanism. Furthermore, because the negative voltage applied to the word line, a drain voltage at the time of programming of data can be lowered, so that degradation of a gate oxide film at a channel portion can be mitigated.
摘要翻译：非易失性半导体存储器的每个存储单元基本上由诸如具有浮置栅电极的MOSFET的单晶体管型存储单元组成。当执行电编程操作时，向n型漏极区域施加正电压，向控制栅极施加负电压，并且源极区域接地。当执行擦除操作时，正电压被施加到控制栅极，而所有其它电极和半导体衬底接地。可以实现低功耗，因为通过利用隧道机制来执行编程操作和擦除操作两者。此外，由于施加到字线的负电压，可以降低数据编程时的漏极电压，从而可以减轻沟道部分处的栅极氧化膜的劣化。

97. 发明授权

US6127303A Process for producing olefin polymers, olefin-polymerizing catalyst and polypropylene for biaxially oriented film produced with said catalyst 失效
标题翻译：用于生产烯烃聚合物，烯烃聚合催化剂和聚丙烯用于由所述催化剂制备的双轴取向膜的方法
公开(公告)号：US6127303A
公开(公告)日：2000-10-03
申请号：US901165
申请日：1997-07-28
申请人： Takeshi Ebara , Koji Mizunuma , Toshio Sasaki , Kazuki Wakamatsu , Junichi Kimura , Yoichi Obata
发明人： Takeshi Ebara , Koji Mizunuma , Toshio Sasaki , Kazuki Wakamatsu , Junichi Kimura , Yoichi Obata
IPC分类号： C08F4/16 , C08F4/645 , C08F4/646 , C08F4/658 , C08F10/06 , C08F110/06 , B01J31/00
CPC分类号： C08F110/06 , C08F4/6465 , C08F10/06
摘要： A catalyst system for polymerizing olefins is obtainable from (A) a solid component containing (A) magnesium, titanium and halogen and an electron donative compound which is an ether or ester; (B) an organoaluminum compound, and (C) at least two electron donative compounds, including an (.alpha.) and (.beta.) compound, wherein the total amount (C) compounds is 0.01 to 1 mole per mole of (B).
摘要翻译：用于聚合烯烃的催化剂体系可从（A）含有（A）镁，钛和卤素的固体组分和作为醚或酯的给电子化合物获得; （B）有机铝化合物，和（C）至少两种给电子化合物，包括（α）和（β）化合物，其中总量（C）化合物为0.01至1摩尔/摩尔（B）。

98. 发明授权

US5978305A Semiconductor integrated circuit device 失效
公开(公告)号：US5978305A
公开(公告)日：1999-11-02
申请号：US165194
申请日：1998-10-02
申请人： Toshio Sasaki , Yuji Tanaka , Kazumasa Yanagisawa , Hitoshi Tanaka , Jun Sato , Takashi Miyamoto , Mariko Ohtsuka , Satoru Nakanishi , Kazushige Ayukawa , Takao Watanabe
发明人： Toshio Sasaki , Yuji Tanaka , Kazumasa Yanagisawa , Hitoshi Tanaka , Jun Sato , Takashi Miyamoto , Mariko Ohtsuka , Satoru Nakanishi , Kazushige Ayukawa , Takao Watanabe
IPC分类号： G11C11/401 , G11C8/00 , G11C8/12 , G11C11/407 , G11C7/00
CPC分类号： G11C8/12
摘要： A RAM mounted so as to mix with logic circuits has a plurality of memory mats and one control circuit provided for the plurality of memory mats. Arithmetic circuits for respectively performing +1 or -1 arithmetic operations are respectively provided so as to correspond to the respective memory mats and are electrically connected in cascade form. An input terminal of the initial-stage arithmetic circuit is supplied with address-setting fixed address signals. Input signals supplied to the next and subsequent arithmetic circuits or signals outputted therefrom are defined as own-assigned address signals (those assigned to the corresponding memory mats). A comparator provided in association with each arithmetic circuit referred to above makes comparisons for coincidence between the address signals and address signals input upon memory access. The corresponding memory mat is selected based on the resultant coincidence signal.

99. 发明授权

US5965101A Process for producing hydrogen peroxide 失效
标题翻译：生产过氧化氢的方法
公开(公告)号：US5965101A
公开(公告)日：1999-10-12
申请号：US792064
申请日：1997-01-29
申请人： Fumisato Goto , Kozo Tanaka , Toshio Sasaki
发明人： Fumisato Goto , Kozo Tanaka , Toshio Sasaki
IPC分类号： C01B15/029 , C01B15/01
CPC分类号： C01B15/029
摘要： A process for producing hydrogen peroxide which comprises reacting hydrogen and oxygen in a reaction medium containing a halide of platinum group metal. The process is far simplified and the produced amount of hydrogen peroxide per the halide of platinum group metal is large.
摘要翻译：一种生产过氧化氢的方法，其包括在包含铂族金属的卤化物的反应介质中使氢和氧反应。该方法被简化，并且铂族金属卤化物的过氧化氢产生量大。

100. 发明授权

US5550781A Semiconductor apparatus with two activating modes of different number of selected word lines at refreshing 失效
标题翻译：具有不同数量的所选字线的两种激活模式的半导体装置在刷新时
公开(公告)号：US5550781A
公开(公告)日：1996-08-27
申请号：US381648
申请日：1995-01-31
申请人： Ken Sugawara , Shigeru Sakairi , Mikio Matoba , Toshio Sasaki , Katsuhiro Shimohigashi , Katsutaka Kimura
发明人： Ken Sugawara , Shigeru Sakairi , Mikio Matoba , Toshio Sasaki , Katsuhiro Shimohigashi , Katsutaka Kimura
IPC分类号： G11C5/14 , G11C8/18 , G11C11/406 , G11C11/4074 , G11C11/40
CPC分类号： G11C8/18 , G11C11/406 , G11C11/4074 , G11C5/141 , G11C5/143 , G11C5/147
摘要： A memory cartridge having a plurality of dynamic memory units includes an access conversion circuit which converts a static access signal into its inverted signal and an access control circuit which controllably switches between a signal for refreshing each dynamic unit and a signal for external access. The memory cartridge also includes a power switching circuit which switches power from an internal power supply to an external power supply when the memory cartridge is mounted to an external device.
摘要翻译：具有多个动态存储单元的存储器盒包括将静态访问信号转换为其反相信号的访问转换电路和可控地在用于刷新每个动态单元的信号和用于外部访问的信号之间切换的访问控制电路。存储盒还包括一个电源切换电路，当存储盒被安装到外部设备时，电源切换电路将电源从内部电源切换到外部电源。

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