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91. 发明授权

US06921671B1 Buffer layers to enhance the C-axis growth of Bi4Ti3O12 thin film on high temperature iridium-composite electrode 有权
标题翻译：缓冲层，增强Bi4Ti3O12薄膜在高温铱复合电极上的C轴生长
公开(公告)号：US06921671B1
公开(公告)日：2005-07-26
申请号：US10784669
申请日：2004-02-23
申请人： Fengyan Zhang , Wei-Wei Zhuang , Sheng Teng Hsu
发明人： Fengyan Zhang , Wei-Wei Zhuang , Sheng Teng Hsu
IPC分类号： H01L21/00 , H01L21/02
CPC分类号： H01L28/65 , H01L28/55
摘要： A method of fabricating a ferroelectric thin film on an iridium-composite electrode in an integrated circuit device includes preparing a substrate; depositing an iridium-composite bottom electrode on the substrate; annealing the bottom electrode in a first annealing step; depositing a buffer layer on the bottom electrode, including depositing a layer of material taken from the group of materials consisting of HfO2, ZrO2, TiO2, LaOx, La—Al—O, Ti—Al—O, Hf—Al—O, Zr—Al—O, Hf—Zr—O, Zr—Ti—O, Hf—Ti—O, La—Zr—O, La—Hf—O, and La—Ti—O; annealing the buffer layer in a second annealing step; depositing a layer of Bi4Ti3O12, to a thickness of between about 20 nm to 500 nm, on the buffer layer; annealing the ferroelectric layer in a third annealing step; and completing the integrated circuit device.
摘要翻译：在集成电路器件中的铱复合电极上制造铁电薄膜的方法包括：制备衬底; 在基板上沉积铱复合底部电极; 在第一退火步骤中退火底部电极; 在底部电极上沉积缓冲层，包括沉积从由HfO 2，ZrO 2，TiO 2，TiO 2，ZrO 2，TiO 2， La，Al-O，Ti-Al-O，Hf-Al-O，Zr-Al-O，Hf-Zr-O，Zr-Ti-O，Hf -Ti-O，La-Zr-O，La-Hf-O和La-Ti-O; 在第二退火步骤中退火缓冲层; 在缓冲层上沉积一层厚度为约20nm至500nm的Bi 4 N 3 O 12 O 12层; 在第三退火步骤中退火铁电层; 并完成集成电路设备。

92. 发明授权

US06774054B1 High temperature annealing of spin coated Pr1-xCaxMnO3 thim film for RRAM application 失效
标题翻译：用于RRAM应用的旋涂Pr1-xCaxMnO3薄膜的高温退火
公开(公告)号：US06774054B1
公开(公告)日：2004-08-10
申请号：US10640728
申请日：2003-08-13
申请人： Fengyan Zhang , Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
发明人： Fengyan Zhang , Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
IPC分类号： H01L2131
CPC分类号： G11C13/0007 , G11C2213/31 , H01L21/31691 , H01L28/20 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1608
摘要： A method of forming a PCMO thin film in a RRAM device includes preparing a substrate; depositing a metal barrier layer on the substrate; forming a bottom electrode on the barrier layer; spin-coating a layer of Pr1−xCaxMnO3 (PCMO) on the bottom electrode using a PCMO precursor; baking the PCMO thin film in one or more baking steps; annealing the PCMO thin film in a first annealing step after each spin-coating step; repeating the spin-coating step, the baking step and the first annealing step until the PCMO thin film has a desired thickness; annealing the PCMO thin film in a second annealing step, thereby producing a PCMO thin film having a crystalline structure of Pr1−xCaxMnO3, where 0.2
摘要翻译：在RRAM器件中形成PCMO薄膜的方法包括：制备衬底; 在衬底上沉积金属阻挡层; 在阻挡层上形成底部电极; 使用PCMO前体在底部电极上旋涂一层Pr1-xCaxMnO3（PCMO）; 在一个或多个烘烤步骤中烘烤PCMO薄膜; 在每个旋涂步骤之后的第一退火步骤中对PCMO薄膜进行退火; 重复旋涂步骤，烘烤步骤和第一退火步骤直到PCMO薄膜具有所需厚度; 在第二退火步骤中退火PCMO薄膜，从而制备具有Pr1-xCaxMnO3晶体结构的PCMO薄膜，其中0.2 <= X <= 0.5; 沉积顶部电极; 图案化顶部电极; 并完成RRAM设备。

93. 发明授权

US06585821B1 Method of monitoring PGO spin-coating precursor solution synthesis using UV spectroscopy 失效
标题翻译：使用紫外光谱法监测PGO旋涂前体溶液合成的方法
公开(公告)号：US06585821B1
公开(公告)日：2003-07-01
申请号：US10345636
申请日：2003-01-15
申请人： Wei-Wei Zhuang , Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
发明人： Wei-Wei Zhuang , Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
IPC分类号： C23C1616
CPC分类号： H01L21/02197 , C01G21/00 , C01P2002/86 , H01L21/02112 , H01L21/02175 , H01L21/02282 , H01L21/31604 , H01L21/31691
摘要： A method of monitoring the synthesis of a PGO spin-coating precursor solution includes monitoring heating of the solution with a UV spectrometer and terminating the heating step when a solution property reaches a predetermined value. The method utilizes the starting materials of lead acetate trihydrate (Pb(OAc)2.3H2O) and germanium alkoxide (Ge(OR)4 (R=C2H5 and CH(CH3)2)). The organic solvent is di(ethylene glycol)ethyl ether. The mixed solution of lead and di(ethylene glycol)ethyl ether is heated in an atmosphere of air at a temperature no greater than 190° C., and preferably no greater than 185° C. for a time period in a range of approximately eighty-five minutes. During the heating step the solution properties are monitored to determine when the reaction is complete and when decomposition of the desired product begins to take place. The solution is then added to germanium di(ethylene glycol)ethyl ether to make the PGO spin-coating solution. This second step also entails heating the solution to a temperature no greater than 190° C. for a time period in a range of 0.5 to 2.0 hours. This heating step is also monitored with a UV spectrometer to determine when the heating step should be terminated. The process results in a PGO precursor solution suitable for use in spin-coating.
摘要翻译：监测PGO旋涂前体溶液合成的方法包括用UV光谱仪监测溶液的加热，并且当溶液性能达到预定值时终止加热步骤。该方法采用醋酸铅三水合物（Pb（OAc）2.3H2O）和烷氧基锗（Ge（OR）4（R = C2H5和CH（CH3）2））的原料。有机溶剂是二（乙二醇）乙醚。将铅和二（乙二醇）乙醚的混合溶液在不大于190℃，优选不大于185℃的空气气氛中加热约80℃的时间 -5分钟。在加热步骤期间，监测溶液性质以确定反应何时完成，并且当所需产物的分解开始发生时。然后将该溶液加入到二（乙二醇）二乙醚中以制备PGO旋涂溶液。该第二步骤还需要将溶液加热至不高于190℃的温度，持续0.5至2.0小时的时间。该加热步骤也用UV光谱仪监测，以确定加热步骤何时终止。该方法产生适合用于旋涂的PGO前体溶液。

94. 发明授权

US06566753B2 Composite iridium barrier structure with oxidized refractory metal companion barrier 失效
$Composite iridium barrier structure with oxidized refractory metal companion barrier$
标题翻译：复合铱屏障结构与氧化难熔金属伴侣屏障
公开(公告)号：US06566753B2
公开(公告)日：2003-05-20
申请号：US10115394
申请日：2002-04-02
申请人： Fengyan Zhang , Sheng Teng Hsu
发明人： Fengyan Zhang , Sheng Teng Hsu
IPC分类号： H01L2976
CPC分类号： H01L21/28291 , H01L21/28568 , H01L28/75 , H01L29/513 , H01L29/516 , H01L29/78391
摘要： An Ir—M—O composite film has been provided that is useful in forming an electrode of a ferroelectric capacitor, where M includes a variety of refractory metals. The Ir combination film effectively prevents oxygen diffusion, and is resistant to high temperature annealing in oxygen environments. When used with an underlying barrier layer made from oxidizing the same variety of M transition metals, the resulting conductive barrier also suppresses the diffusion of Ir into any underlying Si substrates. As a result, Ir silicide products are not formed, which degrade the electrode interface characteristics. The Ir combination film remains conductive, not peeling or forming hillocks, during high temperature annealing processes, even in oxygen. The Ir—M—O conductive electrode/barrier structures are useful in nonvolatile MFMIS (metal/ferro/metal/insulator/silicon) memory devices, DRAMs, capacitors, pyroelectric infrared sensors, optical displays, and piezoelectric transducers. A method for forming an Ir—M—O composite film barrier layer with an oxidized refractory metal barrier layer is also provided.
摘要翻译：已经提供了可用于形成铁电电容器的电极的Ir-M-O复合膜，其中M包括各种难熔金属。 Ir组合膜有效防止氧气扩散，并且在氧气环境中耐高温退火。当与通过氧化相同种类的M过渡金属制成的底层阻挡层一起使用时，所得到的导电屏障还抑制Ir扩散到任何下面的Si衬底中。结果，不形成铱硅化物产物，这降低了电极界面的特性。即使在氧气中，Ir组合膜在高温退火过程中也保持导电性，不会剥离或形成小丘。 Ir-M-O导电电极/阻挡结构可用于非易失性MFMIS（金属/铁/金属/绝缘体/硅）存储器件，DRAM，电容器，热释电红外传感器，光学显示器和压电换能器。还提供了一种用于形成具有氧化的难熔金属阻挡层的Ir-M-O复合膜阻挡层的方法。

95. 发明授权

US06479304B1 Iridium composite barrier structure and method for same 有权
标题翻译：铱复合阻挡结构及方法相同
公开(公告)号：US06479304B1
公开(公告)日：2002-11-12
申请号：US09717993
申请日：2000-11-21
申请人： Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
发明人： Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
IPC分类号： H01L2100
CPC分类号： H01L28/75 , H01L21/28291 , H01L28/55 , H01L29/516
摘要： An Ir combination film has been provided that is useful in forming an electrode of a ferroelectric capacitor. The combination film includes tantalum and oxygen, as well as iridium. The Ir combination film effectively prevents oxygen diffusion, and is resistant to high temperature annealing in oxygen environments. When used with an underlying Ta or TaN layer, the resulting conductive barrier also suppresses to diffusion of Ir into any underlying Si substrates. As a result, Ir silicide products are not formed, which degrade the electrode interface characteristics. That is, the Ir combination film remains conductive, not peeling or forming hillocks, during high temperature annealing processes, even in oxygen. A method for forming an Ir composite film barrier layer and Ir composite film ferroelectric electrode are also provided.
摘要翻译：已经提供了可用于形成铁电电容器的电极的Ir组合膜。组合膜包括钽和氧，以及铱。 Ir组合膜有效防止氧气扩散，并且在氧气环境中耐高温退火。当与下面的Ta或TaN层一起使用时，所得到的导电屏障还抑制Ir扩散到任何下面的Si衬底中。结果，不形成铱硅化物产物，这降低了电极界面的特性。也就是说，即使在氧气中，Ir组合膜在高温退火过程中仍保持导电性，不会剥离或形成小丘。还提供了形成Ir复合膜阻挡层和Ir复合膜铁电电极的方法。

96. 发明授权

US06288420B1 Composite iridium-metal-oxygen barrier structure with refractory metal companion barrier 有权
$Composite iridium-metal-oxygen barrier structure with refractory metal companion barrier$
标题翻译：复合铱金属氧阻隔结构与难熔金属伴侣屏障
公开(公告)号：US06288420B1
公开(公告)日：2001-09-11
申请号：US09703192
申请日：2000-10-31
申请人： Fengyan Zhang , Sheng Teng Hsu , Jer-shen Maa , Wei-Wei Zhuang
发明人： Fengyan Zhang , Sheng Teng Hsu , Jer-shen Maa , Wei-Wei Zhuang
IPC分类号： H01L2976
CPC分类号： H01L28/75 , H01L21/28568 , H01L28/55
摘要： An Ir—M—O composite film has been provided that is useful in forming an electrode of a ferroelectric capacitor, where M includes a variety of refractory metals. The Ir combination film is resistant to high temperature annealing in oxygen environments. When used with an underlying barrier layer made from the same variety of M transition metals, the resulting conductive barrier also suppresses to diffusion of Ir into any underlying Si substrates. As a result, Ir silicide products are not formed, which degrade the electrode interface characteristics. That is, the Ir combination film remains conductive, not peeling or forming hillocks, during high temperature annealing processes, even in oxygen. The Ir—M—O conductive electrode/barrier structures are useful in nonvolatile FeRAM devices, DRAMs, capacitors, pyroelectric infrared sensors, optical displays, optical switches, piezoelectric transducers, and surface acoustic wave devices. A method for forming an Ir—M—O composite film barrier layer and an Ir—M—O composite film ferroelectric electrode are also provided.
摘要翻译：已经提供了可用于形成铁电电容器的电极的Ir-M-O复合膜，其中M包括各种难熔金属。 Ir组合膜在氧气环境中耐高温退火。当与由相同种类的M过渡金属制成的底层阻挡层一起使用时，所得到的导电屏障还抑制Ir扩散到任何下面的Si衬底中。结果，不形成铱硅化物产物，这降低了电极界面的特性。也就是说，即使在氧气中，Ir组合膜在高温退火过程中仍保持导电性，不会剥离或形成小丘。 Ir-M-O导电电极/屏障结构可用于非易失性FeRAM器件，DRAM，电容器，热释电红外传感器，光学显示器，光开关，压电换能器和表面声波器件。还提供了形成Ir-M-O复合膜阻挡层和Ir-M-O复合膜铁电电极的方法。

97. 发明授权

US06468901B1 Nickel silicide including iridium for use in ultra-shallow junctions with high thermal stability and method of manufacturing the same 有权
标题翻译：包括用于具有高热稳定性的超浅结的铱的硅化镍及其制造方法
公开(公告)号：US06468901B1
公开(公告)日：2002-10-22
申请号：US09847873
申请日：2001-05-02
申请人： Jer-shen Maa , Yoshi Ono , Fengyan Zhang
发明人： Jer-shen Maa , Yoshi Ono , Fengyan Zhang
IPC分类号： H01L2144
CPC分类号： H01L21/28518
摘要： An integrated circuit device, and a method of manufacturing the same, including nickel silicide on a silicon substrate fabricated with an iridium interlayer. In one embodiment the method comprises depositing an iridium (Ir) interface layer between the Ni and Si layers prior to the silicidation reaction. The thermal stability is much improved by adding the thin iridium layer. This is shown by the low junction leakage current of the ultra-shallow junction, and by the low sheet resistance of the silicide, even after annealing at 850° C.
摘要翻译：一种集成电路器件及其制造方法，包括用铱中间层制造的硅衬底上的硅化镍。在一个实施方案中，该方法包括在硅化反应之前在Ni和Si层之间沉积铱（Ir）界面层。通过添加薄铱层，热稳定性大大提高。即使在850℃退火之后，超浅结的低结漏电流和硅化物的薄片电阻也被示出。

98. 发明申请

US20060068509A1 MFIS ferroelectric memory array 有权
公开(公告)号：US20060068509A1
公开(公告)日：2006-03-30
申请号：US11262545
申请日：2005-10-28
申请人： Sheng Hsu , Fengyan Zhang , Tingkai Li
发明人： Sheng Hsu , Fengyan Zhang , Tingkai Li
IPC分类号： H01L21/00
CPC分类号： H01L27/1159 , H01L21/84 , H01L27/11502 , H01L27/11585
摘要： An MFIS memory array having a plurality of MFIS memory transistors with a word line connecting a plurality of MFIS memory transistor gates, wherein all MFIS memory transistors connected to a common word line have a common source, each transistor drain serves as a bit output, and all MFIS channels along a word line are separated by a P+ region and are further joined to a P+ substrate region on an SOI substrate by a P+ region is provided. Also provided are methods of making an MFIS memory array on an SOI substrate; methods of performing a block erase of one or more word lines, and methods of selectively programming a bit.

99. 发明申请

US20060099724A1 Memory cell with buffered layer 有权
标题翻译：带缓冲层的存储单元
公开(公告)号：US20060099724A1
公开(公告)日：2006-05-11
申请号：US11314222
申请日：2005-12-21
申请人： Sheng Hsu , Tingkai Li , Fengyan Zhang , Wei Pan , Wei-Wei Zhuang , David Evans , Masayuki Tajiri
发明人： Sheng Hsu , Tingkai Li , Fengyan Zhang , Wei Pan , Wei-Wei Zhuang , David Evans , Masayuki Tajiri
IPC分类号： H01L21/00 , H01L21/20
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2213/31 , G11C2213/51 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L45/04 , H01L45/12 , H01L45/1233 , H01L45/147
摘要： A method is provided for forming a buffered-layer memory cell. The method comprises: forming a bottom electrode; forming a colossal magnetoresistance (CMR) memory film overlying the bottom electrode; forming a memory-stable semiconductor buffer layer, typically a metal oxide, overlying the memory film; and, forming a top electrode overlying the semiconductor buffer layer. In some aspects of the method the semiconductor buffer layer is formed from YBa2Cu3O7-X (YBCO), indium oxide (In2O3), or ruthenium oxide (RuO2), having a thickness in the range of 10 to 200 nanometers (nm). The top and bottom electrodes may be TiN/Ti, Pt/TiN/Ti, In/TiN/Ti, PtRhOx compounds, or PtIrOx compounds. The CMR memory film may be a Pr1-XCaXMnO3 (PCMO) memory film, where x is in the region between 0.1 and 0.6, with a thickness in the range of 10 to 200 nm.
摘要翻译：提供了一种用于形成缓冲层存储单元的方法。该方法包括：形成底部电极; 形成覆盖底部电极的巨大磁阻（CMR）记忆膜; 形成存储器稳定的半导体缓冲层，通常为覆盖存储膜的金属氧化物; 并且形成覆盖半导体缓冲层的顶部电极。在该方法的一些方面，半导体缓冲层由YBa 2 N 3 O 7-X（YBCO），氧化铟（In 2或2 O 3）或氧化钌（RuO 2 N 2），其厚度在10-200纳米（nm）的范围内。顶部和底部电极可以是TiN / Ti，Pt / TiN / Ti，In / TiN / Ti，PtRhOx化合物或PtIrOx化合物。 CMR存储器膜可以是Pr 1-X C x MnO 3（PCMO）存储膜，其中x在0.1之间的区域和0.6，厚度在10至200nm的范围内。

100. 发明申请

US20060068508A1 Method for operating an MFIS ferroelectric memory array 有权
标题翻译：用于操作MFIS铁电存储器阵列的方法
公开(公告)号：US20060068508A1
公开(公告)日：2006-03-30
申请号：US11262117
申请日：2005-10-28
申请人： Sheng Hsu , Fengyan Zhang , Tingkai Li
发明人： Sheng Hsu , Fengyan Zhang , Tingkai Li
IPC分类号： H01L21/00
CPC分类号： H01L27/1159 , H01L21/84 , H01L27/11502 , H01L27/11585
摘要： An MFIS memory array having a plurality of MFIS memory transistors with a word line connecting a plurality of MFIS memory transistor gates, wherein all MFIS memory transistors connected to a common word line have a common source, each transistor drain serves as a bit output, and all MFIS channels along a word line are separated by a P+ region and are further joined to a P+ substrate region on an SOI substrate by a P+ region is provided. Also provided are methods of making an MFIS memory array on an SOI substrate; methods of performing a block erase of one or more word lines, and methods of selectively programming a bit.
摘要翻译：一种MFIS存储器阵列，具有多个具有连接多个MFIS存储晶体管栅极的字线的MFIS存储晶体管，其中连接到公共字线的所有MFIS存储晶体管具有公共源，每个晶体管漏极用作位输出，以及沿着字线的所有MFIS通道被P +区隔开，并且通过P +区进一步连接到SOI衬底上的P +衬底区域。还提供了在SOI衬底上制造MFIS存储器阵列的方法; 执行一个或多个字线的块擦除的方法以及有选择地编程位的方法。

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