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91. 发明申请

US20080283909A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080283909A1
公开(公告)日：2008-11-20
申请号：US12122165
申请日：2008-05-16
申请人： Miwako Akiyama , Yusuke Kawaguchi , Yoshihiro Yamaguchi
发明人： Miwako Akiyama , Yusuke Kawaguchi , Yoshihiro Yamaguchi
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/26586 , H01L29/1095 , H01L29/41766 , H01L29/66727 , H01L29/66734
摘要： A semiconductor device includes a second-conductivity-type base region provided on a first-conductivity-type semiconductor layer, a first-conductivity-type source region provided on the second-conductivity-type base region, a gate insulating film covering an inner wall of a trench which passes through the second-conductivity-type base region and reaching the first-conductivity-type semiconductor layer, a gate electrode buried in the trench via the gate insulating film, and a second-conductivity-type region being adjacent to the second-conductivity-type base region below the first-conductivity-type source region, spaced from the gate insulating film, and having a higher impurity concentration than the second-conductivity-type base region. c≧d is satisfied, where d is a depth from an upper surface of the first-conductivity-type source region to a lower end of the gate electrode, and c is a depth from an upper surface of the first-conductivity-type source region to a lower surface of the second-conductivity-type base region.
摘要翻译：半导体器件包括设置在第一导电型半导体层上的第二导电型基极区域，设置在第二导电型基极区域上的第一导电型源极区域，覆盖内壁的栅极绝缘膜通过所述第二导电型基极区域并到达所述第一导电型半导体层的沟槽，经由所述栅极绝缘膜埋设在所述沟槽中的栅电极，以及与所述第二导电型基极区相邻的第二导电型区域与第一导电型源极区域相邻的第二导电型基极区域，与栅极绝缘膜间隔开，并且具有比第二导电型基极区域更高的杂质浓度。 c> = d，其中d是从第一导电型源极区域的上表面到栅极电极的下端的深度，c是从第一导电型源极区域的上表面开始的深度源极区域延伸到第二导电型基极区域的下表面。

92. 发明授权

US07323719B2 Group III-V nitride series semiconductor substrate and assessment method therefor 有权
标题翻译： III-V族氮化物系半导体衬底及其评估方法
公开(公告)号：US07323719B2
公开(公告)日：2008-01-29
申请号：US11033469
申请日：2005-01-12
申请人： Yusuke Kawaguchi
发明人： Yusuke Kawaguchi
IPC分类号： H01L27/15
CPC分类号： G01N21/6489 , H01L21/02389 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L21/0262 , H01L33/0075
摘要： The group III-V nitride series semiconductor substrate has good-product yield when the band-edge peak light-emission intensity ratio α=N1/N2 is α
摘要翻译：当带边峰值发光强度比α= N 1 / N 2时，III-V族氮化物系半导体衬底具有良好的产品产量，为α<1 其中N 1是在基板正面的任意光致发光测量位置处的带边峰值发光强度，N 2是带边缘峰值发光强度对应于光致发光测量位置的衬底背面的峰值发光强度。

93. 发明申请

US20060231917A1 Semiconductor device 失效
公开(公告)号：US20060231917A1
公开(公告)日：2006-10-19
申请号：US11399448
申请日：2006-04-07
申请人： Syotaro Ono , Wataru Saito , Yusuke Kawaguchi
发明人： Syotaro Ono , Wataru Saito , Yusuke Kawaguchi
IPC分类号： H01L29/00
CPC分类号： H01L29/7813 , H01L29/0615 , H01L29/063 , H01L29/0634 , H01L29/402 , H01L29/41741 , H01L29/7811
摘要： This semiconductor device comprises a pillar layer including a first semiconductor pillar layer of a first conductivity type and a second semiconductor pillar layer of a second conductivity type formed alternately on a first semiconductor layer. At the same depth position in the device region and the end region, a difference between an impurity concentration [cm-3] of the second semiconductor pillar layer in the device region and that of the second semiconductor pillar layer in the end region is less than plus or minus 5%. A width W11 [um] of the first semiconductor pillar layer in the device region, a width W21 [um] of the second semiconductor pillar layer in the device region, a width W12 [um] of the first semiconductor pillar layer in the end region, and a width W22 [um] of the second semiconductor pillar layer in the end region, meet the relationship of W21/W11

94. 发明授权

US06787848B2 Vertical type power mosfet having trenched gate structure 有权
标题翻译：具有沟槽栅极结构的垂直型功率MOSFET
公开(公告)号：US06787848B2
公开(公告)日：2004-09-07
申请号：US10184974
申请日：2002-07-01
申请人： Syotaro Ono , Yusuke Kawaguchi
发明人： Syotaro Ono , Yusuke Kawaguchi
IPC分类号： H01L2976
CPC分类号： H01L29/7813 , H01L29/0847 , H01L29/0878 , H01L29/42368 , H01L29/7828
摘要： A power MOSFET comprising a drain layer of a first conductivity type, a drift layer of the first conductivity type provided on the drain layer, a base layer of a first or a second conductivity type provided on the drift layer, a source region of the first conductivity type provided on the base layer, a gate insulating film formed on an inner wall surface of a trench penetrating the base layer and reaching at the drift layer, and a gate electrode provided on the gate insulating film inside the trench, wherein the gate insulating film is formed such that a portion thereof adjacent to the drift layer is thicker than a portion thereof adjacent to the base layer, and the drift layer has an impurity concentration gradient higher in the vicinity of the drain layer and lower in the vicinity of the source region along a depth direction of trench.
摘要翻译：一种功率MOSFET，包括第一导电类型的漏极层，设置在漏极层上的第一导电类型的漂移层，设置在漂移层上的第一或第二导电类型的基极层，第一导电类型的源极区域设置在基底层上的导电类型，形成在穿过基底层并到达漂移层的沟槽的内壁表面上的栅极绝缘膜，以及设置在沟槽内部的栅极绝缘膜上的栅电极，其中栅极绝缘膜形成为使得其与漂移层相邻的部分比与基底层相邻的部分厚，并且漂移层在漏极层附近具有较高的杂质浓度梯度，并且在源极附近较低区域沿着沟槽的深度方向。

95. 发明授权

US5777371A High-breakdown-voltage semiconductor device 失效
标题翻译：高击穿电压半导体器件
公开(公告)号：US5777371A
公开(公告)日：1998-07-07
申请号：US716863
申请日：1996-09-20
申请人： Yusuke Kawaguchi , Yoshihiro Yamaguchi , Hideyuki Funaki
发明人： Yusuke Kawaguchi , Yoshihiro Yamaguchi , Hideyuki Funaki
IPC分类号： H01L29/06 , H01L29/10 , H01L29/423 , H01L29/78 , H01L29/76 , H01L29/94
CPC分类号： H01L29/7816 , H01L29/0696 , H01L29/1095 , H01L29/7801 , H01L29/7824 , H01L29/42368
摘要： A high-breakdown-voltage semiconductor device includes a high-resistance semiconductor layer, a drift layer of the first conductivity type selectively formed in the surface of the high-resistance semiconductor layer, a drain layer formed in the surface of the drift layer of the first conductivity type, base layers of the second conductivity type selectively formed in the surface of the high-resistance semiconductor layer, a plurality of island-shaped source layers of the first conductivity type formed in the surfaces of the base layers of the second conductivity type, a gate electrode formed on the base layers of the second conductivity type between the source layers of the first conductivity type and the drift layer of the first conductivity type and between adjacent source layers of the first conductivity type via a gate insulating film, a drain electrode which contacts the drain layer, and source electrodes which contact both the source layers of the first conductivity type and the base layers of the second conductivity type.
摘要翻译：高耐压半导体器件包括高电阻半导体层，选择性地形成在高电阻半导体层的表面中的第一导电类型的漂移层，形成在所述高电阻半导体层的漂移层的表面中的漏极层第一导电类型，选择性地形成在高电阻半导体层的表面中的第二导电类型的基极层，形成在第二导电类型的基极层的表面中的多个第一导电类型的岛状源极层形成在第一导电类型的源极层和第一导电类型的漂移层之间的第二导电类型的基极层上的栅极电极和经由栅极绝缘膜的第一导电类型的相邻源极层之间，与漏极层接触的电极以及接触第一导电类型的源极层的源电极第二导电类型的基层。

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