专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

91. 发明授权

US07238508B2 EPSP synthase highly tolerant to glyphosate 有权
标题翻译： EPSP合成酶高度耐受草甘膦
公开(公告)号：US07238508B2
公开(公告)日：2007-07-03
申请号：US10913651
申请日：2004-08-06
申请人： Min Lin , Kexuan Tang , Yiping Wang , Jin Wang , Yu Zhu
发明人： Min Lin , Kexuan Tang , Yiping Wang , Jin Wang , Yu Zhu
IPC分类号： C12N15/82 , C12N9/10 , C07H20/04
CPC分类号： C12N9/1092 , C12N15/8275
摘要： An isolated polypeptide comprising an amino acid sequence that is at least 62% identical to SEQ ID NO:2. The polypeptide, when present in a cell, increases the cell's ability to tolerate glyphosate. Also disclosed are related nucleic acid, antibody, vector, transgenic plant, as well as uses thereof.
摘要翻译：包含与SEQ ID NO：2至少62％相同的氨基酸序列的分离的多肽。当存在于细胞中时，多肽增加细胞耐受草甘膦的能力。还公开了相关的核酸，抗体，载体，转基因植物及其用途。

92. 发明申请

US20070149206A1 METHOD AND SYSTEM FOR ADJUSTING UPLINK TRANSMISSION TIMING FOR LONG TERM EVOLUTION HANDOVER 审中-公开
标题翻译：用于调整长时间演变切换的上行传输时序的方法和系统
公开(公告)号：US20070149206A1
公开(公告)日：2007-06-28
申请号：US11612837
申请日：2006-12-19
申请人： Jin Wang , Stephen Terry
发明人： Jin Wang , Stephen Terry
IPC分类号： H04Q7/20
CPC分类号： H04W36/0077 , H04W36/0072 , H04W36/00837 , H04W36/0085 , H04W56/0015 , H04W56/0045 , H04W92/10
摘要： A method and system for adjusting uplink transmission timing when sending an initial transmission to a target cell/Node-B of an evolved universal terrestrial radio access network (E-UTRAN) immediately after handover from a source cell/Node-B of the E-UTRAN. In one embodiment, a user equipment (UE) autonomously computes and applies a timing advance (TA) value based on the current source cell/Node-B timing value, cell/Node-B beacon channel reference signal measurements and knowledge of the relative time difference, (if any), between the source and target cells/Node-Bs. In another embodiment, the UE sends a scheduling request message or real data packets with the computed TA value applied to the uplink transmission timing to the E-UTRAN via pre-allocated non-contention based uplink radio resources. In an alternate embodiment, the UE sends a scheduling request message with the new computed TA value applied to the UL transmission timing to an E-UTRAN via a synchronous random access channel (RACH).
摘要翻译：一种在从E-UTRAN的源小区/节点B切换之后立即向演进的通用陆地无线电接入网络（E-UTRAN）的目标小区/节点B发送初始传输时调整上行链路传输定时的方法和系统， UTRAN。在一个实施例中，用户设备（UE）基于当前源小区/节点B定时值，小区/节点B信标信道参考信号测量和相对时间的知识自主地计算并应用定时提前（TA）值差异（如果有的话），在源和目标单元/节点B之间。在另一个实施例中，UE经由经预分配的基于非竞争的上行链路无线电资源向E-UTRAN发送具有应用于上行链路传输定时的计算的TA值的调度请求消息或实际数据分组。在替代实施例中，UE经由同步随机接入信道（RACH）向E-UTRAN发送具有应用于UL传输定时的新计算的TA值的调度请求消息。

93. 发明申请

US20070142949A1 Enhanced state estimation based upon information credibility 有权
标题翻译：基于信息可信度的增强状态估计
公开(公告)号：US20070142949A1
公开(公告)日：2007-06-21
申请号：US11313594
申请日：2005-12-21
申请人： Jin Wang , Qinghua He
发明人： Jin Wang , Qinghua He
IPC分类号： G06F19/00
CPC分类号： G05B13/024
摘要： A method, apparatus, and a system for performing an adaptive state estimation process for processing semiconductor wafers. A processing of a first workpiece is controlled using a process controller and a processing tool. Manufacturing data relating to the processing of the first workpiece is acquired. Status data relating to the manufacturing data is acquired. The status data includes data relating to the source of the manufacturing data. A state of a process controller or a processing tool is determined based upon the status data and the manufacturing data.
摘要翻译：一种用于执行用于处理半导体晶片的自适应状态估计处理的方法，装置和系统。使用过程控制器和处理工具来控制第一工件的处理。获取与第一工件的处理有关的制造数据。获取与制造数据相关的状态数据。状态数据包括与制造数据的源相关的数据。基于状态数据和制造数据确定过程控制器或处理工具的状态。

94. 发明申请

US20070117276A1 SMALL FORM FACTORY MOLDED MEMORY CARD AND A METHOD THEREOF 有权
标题翻译：小型工厂模具内存卡及其方法
公开(公告)号：US20070117276A1
公开(公告)日：2007-05-24
申请号：US11624615
申请日：2007-01-18
申请人： Ben Chen , Jin Wang , David Chen
发明人： Ben Chen , Jin Wang , David Chen
IPC分类号： H01L21/00
CPC分类号： B29C45/14647 , B29C45/14655 , B29C45/14836 , B29C45/2708 , H01L21/565 , H01L2224/48091 , H01L2224/48227 , H01L2924/19105 , H01L2924/30107 , H05K1/117 , H05K3/284 , H05K2201/10159 , H05K2201/10689 , H05K2201/10734 , H05K2203/1311 , H05K2203/1316 , H05K2203/304 , H01L2924/00014 , H01L2924/00
摘要： A shape-molding structure of a memory card comprises a circuit substrate, at least one chip, and an encapsulant covering. The upper and lower surfaces of the circuit substrate have a circuit layer and a plurality of electric contacts, respectively. The chip is located on the upper surface of the circuit substrate and electrically connected with the circuit layer. The encapsulant covering is formed by using a mold to press encapsulant entering at least one encapsulant inlet provided on at least one side surface of the circuit substrate. The encapsulant covering encapsulates all the above components with only the electric contacts exposed. A trace mark of the encapsulant inlet remaining on the encapsulant covering is then cut to obtain a shape-molding structure of memory card with an smooth and intact outer appearance.
摘要翻译：存储卡的形状模制结构包括电路基板，至少一个芯片和密封剂覆盖物。电路基板的上表面和下表面分别具有电路层和多个电触点。芯片位于电路基板的上表面并与电路层电连接。密封剂覆盖物通过使用模具来挤压进入设置在电路基板的至少一个侧表面上的至少一个密封剂入口的密封剂而形成。密封剂覆盖物仅将电触头暴露在外，将所有上述组件封装起来。然后切割保留在密封剂覆盖物上的密封剂入口的痕迹，以获得具有平滑和完整外观的存储卡的形状模制结构。

95. 发明授权

US06959224B2 Probability constrained optimization for electrical fabrication control 失效
标题翻译：概率约束优化电气制造控制
公开(公告)号：US06959224B2
公开(公告)日：2005-10-25
申请号：US10335748
申请日：2003-01-02
申请人： Richard P. Good , Gregory A. Cherry , Jin Wang
发明人： Richard P. Good , Gregory A. Cherry , Jin Wang
IPC分类号： G03F7/20 , G05B19/418 , H01L21/66 , G06F19/00
CPC分类号： G03F7/705 , G05B19/41885 , G05B2219/32015 , G05B2219/50129 , H01L22/20 , Y02P90/26
摘要： A method includes defining a model of a process for manufacturing a device, the process including a plurality of steps. A plurality of inline process targets are defined for at least a subset of the process steps. The model relates the inline process targets to a plurality of process output parameters. A first set of probabilistic constraints for the inline process targets is defined. A second set of probabilistic constraints for the process output parameters is defined. An objective function is defined based on the model and the plurality of process output parameters. A trajectory of the process output parameters is determined by optimizing the objective function subject to the first and second sets of probabilistic constraints for each process step to determine values for the inline process targets at each process step, the optimization being iterated after completion of each process step for the remaining process steps.
摘要翻译：一种方法包括定义用于制造设备的过程的模型，该过程包括多个步骤。为进程步骤的至少一个子集定义了多个内联过程目标。该模型将内联过程目标与多个过程输出参数相关联。定义了内联流程目标的第一组概率约束。定义了过程输出参数的第二组概率约束。基于模型和多个过程输出参数定义目标函数。过程输出参数的轨迹通过优化目标函数来确定，该目标函数受制于每个处理步骤的第一和第二组概率约束，以确定每个处理步骤中的内联过程目标的值，优化在每个过程完成之后重复步骤剩下的过程步骤。

96. 发明授权

US06781385B2 Apparatus for detecting current direction in bridge circuits and method thereof 有权
标题翻译：用于检测桥式电路中的电流方向的装置及其方法
公开(公告)号：US06781385B2
公开(公告)日：2004-08-24
申请号：US10137619
申请日：2002-05-02
申请人： Jianping Ying , Jin Wang , Zhigan Wu
发明人： Jianping Ying , Jin Wang , Zhigan Wu
IPC分类号： G01R3108
CPC分类号： G01R19/14
摘要： The invention relates to an apparatus and a method for detecting a current direction in a PWM converter or an inverter having one or more upper and lower arms, each of which consists of a switching device with an anti-parallel diode. The voltage across the switching device presents a different value and a polarity that depend on the direction of the current flowing through the switching device, wherein the current direction is acquired by sampling this voltage in the period of the trigger signal being on. In a case of small current, this sampled voltage value is relatively large to the flowing current magnitude and is easy to be distinguished. Furthermore, this invention presents a method for obtaining the phase angle between the load current and the output voltage, and judging whether the output current is zero or includes DC component. As a result, this method presents high precision.
摘要翻译：本发明涉及一种用于检测PWM转换器或具有一个或多个上臂和下臂的逆变器的电流方向的装置和方法，每一个由具有反并联二极管的开关装置组成。开关器件两端的电压呈现出不同的值和极性，这取决于流过开关器件的电流的方向，其中通过在触发信号导通的时段内对该电压进行采样来获取电流方向。在小电流的情况下，该采样电压值对于流动电流大小相对较大并且易于区分。此外，本发明提供了一种用于获得负载电流和输出电压之间的相位角的方法，并且判断输出电流是零还是包括直流分量。因此，该方法具有高精度。

97. 发明授权

US06773931B2 Dynamic targeting for a process control system 失效
公开(公告)号：US06773931B2
公开(公告)日：2004-08-10
申请号：US10207525
申请日：2002-07-29
申请人： Alexander J. Pasadyn , Thomas J. Sonderman , Jin Wang
发明人： Alexander J. Pasadyn , Thomas J. Sonderman , Jin Wang
IPC分类号： H01L2100
CPC分类号： H01L22/20 , G05B19/41865 , G05B2219/37295 , G05B2219/45031 , H01L2223/54453 , Y02P90/20
摘要： A method and an apparatus for dynamic targeting for a process control system. A process step is performed upon a first workpiece in a batch based upon a process target setting. The process target setting comprises at least one parameter relating to a target characteristic of the first workpiece. Manufacturing data relating to processing of the first workpiece is acquired. The manufacturing data comprises at least one of a metrology data relating to the processed first workpiece and a tool state data relating to the tool state of a processing tool. Electrical data relating to the processed first workpiece is acquired at least partially during processing of a second workpiece in the batch. The process target setting is adjusted dynamically based upon a correlation of the electrical data with the manufacturing data.

98. 外观设计

USD981083S1 Dress 有权
公开(公告)号：USD981083S1
公开(公告)日：2023-03-21
申请号：US29811394
申请日：2021-10-14
申请人： Jin Wang
设计人： Jin Wang

99. 发明授权

US11271659B1 Systems and methods for phase noise mitigation in optical superchannels 有权
公开(公告)号：US11271659B1
公开(公告)日：2022-03-08
申请号：US17001299
申请日：2020-08-24
申请人： Mrinmoy Jana , Jeebak Mitra , Lutz Hans-Joachim Lampe , Jin Wang , Zhuhong Zhang
发明人： Mrinmoy Jana , Jeebak Mitra , Lutz Hans-Joachim Lampe , Jin Wang , Zhuhong Zhang
IPC分类号： H04B10/61 , H04L5/00 , H04L25/03 , H04B10/00 , H04B10/079 , H04B10/25
摘要： A receiver architecture is described for phase noise compensation in the presence of inter-channel interference (ICI) and inter-symbol interference (ISI), particularly for time-frequency packing (TFP) transmissions. The receiver includes a coarse phase noise (PN) estimator, a PN compensation module, an ICI cancellation module, an ISI compensation module, a FEC decoder, and an iterative PN estimator. The iterative PN estimator receives log likelihood ratio (LLR) information from the decoder and provides an iterative PN estimation to the PN compensation module. The decoder also provides LLR to the ISI compensation module, and to at least one other receiver for another subchannel that is immediately adjacent in frequency. The ICI cancellation module receives decoder output from at least one adjacent subchannel, which the ICI cancellation module uses to provide a ICI-cancelled signal.

100. 外观设计

USD943250S1 Pair of plush slippers 有权
公开(公告)号：USD943250S1
公开(公告)日：2022-02-15
申请号：US29776336
申请日：2021-03-29
申请人： Jin Wang
设计人： Jin Wang

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式