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1. 发明申请

US20090273031A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20090273031A1
公开(公告)日：2009-11-05
申请号：US12408415
申请日：2009-03-20
申请人： Wataru SAITO , Syotaro ONO , Nana HATANO , Masakatsu TAKASHITA , Hiroshi OHTA , Miho WATANABE
发明人： Wataru SAITO , Syotaro ONO , Nana HATANO , Masakatsu TAKASHITA , Hiroshi OHTA , Miho WATANABE
IPC分类号： H01L29/78
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0878 , H01L29/1095
摘要： A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type provided on a major surface of the first semiconductor layer; a third semiconductor layer of a second conductivity type provided on the major surface of the first semiconductor layer, the third semiconductor layer forming a structure of periodical arrangement with the second semiconductor layer; a fourth semiconductor layer of the second conductivity type provided above the third semiconductor layer; a fifth semiconductor layer of the first conductivity type selectively provided on a surface of the fourth semiconductor layer; a first main electrode electrically connected to the first semiconductor layer; a second main electrode provided to contact a surface of the fifth semiconductor layer and a surface of the fourth semiconductor layer; and a control electrode provided above the fifth semiconductor layer, the fourth semiconductor layer, and the second semiconductor layer via an insulative film. A portion is provided locally in the third semiconductor layer, the portion depleting at a voltage not more than one third of a voltage at which the second semiconductor layer and the third semiconductor layer completely deplete.
摘要翻译：半导体器件包括：第一导电类型的第一半导体层; 设置在第一半导体层的主表面上的第一导电类型的第二半导体层; 设置在所述第一半导体层的主表面上的第二导电类型的第三半导体层，所述第三半导体层形成与所述第二半导体层的周期性布置的结构; 设置在第三半导体层上方的第二导电类型的第四半导体层; 选择性地设置在第四半导体层的表面上的第一导电类型的第五半导体层; 电连接到第一半导体层的第一主电极; 设置成与所述第五半导体层的表面和所述第四半导体层的表面接触的第二主电极; 以及通过绝缘膜设置在第五半导体层，第四半导体层和第二半导体层上方的控制电极。局部地设置在第三半导体层中的部分，其耗尽不超过第二半导体层和第三半导体层完全耗尽的电压的三分之一的电压。

2. 发明申请

US20080315297A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20080315297A1
公开(公告)日：2008-12-25
申请号：US12144985
申请日：2008-06-24
申请人： Masakatsu TAKASHITA , Yasuto SUMI , Masaru IZUMISAWA , Hiroshi OHTA , Wataru SAITO , Syotaro ONO
发明人： Masakatsu TAKASHITA , Yasuto SUMI , Masaru IZUMISAWA , Hiroshi OHTA , Wataru SAITO , Syotaro ONO
IPC分类号： H01L29/78
CPC分类号： H01L21/26513 , H01L21/26586 , H01L29/0615 , H01L29/0619 , H01L29/0634 , H01L29/1095 , H01L29/167 , H01L29/32 , H01L29/402 , H01L29/66712 , H01L29/7811
摘要： There is provided a semiconductor device having a drift layer with a pillar structure including first semiconductor layer portions of the first conduction type and second semiconductor layer portions of the second conduction type formed in pillars alternately and periodically on a semiconductor substrate. A device region includes a plurality of arrayed transistors composed of the first semiconductor layer portions and the second semiconductor layer portions. A terminal region is formed at the periphery of the device region without the transistors formed therein. The drift layer in the terminal region has a carrier lifetime lower than ⅕ the carrier lifetime in the drift layer in the device region.
摘要翻译：提供一种具有柱状结构的漂移层的半导体器件，其包括第一导电类型的第一半导体层部分和第二导电类型的第二半导体层部分在半导体衬底上交替周期地形成为柱状。器件区域包括由第一半导体层部分和第二半导体层部分组成的多个阵列晶体管。端子区域形成在器件区域的外围，而不形成晶体管。端子区域中的漂移层的载流子寿命低于器件区域漂移层中的载流子寿命的1/5。

3. 发明申请

US20090302376A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20090302376A1
公开(公告)日：2009-12-10
申请号：US12474073
申请日：2009-05-28
申请人： Naoyuki INOUE , Wataru SAITO , Satoshi AIDA , Masakatsu TAKASHITA , Koichi ARATANI
发明人： Naoyuki INOUE , Wataru SAITO , Satoshi AIDA , Masakatsu TAKASHITA , Koichi ARATANI
IPC分类号： H01L29/78
CPC分类号： H01L29/7811 , H01L29/0615 , H01L29/0619 , H01L29/0634 , H01L29/0638 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/41741 , H01L29/7395 , H01L29/8611
摘要： A semiconductor device includes: a first semiconductor layer of a first conductivity type having a first surface and a second surface opposite to the first surface, a cell region, and a terminal region surrounding the cell region, the cell region being configured to allow a current to flow between the first surface and the second surface; a first guard ring layer of a second conductivity type selectively formed in a surface portion of the first semiconductor layer in the terminal region, the first guard ring layer having a bottom surface thereof and internal and external side surfaces thereof; and a second guard ring layer of the second conductivity type selectively formed in the surface portion of the first semiconductor layer in the terminal region so as to cover a portion of the first guard ring layer at which the bottom surface and the external side surface intersect.
摘要翻译：半导体器件包括：第一导电类型的第一半导体层，具有第一表面和与第一表面相对的第二表面，单元区域和围绕单元区域的端子区域，所述单元区域被配置为允许电流在第一表面和第二表面之间流动; 在所述端子区域中选择性地形成在所述第一半导体层的表面部分中的第二导电类型的第一保护环层，所述第一保护环层具有底表面及其内侧和外侧表面; 以及第二导电类型的第二保护环层，其选择性地形成在端子区域中的第一半导体层的表面部分中，以覆盖底表面和外侧表面相交的第一保护环层的一部分。

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