专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07442074B2 Wiring board and method for producing the same 有权
标题翻译：接线板及其制造方法
公开(公告)号：US07442074B2
公开(公告)日：2008-10-28
申请号：US11558706
申请日：2006-11-10
申请人： Nozomi Shimoishizaka , Nobuyuki Koutani , Kouichi Nagao , Michiharu Torii , Yoshifumi Nakamura , Takayuki Tanaka
发明人： Nozomi Shimoishizaka , Nobuyuki Koutani , Kouichi Nagao , Michiharu Torii , Yoshifumi Nakamura , Takayuki Tanaka
IPC分类号： H01R12/24
CPC分类号： H05K3/242 , H01L2924/0002 , H05K3/0097 , H05K2201/094 , H05K2203/1545 , H01L2924/00
摘要： A wiring board includes first and second feeding electrodes (2, 3) provided along both sides of an insulating substrate (1), feeding bus lines (4) extending in a traverse direction and connected to both the feeding electrodes, and conductor wirings (6, 8, 12) having one side terminals forming inner leads having protruding electrodes (9, 11, 13) and the other side terminals connected to the feeding bus lines. The inner leads in each unit region are arranged in two lines extending in the traverse direction. The inner leads of a first group are arranged with a dense wiring pitch, and the inner leads of a second group include a dense pitch region in which a wiring pitch is the same as that of the inner leads of the first group, and a sparse pitch region in which a wiring pitch is longer than that of the inner leads of the first group. The inner leads (6) of the first group and the inner leads (12) in the dense pitch region of the second group are connected to the feeding bus line on one side of each region, and the inner leads (8) in the sparse pitch region of the second group are connected to the feeding bus line on the other side of each unit region. Non-uniformity of heights of the protruding electrodes due to a difference in the wiring pitches of the inner leads can be suppressed easily.
摘要翻译：布线板包括沿着绝缘基板（1）的两侧设置的第一和第二馈送电极（2,3），馈送沿横向方向延伸并连接到馈电电极的总线（4）和导体布线（6），8,12），其一个端子形成具有突出电极（9,11,13）的内部引线，另一个侧端子连接到馈电总线。每个单元区域中的内引线布置成沿横向方向延伸的两条线。第一组的内部引线布置成具有致密的布线间距，并且第二组的内部引线包括密集的间距区域，其中布线间距与第一组的内部引线相同，并且稀疏其中布线间距比第一组的内引线长的间距区域。第一组的内部引线（6）和第二组的密集间隔区域中的内部引线（12）在每个区域的一侧连接到馈电总线，并且内部引线（8）在稀疏第二组的音调区域连接到每个单元区域的另一侧的馈送总线。可以容易地抑制由于内部引线的布线间距的差异导致的突出电极的高度的不均匀性。

2. 发明授权

US07800913B2 Wiring board and semiconductor device using the same 有权
标题翻译：接线板和使用其的半导体器件
公开(公告)号：US07800913B2
公开(公告)日：2010-09-21
申请号：US11539706
申请日：2006-10-09
申请人： Michiharu Torii , Kouichi Nagao , Nozomi Shimoishizaka
发明人： Michiharu Torii , Kouichi Nagao , Nozomi Shimoishizaka
IPC分类号： H05K1/00
CPC分类号： H05K1/0271 , H01L23/49838 , H01L23/4985 , H01L2924/0002 , H05K1/111 , H05K1/189 , H05K2201/09254 , H05K2201/09781 , H05K2201/10674 , H01L2924/00
摘要： A wiring board includes: a flexible insulating base; a plurality of conductive wirings arranged on the insulating base, end portions of the conductive wirings defining inner leads at a region where a semiconductor chip is to be mounted; and bump electrodes that are provided respectively at the inner leads of the conductive wirings. The wiring board further includes: dummy inner leads having a shape and a pitch corresponding to a shape and a pitch of the inner leads and aligned with the inner leads, the dummy inner leads being provided with dummy bump electrodes corresponding to the bump electrodes; a trunk conductive wiring provided for a group of one or an adjacent plurality of the dummy inner leads; and a branch wiring branching off from the trunk conductive wiring, the branch wiring being connected with the dummy inner leads belonging to the group corresponding to the trunk conductive wiring. Stress concentration on the inner leads during packaging of the semiconductor chip, resulting from the sparse arrangement of the electrode pads of the semiconductor chip, can be alleviated, thus suppressing a break in the inner leads.
摘要翻译：布线板包括：柔性绝缘基底; 布置在所述绝缘基底上的多个导电布线，所述导电布线的端部在要安装半导体芯片的区域处限定内引线; 以及分别设置在导电布线的内引线处的凸起电极。布线板还包括：虚拟内引线，具有与内引线的形状和间距对应的形状和间距，并与内引线对准，虚拟内引线设置有与突起电极对应的虚设凸起电极; 为一组或相邻的多个虚拟内引线设置的躯干导电布线; 以及从所述主干导电布线分支的分支布线，所述分支布线与属于与所述导体布线对应的组的所述虚拟内部引线连接。可以减轻由半导体芯片的电极焊盘的稀疏布置导致的半导体芯片封装期间的内部引线上的应力集中，从而抑制内部引线的断裂。

3. 发明授权

US08283775B2 Wiring board, semiconductor device and method for manufacturing the same 有权
标题翻译：接线板，半导体器件及其制造方法
公开(公告)号：US08283775B2
公开(公告)日：2012-10-09
申请号：US13049307
申请日：2011-03-16
申请人： Nozomi Shimoishizaka , Yoshifumi Nakamura , Kouichi Nagao
发明人： Nozomi Shimoishizaka , Yoshifumi Nakamura , Kouichi Nagao
IPC分类号： H01L23/34 , H01L23/10
CPC分类号： H01L23/4334 , H01L21/563 , H01L23/3107 , H01L23/3121 , H01L23/36 , H01L23/3677 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/90 , H01L2224/02166 , H01L2224/0401 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/1703 , H01L2224/17051 , H01L2224/171 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48257 , H01L2224/48465 , H01L2224/73203 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73265 , H01L2224/81136 , H01L2224/81193 , H01L2224/81205 , H01L2224/81801 , H01L2224/83192 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12041 , H01L2924/181 , H01L2924/1815 , H01L2924/18301 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device including a semiconductor element 1 having an active element region 1a, a plurality of element electrodes 2 formed on a principal face of the semiconductor element, external terminals 6 and 7 connected to one or more element electrodes via connection members 8 and 9, one or more first heat-dissipation protrusions 4 formed on the principal face of the semiconductor element, an insulation resin layer 10 covering the principal face of the semiconductor element and the first heat-dissipation protrusions, and a heat-dissipation medium 11 contacting a face of the insulation resin layer on a side opposite to a side contacting front faces of the first heat-dissipation protrusions. At least a part of the active element region is included in a region below a bottom face of the first heat-dissipation protrusion, the first heat-dissipation protrusion is not connected to the external terminal within the active element region, a thermal conductivity of the first heat-dissipation protrusion is larger than a thermal conductivity of the insulation resin layer, and a thickness of the insulation resin layer from the front face of the first heat-dissipation protrusion to the heat-dissipation medium is thinner than a thickness of the insulation resin layer from the principal face of the semiconductor element to the heat-dissipation medium. Thereby, it is possible to improve the speed of dissipating heat from the active element region of the mounted semiconductor element to the heat-dissipation medium.
摘要翻译：一种半导体器件，包括具有有源元件区域1a的半导体元件1，形成在半导体元件的主面上的多个元件电极2，经由连接构件8和9连接到一个或多个元件电极的外部端子6和7，形成在半导体元件的主面上的一个或多个第一散热突起4，覆盖半导体元件的主面的绝缘树脂层10和第一散热突起，以及与面对面接触的散热介质11 绝缘树脂层的与接触第一散热突起的前表面的一侧相反的一侧。有源元件区域的至少一部分被包括在第一散热突起的底面下方的区域中，第一散热突起不与有源元件区域内的外部端子连接，导热系数第一散热突起大于绝缘树脂层的导热率，绝缘树脂层从第一散热突起到散热介质的前表面的厚度比绝缘层的厚度薄树脂层从半导体元件的主面到散热介质。因此，可以提高从安装的半导体元件的有源元件区域到散热介质的散热速度。

4. 发明授权

US07514802B2 Wiring board 有权
标题翻译：接线板
公开(公告)号：US07514802B2
公开(公告)日：2009-04-07
申请号：US11531381
申请日：2006-09-13
申请人： Michinari Tetani , Takayuki Tanaka , Hiroyuki Imamura , Nozomi Shimoishizaka , Kouichi Nagao
发明人： Michinari Tetani , Takayuki Tanaka , Hiroyuki Imamura , Nozomi Shimoishizaka , Kouichi Nagao
IPC分类号： H01L23/544
CPC分类号： H01L23/544 , H01L23/4985 , H01L24/81 , H01L2223/5442 , H01L2223/54473 , H01L2224/81121 , H01L2224/81192 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H05K1/0269 , H05K1/0393 , H05K3/0097 , H05K3/303 , H05K2201/0367 , H05K2201/09781 , H05K2201/09918 , H05K2201/10674 , H05K2203/1545 , H05K2203/166
摘要： A flexible insulating base, a plurality of conductor wirings aligned on the flexible insulating base, and bump electrodes provided respectively in end portions of the plurality of conductor wirings in a region where a semiconductor chip is to be placed are provided. The semiconductor chip is mounted on the conductor wirings by bonding electrode pads formed on the semiconductor chip to the bump electrodes. An auxiliary conductor wiring formed similarly to the conductor wirings is provided on the insulating base, and an auxiliary bump electrode formed similarly to the bump electrodes is provided on the auxiliary conductor wiring, so that the electrode pads formed on the semiconductor chip can be registered with respect to the bump electrodes on the conductor wirings by positioning the semiconductor chip with reference to the auxiliary bump electrode. It is possible to configure a wiring board having register marks capable of positioning electrode pads of a semiconductor chip with respect to bump electrodes with high accuracy.
摘要翻译：提供柔性绝缘基座，在柔性绝缘基座上对准的多个导体布线和分别设置在要放置半导体芯片的区域中的多个导体布线的端部中的凸起电极。通过将形成在半导体芯片上的电极焊盘接合到凸块电极，将半导体芯片安装在导体布线上。在导体布线上形成类似于导体布线的辅助导体布线设置在绝缘基底上，并且在辅助导体布线上设置类似于隆起电极形成的辅助凸起电极，使得形成在半导体芯片上的电极焊盘可以被注册通过相对于辅助凸起电极定位半导体芯片，相对于导体布线上的凸块电极。可以配置具有能够高精度地相对于凸块电极定位半导体芯片的电极焊盘的对准标记的布线板。

5. 发明申请

US20090008771A1 SEMICONDUCTOR MODULE DEVICE, METHOD OF MANUFACTURING THE SAME, FLAT PANEL DISPLAY, AND PLASMA DISPLAY PANEL 审中-公开
标题翻译：半导体模块装置，其制造方法，平板显示器和等离子体显示面板
公开(公告)号：US20090008771A1
公开(公告)日：2009-01-08
申请号：US12166530
申请日：2008-07-02
申请人： Michiharu Torii , Nozomi Shimoishizaka
发明人： Michiharu Torii , Nozomi Shimoishizaka
IPC分类号： H01L23/36 , H01L21/58
CPC分类号： H01L23/3675 , H01L23/4985 , H01L23/552 , H01L24/50 , H01L24/81 , H01L24/83 , H01L24/86 , H01L2023/4043 , H01L2023/4087 , H01L2224/73253 , H01L2224/81801 , H01L2224/83 , H01L2924/01019 , H01L2924/01029 , H01L2924/01078 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/16152 , H01L2924/3025
摘要： Metal foil 1 is provided on a surface of a flexible substrate 4 so as to be thermally connected to a semiconductor chip 5, the surface being opposed to the other surface that is in contact with a radiator 2, and the metal foil 1 is screwed to the radiator 2 with fastening screws 3a. Thus heat generated from the semiconductor chip 5 is transmitted from one surface of the semiconductor chip 5 to the radiator 2 through a heat dissipating material 5b, and the heat is transmitted from the other surface of the semiconductor chip 5 to the radiator 2 through the metal foil 1, achieving heat transfer from the two surfaces of the semiconductor chip 5 to the radiator 2. Thus it is possible to improve heat dissipation without considerably increasing the number of components or a set weight.
摘要翻译：金属箔1设置在柔性基板4的表面上，以与半导体芯片5热连接，该表面与与散热器2接触的另一个表面相对，并且金属箔1被拧到具有紧固螺钉3a的散热器2。因此，从半导体芯片5产生的热量通过散热材料5b从半导体芯片5的一个表面传递到散热器2，并且热量通过金属从半导体芯片5的另一个表面传输到散热器2 箔1，实现从半导体芯片5的两个表面到散热器2的热传递。因此，可以在不显着增加部件数量或设定重量的情况下改善散热。

6. 发明授权

US07582968B2 Wiring board with a protective film greater in heights than bumps 有权
标题翻译：保护膜的接线板高于颠簸
公开(公告)号：US07582968B2
公开(公告)日：2009-09-01
申请号：US11558632
申请日：2006-11-10
申请人： Nozomi Shimoishizaka , Kouichi Nagao , Hiroyuki Imamura
发明人： Nozomi Shimoishizaka , Kouichi Nagao , Hiroyuki Imamura
IPC分类号： H01L23/48 , H05K7/00
CPC分类号： H01L23/4985 , H01L23/5387 , H01L2924/0002 , H05K1/0393 , H05K3/0097 , H05K3/242 , H05K3/243 , H05K3/28 , H05K3/4007 , H05K2201/0191 , H05K2201/0367 , H05K2201/09736 , H05K2203/0191 , H05K2203/1545 , H01L2924/00
摘要： A wiring board according to the present invention includes: an insulating base 22; a plurality of first conductor wirings 23a aligned in an inner region on the insulating base; bumps 24 formed on the respective first conductor wirings; and a protective film 25a that is formed on the insulating base so as to cover the first conductor wirings and has an opening region through which the bumps are exposed. The height of at least part of a surface of the protective film from a surface of the insulating base is greater than the height of the bumps from the surface of the insulating base. With this configuration, it is possible to decrease the thickness in the state where a protective tape is placed on the wiring board to protect bumps, thereby increasing the length of the wiring board that can be held by a reel for supplying the wiring board.
摘要翻译：根据本发明的布线板包括：绝缘基底22; 在绝缘基底上的内部区域中排列的多个第一导体布线23a; 形成在各自的第一导体布线上的凸块24; 以及保护膜25a，其形成在绝缘基底上以覆盖第一导体布线并具有露出凸起的开口区域。绝缘基底的表面的保护膜的表面的至少一部分的高度大于凸起从绝缘基底表面的高度。利用这种结构，可以在布线板上放置保护带的状态下减小厚度以保护凸起，从而增加可由用于供应布线板的卷轴保持的布线板的长度。

7. 发明申请

US20070120235A1 WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE 有权
标题翻译：接线板及其制造方法和半导体器件
公开(公告)号：US20070120235A1
公开(公告)日：2007-05-31
申请号：US11558632
申请日：2006-11-10
申请人： Nozomi Shimoishizaka , Kouichi Nagao , Hiroyuki Imamura
发明人： Nozomi Shimoishizaka , Kouichi Nagao , Hiroyuki Imamura
IPC分类号： H01L23/495
CPC分类号： H01L23/4985 , H01L23/5387 , H01L2924/0002 , H05K1/0393 , H05K3/0097 , H05K3/242 , H05K3/243 , H05K3/28 , H05K3/4007 , H05K2201/0191 , H05K2201/0367 , H05K2201/09736 , H05K2203/0191 , H05K2203/1545 , H01L2924/00
摘要： A wiring board according to the present invention includes: an insulating base 22; a plurality of first conductor wirings 23a aligned in an inner region on the insulating base; bumps 24 formed on the respective first conductor wirings; and a protective film 25a that is formed on the insulating base so as to cover the first conductor wirings and has an opening region through which the bumps are exposed. The height of at least part of a surface of the protective film from a surface of the insulating base is greater than the height of the bumps from the surface of the insulating base. With this configuration, it is possible to decrease the thickness in the state where a protective tape is placed on the wiring board to protect bumps, thereby increasing the length of the wiring board that can be held by a reel for supplying the wiring board.
摘要翻译：根据本发明的布线板包括：绝缘基底22; 在绝缘基底上的内部区域中排列的多个第一导体布线23a; 形成在各自的第一导体布线上的凸块24; 以及保护膜25a，其形成在绝缘基底上以覆盖第一导体布线，并且具有露出凸起的开口区域。绝缘基底的表面的保护膜的表面的至少一部分的高度大于凸起从绝缘基底表面的高度。利用这种结构，可以在布线板上放置保护带的状态下减小厚度以保护凸起，从而增加可由用于供应布线板的卷轴保持的布线板的长度。

8. 发明申请

US20050199979A1 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050199979A1
公开(公告)日：2005-09-15
申请号：US11122094
申请日：2005-05-05
申请人： Nozomi Shimoishizaka , Kazuyuki Kaino , Yoshifumi Nakamura , Keiji Miki , Kazumi Watase , Ryuichi Sahara
发明人： Nozomi Shimoishizaka , Kazuyuki Kaino , Yoshifumi Nakamura , Keiji Miki , Kazumi Watase , Ryuichi Sahara
IPC分类号： H01L21/768 , H01L21/822 , H01L23/12 , H01L23/31 , H01L23/48 , H01L23/522 , H01L27/04 , H01L29/00
CPC分类号： H01L23/3114 , H01L23/5227 , H01L2224/0401 , H01L2224/05555 , H01L2924/3011 , H01L2924/00014
摘要： A semiconductor device has a semiconductor chip, a first insulating film and an inductor. The semiconductor chip includes an integrated circuit formed on the main surface of the chip and a plurality of pad electrodes formed on the main surface of the chip and electrically connected to the integrated circuit. The first insulating film of an insulating resin material is formed on the main surface of the semiconductor chip, covers the integrated circuit, and includes a plurality of contact holes provided on the respective pad electrodes. The inductor is formed on the inductor formation region of the first insulating film, and both terminals of the inductor are connected to the pad electrodes through the contact holes, respectively. The inductor formation region of the first insulating film is formed thicker than a portion of the first insulating film around the contact hole.
摘要翻译：半导体器件具有半导体芯片，第一绝缘膜和电感器。半导体芯片包括形成在芯片的主表面上的集成电路和形成在芯片的主表面上并电连接到集成电路的多个焊盘电极。绝缘树脂材料的第一绝缘膜形成在半导体芯片的主表面上，覆盖集成电路，并且包括设置在各个焊盘电极上的多个接触孔。电感器形成在第一绝缘膜的电感器形成区域上，并且电感器的两个端子分别通过接触孔连接到焊盘电极。第一绝缘膜的电感器形成区域形成为比接触孔周围的第一绝缘膜的一部分厚。

9. 发明授权

US07279357B2 Method for fabricating a chip-scale-packaging (CSP) having an inductor 有权
标题翻译：具有电感器的芯片级封装（CSP）的制造方法
公开(公告)号：US07279357B2
公开(公告)日：2007-10-09
申请号：US11122094
申请日：2005-05-05
申请人： Nozomi Shimoishizaka , Kazuyuki Kaino , Yoshifumi Nakamura , Keiji Miki , Kazumi Watase , Ryuichi Sahara
发明人： Nozomi Shimoishizaka , Kazuyuki Kaino , Yoshifumi Nakamura , Keiji Miki , Kazumi Watase , Ryuichi Sahara
IPC分类号： H01L21/311 , H01L21/3205 , H01L23/48
CPC分类号： H01L23/3114 , H01L23/5227 , H01L2224/0401 , H01L2224/05555 , H01L2924/3011 , H01L2924/00014
摘要： A semiconductor device has a semiconductor chip, a first insulating film and an inductor. The semiconductor chip includes an integrated circuit formed on the main surface of the chip and a plurality of pad electrodes formed on the main surface of the chip and electrically connected to the integrated circuit. The first insulating film of an insulating resin material is formed on the main surface of the semiconductor chip, covers the integrated circuit, and includes a plurality of contact holes provided on the respective pad electrodes. The inductor is formed on the inductor formation region of the first insulating film, and both terminals of the inductor are connected to the pad electrodes through the contact holes, respectively. The inductor formation region of the first insulating film is formed thicker than a portion of the first insulating film around the contact hole.
摘要翻译：半导体器件具有半导体芯片，第一绝缘膜和电感器。半导体芯片包括形成在芯片的主表面上的集成电路和形成在芯片的主表面上并电连接到集成电路的多个焊盘电极。绝缘树脂材料的第一绝缘膜形成在半导体芯片的主表面上，覆盖集成电路，并且包括设置在各个焊盘电极上的多个接触孔。电感器形成在第一绝缘膜的电感器形成区域上，并且电感器的两个端子分别通过接触孔连接到焊盘电极。第一绝缘膜的电感器形成区域形成为比接触孔周围的第一绝缘膜的一部分厚。

10. 发明授权

US06784557B2 Semiconductor device including a diffusion layer formed between electrode portions 有权
标题翻译：半导体器件包括在电极部分之间形成的扩散层
公开(公告)号：US06784557B2
公开(公告)日：2004-08-31
申请号：US10307450
申请日：2002-12-02
申请人： Yoshifumi Nakamura , Ryuichi Sahara , Nozomi Shimoishizaka , Kazuyuki Kainou , Keiji Miki , Kazumi Watase , Yasutake Yaguchi
发明人： Yoshifumi Nakamura , Ryuichi Sahara , Nozomi Shimoishizaka , Kazuyuki Kainou , Keiji Miki , Kazumi Watase , Yasutake Yaguchi
IPC分类号： H01L2348
CPC分类号： H01L24/13 , H01L24/11 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05026 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05171 , H01L2224/05184 , H01L2224/05548 , H01L2224/05557 , H01L2224/05571 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05671 , H01L2224/05684 , H01L2224/114 , H01L2224/116 , H01L2224/13022 , H01L2224/13024 , H01L2224/13099 , H01L2224/131 , H01L2224/13147 , H01L2224/16 , H01L2224/81801 , H01L2924/0001 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/00012 , H01L2924/00014 , H01L2224/05552 , H01L2924/013
摘要： The semiconductor device includes a semiconductor element having an electrode formed on a surface thereof, and a metal wiring formed on the surface of the semiconductor element and electrically connected to the electrode. The metal wiring has an external electrode portion functioning as an external electrode. A thickness of the external electrode portion is greater than that of a non-electrode portion of the metal wiring, i.e., a portion of the metal wiring other than the external electrode portion.
摘要翻译：半导体器件包括在其表面上形成有电极的半导体元件和形成在半导体元件的表面上并与电极电连接的金属布线。金属布线具有用作外部电极的外部电极部分。外部电极部分的厚度大于金属布线的非电极部分的厚度，即除了外部电极部分之外的金属布线的一部分。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式