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1. 发明授权

US06837967B1 Method and apparatus for cleaning deposited films from the edge of a wafer 有权
标题翻译：从晶片边缘清除沉积膜的方法和装置
公开(公告)号：US06837967B1
公开(公告)日：2005-01-04
申请号：US10290437
申请日：2002-11-06
申请人： Michael J. Berman , Steven E. Reder , Rennie G. Barber
发明人： Michael J. Berman , Steven E. Reder , Rennie G. Barber
IPC分类号： H01J37/32 , H01L21/00 , H05H1/00
CPC分类号： H01L21/67069 , H01J37/3244 , H01J37/32623 , H01J37/32633 , H01L21/67028
摘要： A plasma edge cleaning apparatus is configured to remove film deposits from a wafer edge. A gas distribution manifold is annular shaped and positioned to provide plasma process gases near the edge of the wafer. A top insulator and a wafer support each include a magnetic coil to generate a magnetic field for shielding the selected portions of a wafer from the generated plasma. The top insulator is positioned above the wafer during edge processing so as to form a small gap between the top insulator and the wafer to prevent plasma from etching active die areas of the wafer.
摘要翻译：等离子体边缘清洁装置构造成从晶片边缘去除膜沉积物。气体分配歧管是环形的并且定位成在晶片的边缘附近提供等离子体处理气体。顶部绝缘体和晶片支架各自包括磁性线圈，以产生磁场，用于屏蔽所产生的等离子体的晶片的选定部分。顶部绝缘体在边缘处理期间位于晶片上方，以在顶部绝缘体和晶片之间形成小的间隙，以防止等离子体蚀刻晶片的有效裸片区域。

2. 发明授权

US06943055B2 Method and apparatus for detecting backside contamination during fabrication of a semiconductor wafer 失效
标题翻译：用于在制造半导体晶片期间检测背面污染的方法和装置
公开(公告)号：US06943055B2
公开(公告)日：2005-09-13
申请号：US10628601
申请日：2003-07-28
申请人： Michael J. Berman , George E. Bailey , Rennie G. Barber
发明人： Michael J. Berman , George E. Bailey , Rennie G. Barber
IPC分类号： H01L21/00 , H01L21/44
CPC分类号： H01L21/67259
摘要： A method of detecting contamination on a backside of a semiconductor wafer includes the steps of positioning the backside of the wafer in contact with a detection surface of a contaminant sensor, and detecting deformation of the detection surface of the contaminant sensor. The contaminant sensor may be incorporated into a fabrication device such as a wafer handling device, or can be utilized in the construction of a stand-alone device. An apparatus for detecting contamination on the backside of a semiconductor wafer is also disclosed.
摘要翻译：检测半导体晶片背面的污染物的方法包括以下步骤：将晶片的背面与污染物传感器的检测表面接触，并检测污染物传感器的检测表面的变形。污染物传感器可以结合到诸如晶片处理装置的制造装置中，或者可以用于独立装置的构造。还公开了一种用于检测半导体晶片背面污染的装置。

3. 发明授权

US06898064B1 System and method for optimizing the electrostatic removal of a workpiece from a chuck 失效
标题翻译：用于从卡盘优化工件的静电去除的系统和方法
公开(公告)号：US06898064B1
公开(公告)日：2005-05-24
申请号：US09942220
申请日：2001-08-29
申请人： Michael J. Berman , Rennie G. Barber
发明人： Michael J. Berman , Rennie G. Barber
IPC分类号： H01L21/683 , H01T23/00
CPC分类号： H01L21/6831
摘要： A system and method are presented for neutralizing the electric charge binding a semiconductor wafer to an electrostatic chuck. When processing of a semiconductor wafer has been completed, lifter pins, driven by solenoids or pistons, are provided within the chuck to remove the wafer. However, if the electrostatic force has not been completely dissipated, the pins may have to push very hard against the wafer to dislodge it. When this occurs, the wafer may be violently displaced from the chuck, resulting in misplacement of the wafer, or even damage. A system and method are disclosed herein for completely neutralizing the electrostatic charge before removal of the wafer is attempted. Neutralization is detected as the point at which the electrostatic force opposing the lifting mechanism reaches a minimum.
摘要翻译：提出了一种用于中和将半导体晶片结合到静电卡盘的电荷的系统和方法。当半导体晶片的处理已经完成时，由电磁线圈或活塞驱动的升降器销设置在卡盘内以移除晶片。然而，如果静电力没有被完全消散，则针可能必须非常坚硬地推向晶片以将其移开。当这种情况发生时，晶片可能会从卡盘猛烈移位，导致晶片错位，甚至损坏。本文公开的系统和方法用于在尝试去除晶片之前完全中和静电电荷。检测到中和作为与提升机构相对的静电力达到最小的点。

4. 发明授权

US06849936B1 System and method for using film deposition techniques to provide an antenna within an integrated circuit package 有权
标题翻译：使用成膜技术在集成电路封装内提供天线的系统和方法
公开(公告)号：US06849936B1
公开(公告)日：2005-02-01
申请号：US10254473
申请日：2002-09-25
申请人： Michael J. Berman , Rennie G. Barber
发明人： Michael J. Berman , Rennie G. Barber
IPC分类号： H01L23/02 , H01L23/552 , H01L23/58 , H01L23/66 , H01Q1/22 , H01Q9/30 , H01Q23/00
CPC分类号： H01Q1/2283 , H01L23/552 , H01L23/66 , H01L24/19 , H01L2223/6677 , H01L2924/12042 , H01L2924/14 , H01L2924/16152 , H01Q1/22 , H01Q9/30 , H01Q23/00 , H01L2924/00
摘要： An integrated circuit package comprises a cavity for housing an integrated circuit (IC) and an antenna provided as part of the package that is located substantially outside the cavity. The antenna may be located on the floor of the IC package that lies in the region outside of the IC cavity. Alternatively, the antenna may be located on the upper or lower surface of the lid sealing the IC package. The antenna may be placed in the floor or on a surface of the IC lid by forming depressions in the floor or lid surface and depositing conductive material in the depressions. The conductive material deposition may be by sputtering, evaporation, or other known physical or chemical deposition method. Antennas formed in the upper surface of an IC lid may be coupled to a pin of the IC package so that the antenna may be electrically coupled to a transceiver component on the IC within the package. Antennas formed in the lower surface of an IC lid or the floor of the IC package may be coupled by a conductive pin to a component pad of the IC within the package. To reduce electromagnetic noise that may be induced by the radio frequency signals emitted or received by an antenna, a grounding plane may be provided as part of the IC package. The grounding plane may be coupled to an electrical ground reference point through an IC package pin or the IC within the package.
摘要翻译：集成电路封装包括用于容纳集成电路（IC）的空腔和设置为基本上位于空腔外部的封装的一部分的天线。天线可以位于IC封装的位于IC腔外部区域的地板上。或者，天线可以位于盖的上表面或下表面上，密封IC封装。天线可以通过在地板或盖子表面中形成凹陷并在凹陷中沉积导电材料而放置在IC盖的地板或表面上。导电材料沉积可以通过溅射，蒸发或其它已知的物理或化学沉积方法。形成在IC盖的上表面中的天线可以耦合到IC封装的引脚，使得天线可以电耦合到封装内的IC上的收发器部件。形成在IC盖的下表面或IC封装的底板中的天线可以通过导电引脚耦合到封装内的IC的元件垫。为了减少由天线发射或接收的射频信号可能引起的电磁噪声，可以提供接地平面作为IC封装的一部分。接地平面可以通过封装中的IC封装引脚或IC耦合到电接地参考点。

5. 发明授权

US06627466B1 Method and apparatus for detecting backside contamination during fabrication of a semiconductor wafer 失效
标题翻译：用于在制造半导体晶片期间检测背面污染的方法和装置
公开(公告)号：US06627466B1
公开(公告)日：2003-09-30
申请号：US10138742
申请日：2002-05-03
申请人： Michael J. Berman , George E. Bailey , Rennie G. Barber
发明人： Michael J. Berman , George E. Bailey , Rennie G. Barber
IPC分类号： H01L2166
CPC分类号： H01L21/67259
摘要： A method of detecting contamination on a backside of a semiconductor wafer includes the steps of positioning the backside of the wafer in contact with a detection surface of a contaminant sensor, and detecting deformation of the detection surface of the contaminant sensor. The contaminant sensor may be incorporated into a fabrication device such as a wafer handling device, or can be utilized in the construction of a stand-alone device. An apparatus for detecting contamination on the backside of a semiconductor wafer is also disclosed.
摘要翻译：检测半导体晶片背面的污染物的方法包括以下步骤：将晶片的背面与污染物传感器的检测表面接触，并检测污染物传感器的检测表面的变形。污染物传感器可以结合到诸如晶片处理装置的制造装置中，或者可以用于独立装置的构造。还公开了一种用于检测半导体晶片背面污染的装置。

6. 发明授权

US07332062B1 Electroplating tool for semiconductor manufacture having electric field control 有权
标题翻译：具有电场控制的半导体制造用电镀工具
公开(公告)号：US07332062B1
公开(公告)日：2008-02-19
申请号：US10452360
申请日：2003-06-02
申请人： Steven E. Reder , Michael J. Berman
发明人： Steven E. Reder , Michael J. Berman
IPC分类号： C25D17/00 , C25D17/06 , C25D7/12
CPC分类号： C25D17/06 , C25D17/001 , C25D17/005
摘要： An electroplating tool for providing a metal or metal film on a semiconductor wafer during processing thereof has a wafer chucking mechanism with a conductor or conductors associated therewith. The conductor(s) are electrically connected to a controller that applies a voltage or current applied thereto for altering the position of and/or varying the intensity of electromagnetic field lines originating from a source anode of the electroplating tool. The electromagnetic field lines originating from the source anode direct the deposition of metal from the electroplating solution to the semiconductor wafer. The conductor(s) of the wafer chucking mechanism improve and/or modulate the electromagnetic field lines of the electroplating process. This provides greater control of metal deposition during the electroplating process such that uniformity of the metal (e.g. copper) is provided across the semiconductor wafer.
摘要翻译：一种用于在其处理期间在半导体晶片上提供金属或金属膜的电镀工具具有带有与其相关联的导体或导体的晶片夹持机构。导体电连接到控制器，该控制器施加施加到其上的电压或电流，以改变源自电镀工具的源极的电磁场线的位置和/或改变电磁场线的强度。源自源极阳极的电磁场线将金属从电镀溶液沉积到半导体晶片。晶片夹持机构的导体改善和/或调制电镀工艺的电磁场线。这提供了在电镀工艺期间对金属沉积的更大控制，使得跨半导体晶片提供金属（例如铜）的均匀性。

7. 发明授权

US06982206B1 Mechanism for improving the structural integrity of low-k films 有权
标题翻译：改善低k膜结构完整性的机理
公开(公告)号：US06982206B1
公开(公告)日：2006-01-03
申请号：US10679004
申请日：2003-10-02
申请人： Michael J. Berman , Steven E. Reder , Hemanshu Bhatt
发明人： Michael J. Berman , Steven E. Reder , Hemanshu Bhatt
IPC分类号： H01L21/76
CPC分类号： H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, a method of forming a low-k dielectric composite film is provided. A low-k interconnect dielectric layer is strengthened by forming whiskers in the low-k film. The whiskers are formed simultaneously with the low-k layer. In one embodiment, the low-k structure is removed by heating a volatile matrix film, leaving a whisker residue.
摘要翻译：根据一个实施例，提供了形成低k电介质复合膜的方法。通过在低k膜中形成晶须来增强低k互连电介质层。晶须与低k层同时形成。在一个实施方案中，通过加热挥发性基质膜除去低k结构，留下晶须残留物。

8. 发明授权

US06927177B2 Chemical mechanical electropolishing system 失效
标题翻译：化学机械电抛光系统
公开(公告)号：US06927177B2
公开(公告)日：2005-08-09
申请号：US10693110
申请日：2003-10-24
申请人： Steven E. Reder , Michael J. Berman
发明人： Steven E. Reder , Michael J. Berman
IPC分类号： B24B37/04 , C25F3/02 , H01L21/31 , H01L21/469
CPC分类号： C25F3/02 , B24B37/042 , H01L21/32125 , Y10S438/907
摘要： A system for thinning a layer on a substrate without damaging a delicate underlying layer in the substrate. The system includes means for mechanically eroding the layer on the substrate, and means for electropolishing the layer on the substrate. In this manner, portions of the layer that cannot be removed by electropolishing can be removed by the mechanical erosion. However, electropolishing can preferentially be used on some portions of the layer so that unnecessary mechanical stresses can be avoided. Thus, the system imparts less mechanical stress to the substrate during the removal of the layer, and the delicate underlying layer receives less damage during the process, and preferably no damage whatsoever.
摘要翻译：一种用于在衬底上稀薄层而不损坏衬底中精细的下层的系统。该系统包括用于机械腐蚀衬底上的层的装置，以及用于电镀抛光衬底上的层的装置。以这种方式，通过电解抛光不能除去的层的部分可以通过机械侵蚀去除。然而，电解抛光可优先用于层的某些部分，从而可以避免不必要的机械应力。因此，在去除层期间，该系统对基板施加较少的机械应力，并且精细的下层在该过程期间受到较少的损伤，并且优选地不受任何损害。

9. 发明授权

US08404960B2 Method for heat dissipation on semiconductor device 有权
标题翻译：半导体器件散热方法
公开(公告)号：US08404960B2
公开(公告)日：2013-03-26
申请号：US10930590
申请日：2004-08-31
申请人： Zachary A. Prather , Steven E. Reder , Michael J. Berman
发明人： Zachary A. Prather , Steven E. Reder , Michael J. Berman
IPC分类号： H01L35/30 , H01L23/34
CPC分类号： H01L35/30 , H01L23/38 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/01019 , H01L2924/15153 , H01L2924/15165 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A device and method wherein a thermo electric generator device is disposed between stacks of a multiple level device, or is provided on or under a die of a package and is conductively connected to the package. The thermo electric generator device is configured to generate a voltage by converting heat into electric power. The voltage which is generated by the thermo electric generator can be recycled back into the die itself, or to a higher-level unit in the system, even to a cooling fan.
摘要翻译：一种装置和方法，其中热电发生器装置设置在多级装置的堆叠之间，或者设置在包装的管芯上或下方，并且导电地连接到包装。热电发生器装置被配置为通过将热量转换成电力来产生电压。由热电发生器产生的电压可以再循环回模具本身，或再循环回系统中的较高级别的单元，甚至可以再循环回冷却风扇。

10. 发明授权

US06971944B2 Method and control system for improving CMP process by detecting and reacting to harmonic oscillation 失效
标题翻译：通过检测和谐波振荡反应来改善CMP工艺的方法和控制系统
公开(公告)号：US06971944B2
公开(公告)日：2005-12-06
申请号：US10779966
申请日：2004-02-17
申请人： Michael J. Berman , Steven E. Reder , Bruce Whitefield
发明人： Michael J. Berman , Steven E. Reder , Bruce Whitefield
IPC分类号： B24B37/04 , B24B49/10 , B24B1/00
CPC分类号： B24B37/005 , B24B49/10
摘要： A method and control system for detecting harmonic oscillation in a chemical mechanical polishing process and reacting thereto, such as by taking steps to at least one of: 1) reduce or eliminate the harmonic oscillation; and 2) counter the noise which is associated with the harmonic oscillation. By reducing or eliminating harmonic oscillation, films with reduced structure strengths including low k dielectric films can be used. By countering the noise, the quality of the work environment is improved.
摘要翻译：一种用于检测化学机械抛光工艺中的谐波振荡并与其反应的方法和控制系统，例如通过采取以下步骤中的至少一个步骤：1）减少或消除谐波振荡; 和2）对抗与谐波振荡相关的噪声。通过减少或消除谐波振荡，可以使用包括低k电介质膜的具有降低的结构强度的膜。通过对付噪声，提高了工作环境的质量。

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