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    • 1. 发明申请
    • FLIP-FLOP CIRCUIT HAVING SCAN FUNCTION
    • 具有扫描功能的FLIP-FLOP电路
    • US20100308864A1
    • 2010-12-09
    • US12795916
    • 2010-06-08
    • Hyoung Wook LEEMin-Su Kim
    • Hyoung Wook LEEMin-Su Kim
    • H03K19/173H03K3/356
    • H03K3/356191G01R31/318541
    • A flip-flop circuit having a scan function includes an internal clock generator to receive a clock signal, a scan enable signal, and a first input signal, and to output an internal timing signal based on each of the clock signal, the scan enable signal, and the first input signal. The circuit includes a dynamic input unit to receive a second input signal, the scan enable signal, a first timing signal, and the internal timing signal, and to output a first output signal. The circuit also includes a static output unit to receive the first timing signal and the first output signal and to output a static output signal, and the dynamic input unit outputs the first output signal corresponding to one of the first input signal and the second input signal, respectively, based on a status of the scan enable signal.
    • 具有扫描功能的触发器电路包括内部时钟发生器,用于接收时钟信号,扫描使能信号和第一输入信号,并且基于每个时钟信号输出内部定时信号,扫描使能信号 和第一输入信号。 该电路包括用于接收第二输入信号,扫描使能信号,第一定时信号和内部定时信号的动态输入单元,并输出第一输出信号。 该电路还包括静态输出单元,用于接收第一定时信号和第一输出信号并输出​​静态输出信号,动态输入单元输出对应于第一输入信号和第二输入信号之一的第一输出信号 ,分别基于扫描使能信号的状态。
    • 2. 发明申请
    • FLIP-FLOP CIRCUIT AND SCAN FLIP-FLOP CIRCUIT
    • FLIP-FLOP电路和扫描FLIP-FLOP电路
    • US20110231723A1
    • 2011-09-22
    • US13049427
    • 2011-03-16
    • Hyoung-Wook LEEMin-Su KimChung-Hee KimJin-Soo Park
    • Hyoung-Wook LEEMin-Su KimChung-Hee KimJin-Soo Park
    • G01R31/3177G06F11/25
    • G06F11/24
    • A scan flip-flop circuit includes a pulse generator, a dynamic input unit and a latch output unit. The pulse generator generates a pulse signal which is enabled in synchronization with a rising edge of a clock signal in a normal mode, and is selectively enabled in synchronization with the rising edge of the clock signal in response to a logic level of a scan input signal in a scan mode. The dynamic input unit precharges a first node to a power supply voltage in a first phase of the clock signal, selectively discharges the first node in the normal mode, and discharges the first node in the scan mode. The latch output unit latches an internal signal provided from the first node to provide an output data, and determines whether the output data is toggled based on the clock signal and a previous state of the output data.
    • 扫描触发电路包括脉冲发生器,动态输入单元和锁存器输出单元。 脉冲发生器产生脉冲信号,其在正常模式下与时钟信号的上升沿同步使能,并且响应于扫描输入信号的逻辑电平而与时钟信号的上升沿同步地选择性地使能 处于扫描模式。 动态输入单元在时钟信号的第一阶段中将第一节点预充电到电源电压,以正常模式选择性地放电第一节点,并以扫描模式放电第一节点。 闩锁输出单元锁存从第一节点提供的内部信号以提供输出数据,并且基于时钟信号和输出数据的先前状态来确定输出数据是否被切换。
    • 3. 发明授权
    • Flip-flop circuit having scan function
    • 具有扫描功能的触发电路
    • US07994823B2
    • 2011-08-09
    • US12795916
    • 2010-06-08
    • Hyoung Wook LeeMin-Su Kim
    • Hyoung Wook LeeMin-Su Kim
    • H03K19/096
    • H03K3/356191G01R31/318541
    • A flip-flop circuit having a scan function includes an internal clock generator to receive a clock signal, a scan enable signal, and a first input signal, and to output an internal timing signal based on each of the clock signal, the scan enable signal, and the first input signal. The circuit includes a dynamic input unit to receive a second input signal, the scan enable signal, a first timing signal, and the internal timing signal, and to output a first output signal. The circuit also includes a static output unit to receive the first timing signal and the first output signal and to output a static output signal, and the dynamic input unit outputs the first output signal corresponding to one of the first input signal and the second input signal, respectively, based on a status of the scan enable signal.
    • 具有扫描功能的触发器电路包括内部时钟发生器,用于接收时钟信号,扫描使能信号和第一输入信号,并且基于每个时钟信号输出内部定时信号,扫描使能信号 和第一输入信号。 该电路包括用于接收第二输入信号,扫描使能信号,第一定时信号和内部定时信号的动态输入单元,并输出第一输出信号。 该电路还包括静态输出单元,用于接收第一定时信号和第一输出信号并输出​​静态输出信号,动态输入单元输出对应于第一输入信号和第二输入信号之一的第一输出信号 ,分别基于扫描使能信号的状态。
    • 4. 发明授权
    • Flip-flop circuit and scan flip-flop circuit
    • 触发电路和扫描触发器电路
    • US08656238B2
    • 2014-02-18
    • US13049427
    • 2011-03-16
    • Hyoung-Wook LeeMin-Su KimChung-Hee KimJin-Soo Park
    • Hyoung-Wook LeeMin-Su KimChung-Hee KimJin-Soo Park
    • G01R31/28
    • G06F11/24
    • A scan flip-flop circuit includes a pulse generator, a dynamic input unit and a latch output unit. The pulse generator generates a pulse signal which is enabled in synchronization with a rising edge of a clock signal in a normal mode, and is selectively enabled in synchronization with the rising edge of the clock signal in response to a logic level of a scan input signal in a scan mode. The dynamic input unit precharges a first node to a power supply voltage in a first phase of the clock signal, selectively discharges the first node in the normal mode, and discharges the first node in the scan mode. The latch output unit latches an internal signal provided from the first node to provide an output data, and determines whether the output data is toggled based on the clock signal and a previous state of the output data.
    • 扫描触发电路包括脉冲发生器,动态输入单元和锁存器输出单元。 脉冲发生器产生脉冲信号,其在正常模式下与时钟信号的上升沿同步使能,并且响应于扫描输入信号的逻辑电平而与时钟信号的上升沿同步地选择性地使能 处于扫描模式。 动态输入单元在时钟信号的第一阶段中将第一节点预充电到电源电压,以正常模式选择性地放电第一节点,并以扫描模式放电第一节点。 闩锁输出单元锁存从第一节点提供的内部信号以提供输出数据,并且基于时钟信号和输出数据的先前状态来确定输出数据是否被切换。
    • 6. 发明授权
    • Flip-flop circuits and system including the same
    • 触发电路和系统包括相同的
    • US08344780B2
    • 2013-01-01
    • US12797852
    • 2010-06-10
    • Hyoung-Wook LeeMin-Su Kim
    • Hyoung-Wook LeeMin-Su Kim
    • H03K3/00
    • H03K3/356191
    • Flip-flop circuits including a dynamic input unit and a control clock generator are provided. The dynamic input unit precharges an evaluation node to a power supply voltage in a first phase of a clock signal, selectively discharges the evaluation node based on input data in a second phase of the clock signal, and compensates for voltage drop of the evaluation node in response to a first control clock signal. The control clock generator generates the first control clock signal and a second control clock signal based on at least the clock signal.
    • 提供了包括动态输入单元和控制时钟发生器的触发电路。 动态输入单元在时钟信号的第一阶段中将评估节点预充电到电源电压,基于时钟信号的第二相位中的输入数据选择性地放电评估节点,并且补偿评估节点的电压降 响应于第一控制时钟信号。 控制时钟发生器至少基于时钟信号产生第一控制时钟信号和第二控制时钟信号。
    • 8. 发明授权
    • Semiconductor device
    • 半导体器件
    • US09450584B2
    • 2016-09-20
    • US14870351
    • 2015-09-30
    • Min-Su Kim
    • Min-Su Kim
    • H03K19/0175H03K19/0185H03K19/20H03K3/356
    • H03K19/018507H03K3/012H03K3/356H03K3/356173H03K19/0016H03K19/20
    • A semiconductor device includes a first circuit applying an enable signal having a first logic level and a clock signal having the first logic level, supplying a first voltage to a first node and converting a voltage level of the first node into a second logic level different from the first logic level, and a second circuit applying an enable signal having the second logic level and a clock signal having the first logic level, supplying a second voltage to a second node different from the first node and converting a voltage level of the second node into the second logic level. The second circuit includes an operation circuit performing a NAND operation on the logic level of the enable signal and the voltage level of the second node, and a switch turned on in response to an output of the operation circuit and supplying the second voltage to the second node.
    • 半导体器件包括施加具有第一逻辑电平的使能信号和具有第一逻辑电平的时钟信号的第一电路,向第一节点提供第一电压并将第一节点的电压电平转换成不同于第一逻辑电平的第二逻辑电平 第一逻辑电平,以及施加具有第二逻辑电平的使能信号和具有第一逻辑电平的时钟信号的第二电路,向不同于第一节点的第二节点提供第二电压,并且转换第二节点的电压电平 进入第二个逻辑水平。 第二电路包括对使能信号的逻辑电平和第二节点的电压电平执行NAND运算的运算电路,以及响应于运算电路的输出而导通的开关,并将第二电压提供给第二电路 节点。
    • 9. 发明授权
    • Polarizer and liquid crystal display using the same
    • 偏光镜和液晶显示器使用相同
    • US08755008B2
    • 2014-06-17
    • US13431702
    • 2012-03-27
    • Jae-Hong ParkJong-Sung ParkMin-Su KimSung-Hyun Kim
    • Jae-Hong ParkJong-Sung ParkMin-Su KimSung-Hyun Kim
    • G02F1/1335
    • G02B5/3033G02B1/105G02B1/11G02B1/14G02B1/16G02F1/133528G02F1/13452
    • Disclosed is a liquid crystal display and a polarizing plate used in the same. The liquid crystal display includes a liquid crystal cell and a first polarizing plate and a second polarizing plate respectively provided on each side of the liquid crystal cell. The first polarizing plate and the second polarizing plate each includes a polyvinyl alcohol polarizing film and protective films provided on both sides of the polyvinyl alcohol polarizing film, the protective films that are provided on surfaces opposite to the liquid crystal cell the first polarizing plate and the second polarizing plate each has the vapor transmissivity of 100 g/m Day or less, and the protective films that are provided on surfaces abutting the liquid crystal cell of the first polarizing plate and the second polarizing plate each has the vapor transmissivity of more than 1,500 g/m Day. When the protective films that are provided on surfaces opposite to the liquid crystal cell of the first polarizing plate and the second polarizing plate each has a UV absorption ability, the protective films that are provided on surfaces abutting the liquid crystal cell of the first polarizing plate and the second polarizing plate each has the vapor transmissivity of more than 200 g/m Day.
    • 公开了一种液晶显示器和偏光板。 液晶显示器包括分别设置在液晶单元的每一侧的液晶单元和第一偏振板和第二偏振板。 第一偏振板和第二偏振板各自包括聚乙烯醇偏振片和设置在聚乙烯醇偏振片两侧的保护膜,保护膜设置在与液晶单元相反的表面上,第一偏振片和 第二偏光板的蒸气透过率为100g / m以下,并且设置在与第一偏振片和第二偏光板的液晶单元抵接的面上的保护膜的蒸气透过率为1500以上 g / m天。 当设置在与第一偏振片和第二偏振片的液晶单元相对的表面上的保护膜各自具有UV吸收能力时,设置在与第一偏振板的液晶单元相邻的表面上的保护膜 并且第二偏振板各自具有大于200g / m 2日的蒸汽透过率。