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1. 发明授权

US06905968B2 Process for selectively etching dielectric layers 失效
标题翻译：用于选择性地蚀刻介电层的工艺
公开(公告)号：US06905968B2
公开(公告)日：2005-06-14
申请号：US10016562
申请日：2001-12-12
申请人： Chang-Lin Hsieh , Jie Yuan , Hui Chen , Theodoros Panagopoulos , Yan Ye
发明人： Chang-Lin Hsieh , Jie Yuan , Hui Chen , Theodoros Panagopoulos , Yan Ye
IPC分类号： H01L21/311 , H01L21/316 , H01L21/768 , H01L21/302 , H01L21/461
CPC分类号： H01L21/31116 , H01L21/31629 , H01L21/31633 , H01L21/76808 , H01L21/76835
摘要： A method is provided for etching a dielectric structure. The dielectric structure comprises: (a) a layer of undoped silicon oxide or F-doped silicon oxide; and (b) a layer of C,H-doped silicon oxide. The dielectric structure is etched in a plasma-etching step, which plasma-etching step is conducted using a plasma source gas that comprises nitrogen atoms and fluorine atoms. As one example, the plasma source gas can comprise a gaseous species that comprises one or more nitrogen atoms and one or more fluorine atoms (e.g., NF3). As another example, the plasma source gas can comprise (a) a gaseous species that comprises one or more nitrogen atoms (e.g., N2) and (b) a gaseous species that comprises one or more fluorine atoms (e.g., a fluorocarbon gas such as CF4). In this etching step, the layer of C,H-doped silicon oxide is preferentially etched relative to the layer of undoped silicon oxide or F-doped silicon oxide. The method of the present invention is applicable, for example, to dual damascene structures.
摘要翻译：提供了蚀刻电介质结构的方法。电介质结构包括：（a）一层未掺杂的氧化硅或掺杂F的氧化硅; 和（b）C，H掺杂的氧化硅层。在等离子体蚀刻步骤中蚀刻电介质结构，使用包含氮原子和氟原子的等离子体源气体进行等离子体蚀刻步骤。作为一个示例，等离子体源气体可以包括包含一个或多个氮原子和一个或多个氟原子（例如，NF 3 N）的气态物质。作为另一示例，等离子体源气体可以包括（a）包含一个或多个氮原子（例如，N 2）的气态物质和（b）包含一个或多个氟原子的气态物质（例如碳氟化合物气体，例如CF 4）。在该蚀刻步骤中，相对于未掺杂的氧化硅层或掺杂F的氧化硅层优先蚀刻C，H掺杂的氧化硅层。本发明的方法例如适用于双镶嵌结构。

2. 发明授权

US06455431B1 NH3 plasma descumming and resist stripping in semiconductor applications 失效
标题翻译： NH3等离子体除氧和半导体应用中的抗剥离
公开(公告)号：US06455431B1
公开(公告)日：2002-09-24
申请号：US09629329
申请日：2000-08-01
申请人： Chang Lin Hsieh , Hui Chen , Jie Yuan , Yan Ye
发明人： Chang Lin Hsieh , Hui Chen , Jie Yuan , Yan Ye
IPC分类号： H01L21302
CPC分类号： H01L21/31138 , G03F7/427
摘要： In general, the present disclosure pertains to a method for removing photoresist from locations on a semiconductor structure where its presence is undesired. In one embodiment, a method is disclosed for descumming residual photoresist material from areas where it is not desired after patterning of the photoresist. In another embodiment, a misaligned patterned photoresist is stripped from a semiconductor substrate surface. In particular, the method comprises exposing the semiconductor structure to a plasma generated from a source gas comprising NH3. A substrate bias voltage is utilized in both methods in order to produce anisotropic etching. In the descumming embodiment, the critical dimensions of the patterned photoresist are maintained. In the photoresist stripping embodiment, a patterned photoresist is removed without adversely affecting a partially exposed underlying layer of an organic dielectric.
摘要翻译：通常，本公开涉及用于从半导体结构上的位置去除光致抗蚀剂的方法，其中其存在是不期望的。在一个实施例中，公开了一种从光刻胶图形化之后不希望的区域去除残余光致抗蚀剂材料的方法。在另一个实施例中，从半导体衬底表面剥离未对准的图案化光致抗蚀剂。特别地，该方法包括将半导体结构暴露于由包含NH 3的源气体产生的等离子体。为了产生各向异性蚀刻，在两种方法中均采用衬底偏置电压。在除尘实施例中，维持图案化光致抗蚀剂的临界尺寸。在光致抗蚀剂剥离实施例中，去除图案化的光致抗蚀剂，而不会有害地影响有机电介质的部分暴露的下层。

3. 发明授权

US06607675B1 Method of etching carbon-containing silicon oxide films 失效
标题翻译：蚀刻含碳氧化硅膜的方法
公开(公告)号：US06607675B1
公开(公告)日：2003-08-19
申请号：US09650975
申请日：2000-08-29
申请人： Chang Lin Hsieh , Hui Chen , Jie Yuan , Yan Ye
发明人： Chang Lin Hsieh , Hui Chen , Jie Yuan , Yan Ye
IPC分类号： H01L21027
CPC分类号： H01L21/31116
摘要： We have discovered a method for plasma etching a carbon-containing silicon oxide film which provides excellent etch profile control, a rapid etch rate of the carbon-containing silicon oxide film, and high selectivity for etching the carbon-containing silicon oxide film preferentially to an overlying photoresist masking material. When the method of the invention is used, a higher carbon content in the carbon-containing silicon oxide film results in a faster etch rate, at least up to a carbon content of 20 atomic percent. In particular, the carbon-containing silicon oxide film is plasma etched using a plasma generated from a source gas comprising NH3 and CxFy. It is necessary to achieve the proper balance between the relative amounts of NH3 and CxFy in the plasma source gas in order to provide a balance between etch by-product polymer deposition and removal on various surfaces of the substrate being etched. The NH3 gas functions to “clean up” deposited polymer on the photoresist surface, on the etched surface, and on process chamber surfaces. The atomic ratio of carbon:nitrogen in the plasma source gas typically ranges from about 0.3:1 to about 3:1. We have found that C2F6 and C4F8 provide excellent etch rates during etching of carbon-containing silicon oxide films.
摘要翻译：我们已经发现了一种用于等离子体蚀刻含碳氧化硅膜的方法，其提供优异的蚀刻轮廓控制，含碳氧化硅膜的快速蚀刻速率，以及优选将含碳氧化硅膜蚀刻到覆盖光致抗蚀剂掩模材料。当使用本发明的方法时，含碳氧化硅膜中较高的碳含量导致更快的蚀刻速率，至少达到20原子百分比的碳含量。特别地，使用由包含NH 3和C x F y的源气体产生的等离子体对含碳氧化硅膜进行等离子体蚀刻。为了提供等离子体源气体中NH 3和C x F y的相对量之间的适当平衡，为了提供蚀刻副产物聚合物沉积和被蚀刻的衬底的各种表面上的去除之间的平衡。 NH 3气体用于“清除”沉积的聚合物在光致抗蚀剂表面，蚀刻表面和处理室表面上。等离子体源气体中的碳：氮的原子比通常为约0.3:1至约3:1。我们发现C2F6和C4F8在含碳氧化硅膜的蚀刻过程中提供了优异的蚀刻速率。

4. 发明授权

US6080529A Method of etching patterned layers useful as masking during subsequent etching or for damascene structures 失效
标题翻译：在随后的蚀刻或镶嵌结构期间蚀刻用作掩模的图案化层的方法
公开(公告)号：US6080529A
公开(公告)日：2000-06-27
申请号：US174763
申请日：1998-10-19
申请人： Yan Ye , Pavel Ionov , Allen Zhao , Peter Chang-Lin Hsieh , Diana Xiaobing Ma , Chun Yan , Jie Yuan
发明人： Yan Ye , Pavel Ionov , Allen Zhao , Peter Chang-Lin Hsieh , Diana Xiaobing Ma , Chun Yan , Jie Yuan
IPC分类号： H01L21/302 , H01L21/027 , H01L21/311 , H01L21/312 , H01L21/314 , H01L21/316 , H01L21/3213 , G03C5/58
CPC分类号： H01L21/0274 , H01L21/31138 , H01L21/31144 , H01L21/32139 , H01L21/31116 , H01L21/3127 , H01L21/3146 , H01L21/31612 , H01L21/32136
摘要： A first embodiment of the present invention pertains to a method of patterning a semiconductor device conductive feature while permitting easy removal of any residual masking layer which remains after completion of the etching process. A multi-layered masking structure is used which includes a layer of high-temperature organic-based masking material overlaid by either a patterned layer of inorganic masking material or by a layer of patterned high-temperature imageable organic masking material. The inorganic masking material is used to transfer a pattern to the high-temperature organic-based masking material and is then removed. The high-temperature organic-based masking material is used to transfer the pattern and then may be removed if desired. This method is also useful in the pattern etching of aluminum, even though aluminum can be etched at lower temperatures. A second embodiment of the present invention pertains to a specialized etch chemistry useful in the patterning of organic polymeric layers such as low k dielectrics, or other organic polymeric interfacial layers. This etch chemistry is useful for mask opening during the etch of a conductive layer or is useful in etching damascene structures where a metal fill layer is applied over the surface of a patterned organic-based dielectric layer. The etch chemistry provides for the use of etchant plasma species which minimize oxygen, fluorine, chlorine, and bromine content.
摘要翻译：本发明的第一实施例涉及一种图案化半导体器件导电特征的方法，同时允许容易地去除在蚀刻工艺完成之后保留的任何残留掩模层。使用多层掩模结构，其包括由无机掩模材料的图案化层或由图案化的高温可成像有机掩蔽材料层覆盖的高温有机基掩蔽材料层。无机掩模材料用于将图案转印到高温有机基掩蔽材料上，然后除去。高温有机基掩蔽材料用于转移图案，然后如果需要可以去除。这种方法在铝的图案蚀刻中也是有用的，即使在较低温度下可以蚀刻铝。本发明的第二个实施方案涉及可用于图案化有机聚合物层如低k电介质或其它有机聚合物界面层的专用蚀刻化学物质。该蚀刻化学物质可用于在导电层的蚀刻过程中的掩模开口，或者可用于蚀刻镶嵌结构，其中金属填充层施加在图案化有机基介质层的表面上。蚀刻化学提供了使氧化物，氟，氯和溴含量最小化的蚀刻剂等离子体物质的使用。

5. 发明授权

US06331380B1 Method of pattern etching a low K dielectric layer 失效
标题翻译：图案蚀刻低K电介质层的方法
公开(公告)号：US06331380B1
公开(公告)日：2001-12-18
申请号：US09549262
申请日：2000-04-14
申请人： Yan Ye , Pavel Ionov , Allen Zhao , Peter Chang-Lin Hsieh , Diana Xiaobing Ma , Chun Yan , Jie Yuan
发明人： Yan Ye , Pavel Ionov , Allen Zhao , Peter Chang-Lin Hsieh , Diana Xiaobing Ma , Chun Yan , Jie Yuan
IPC分类号： G03C558
CPC分类号： H01L21/31138 , H01L21/02115 , H01L21/02118 , H01L21/0212 , H01L21/02274 , H01L21/0274 , H01L21/31116 , H01L21/31144 , H01L21/3127 , H01L21/3146 , H01L21/31612 , H01L21/32136 , H01L21/32139
摘要： A first embodiment of the present invention pertains to a method of patterning a semiconductor device conductive feature while permitting easy removal of any residual masking layer which remains after completion of the etching process. A multi-layered masking structure is used which includes a layer of high-temperature organic-based masking material overlaid by either a patterned layer of inorganic masking material or by a layer of patterned high-temperature imageable organic masking material. The inorganic masking material is used to transfer a pattern to the high-temperature organic-based masking material and is then removed. The high-temperature organic-based masking material is used to transfer the pattern and then may be removed if desired. This method is also useful in the pattern etching of aluminum, even though aluminum can be etched at lower temperatures. A second embodiment of the present invention pertains to a specialized etch chemistry useful in the patterning of organic polymeric layers such as low k dielectrics, or other organic polymeric interfacial layers. This etch chemistry is useful for mask opening during the etch of a conductive layer or is useful in etching damascene structures where a metal fill layer is applied over the surface of a patterned organic-based dielectric layer. The etch chemistry provides for the use of etchant plasma species which minimize oxygen, fluorine, chlorine, and bromine content.
摘要翻译：本发明的第一实施例涉及一种图案化半导体器件导电特征的方法，同时允许容易地去除在蚀刻工艺完成之后保留的任何残留掩模层。使用多层掩模结构，其包括由无机掩模材料的图案化层或由图案化的高温可成像有机掩蔽材料层覆盖的高温有机基掩蔽材料层。无机掩模材料用于将图案转印到高温有机基掩蔽材料上，然后除去。高温有机基掩蔽材料用于转移图案，然后如果需要可以去除。这种方法在铝的图案蚀刻中也是有用的，即使在较低温度下可以蚀刻铝。本发明的第二个实施方案涉及可用于图案化有机聚合物层如低k电介质或其它有机聚合物界面层的专用蚀刻化学物质。该蚀刻化学物质可用于在导电层的蚀刻过程中的掩模开口，或者可用于蚀刻镶嵌结构，其中金属填充层施加在图案化有机基介质层的表面上。蚀刻化学提供了使氧化物，氟，氯和溴含量最小化的蚀刻剂等离子体物质的使用。

6. 发明申请

US20060118519A1 Dielectric etch method with high source and low bombardment plasma providing high etch rates 审中-公开
标题翻译：具有高源和低轰击等离子体的介电蚀刻方法提供高蚀刻速率
公开(公告)号：US20060118519A1
公开(公告)日：2006-06-08
申请号：US11003227
申请日：2004-12-03
申请人： Gerardo Delgadino , Chang-Lin Hsieh , Yan Ye , Hyunjong Shim
发明人： Gerardo Delgadino , Chang-Lin Hsieh , Yan Ye , Hyunjong Shim
IPC分类号： C23F1/00 , B44C1/22 , C03C25/68 , H01L21/461
CPC分类号： H01L21/31116 , C09K13/00 , H01L21/31122
摘要： In at least some embodiments, the present invention is a plasma etching method which includes applying a gas mixture comprising CF4, N2 and Ar and forming a high density and low bombardment energy plasma. The high density and low bombardment energy plasma is formed by using high source and low bias power settings. The gas mixture can further include H2, NH3, a hydrofluorocarbon gas and/or a fluorocarbon gas. The hydrofluorocarbon gas can include CH2F2, CH3F; and/or CHF3. The fluorocarbon gas can include C4F8, C4F6 and/or C5F8.
摘要翻译：在至少一些实施方案中，本发明是等离子体蚀刻方法，其包括施加包含CF 4 N 2，N 2和Ar的气体混合物并形成高密度和低轰击能量等离子体高密度和低轰击能量等离子体通过使用高源和低偏压功率设置形成。气体混合物可以进一步包括H 2 CO 3，NH 3，氢氟烃气体和/或碳氟化合物气体。氢氟烃气体可以包括CH 2 2 F 2 CH 3，CH 3 F; 和/或CHF 3。碳氟化合物气体可以包括C 4 C 8 C 6，C 4 F 6和/或C 5 8 。

7. 发明授权

US06547978B2 Method of heating a semiconductor substrate 失效
公开(公告)号：US06547978B2
公开(公告)日：2003-04-15
申请号：US10017001
申请日：2001-12-13
申请人： Yan Ye , Allen Zhao , Xiancan Deng , Diana Xiaobing Ma , Chang-Lin Hsieh
发明人： Yan Ye , Allen Zhao , Xiancan Deng , Diana Xiaobing Ma , Chang-Lin Hsieh
IPC分类号： B44C0122
CPC分类号： H01L21/02071 , C23F4/00 , H01L21/32136
摘要： Copper can be pattern etched in a manner which provides the desired feature dimension and integrity, at acceptable rates, and with selectivity over adjacent materials. To provide for feature integrity, the portion of the copper feature surface which has been etched to the desired dimensions and shape must be protected during the etching of adjacent feature surfaces. This is particularly important for feature sizes less than about 0.5 &mgr;m, where presence of even a limited amount of a corrosive agent can eat away a large portion of the feature. The copper feature integrity is protected by several different mechanisms: 1) The reactive etchant species are designed to be only moderately aggressive, so that an acceptable etch rate is achieved without loss of control over the feature profile or the etch surface; 2) Hydrogen is applied over the etch surface so that it is absorbed onto the etch surface, where it acts as a boundary which must be crossed by the reactive species and a chemical modulator for the reactive species; and 3) Process variables are adjusted so that byproducts from the etch reaction are rendered more volatile and easily removable from the etch surface. In an inductively coupled plasma etch chamber, we have observed that the preferred chlorine reactive species are generated when the chlorine is dissociated from compounds rather than furnished as Cl2 gas.

8. 发明授权

US6143476A Method for high temperature etching of patterned layers using an organic mask stack 失效
标题翻译：使用有机掩模叠层对图案化层进行高温蚀刻的方法
公开(公告)号：US6143476A
公开(公告)日：2000-11-07
申请号：US991219
申请日：1997-12-12
申请人： Yan Ye , Allen Zhao , Peter Chang-Lin Hsieh , Diana Xiaobing Ma
发明人： Yan Ye , Allen Zhao , Peter Chang-Lin Hsieh , Diana Xiaobing Ma
IPC分类号： H01L21/302 , H01L21/027 , H01L21/311 , H01L21/312 , H01L21/314 , H01L21/316 , H01L21/3213 , G03C5/58
CPC分类号： H01L21/0274 , H01L21/31138 , H01L21/31144 , H01L21/32139 , H01L21/31116 , H01L21/3127 , H01L21/3146 , H01L21/31612 , H01L21/32136
摘要： The present disclosure pertains to a method of patterning a semiconductor device feature which provides for the easy removal of any residual masking layer which remains after completion of a pattern etching process. The method provides for a multi-layered masking structure which includes a layer of high-temperature organic-based masking material overlaid by either a layer of a high-temperature inorganic masking material which can be patterned to provide an inorganic hard mask, or by a layer of high-temperature imageable organic masking material which can be patterned to provide an organic hard mask. The hard masking material is used to transfer a pattern to the high-temperature organic-based masking material, and then the hard masking material is removed. The high-temperature organic-based masking material is used to transfer the pattern to an underlying semiconductor device feature.
摘要翻译：本公开涉及一种图案化半导体器件特征的方法，其提供容易去除在图案蚀刻工艺完成之后保留的任何残留掩模层。该方法提供了一种多层掩模结构，其包括由可以被图案化以提供无机硬掩模的高温无机掩蔽材料层覆盖的高温有机基掩蔽材料层，或由可以图案化以提供有机硬掩模的高温可成像有机掩模材料层。使用硬掩模材料将图案转印到高温有机基掩蔽材料上，然后去除硬掩模材料。高温有机基掩蔽材料用于将图案转移到下面的半导体器件特征。

9. 发明授权

US06897154B2 Selective etching of low-k dielectrics 失效
标题翻译：选择性蚀刻低k电介质
公开(公告)号：US06897154B2
公开(公告)日：2005-05-24
申请号：US10172243
申请日：2002-06-14
申请人： Terry Leung , Qiqun Zheng , Chang-Lin Hsieh , Yan Ye , Takehiko Komatsu
发明人： Terry Leung , Qiqun Zheng , Chang-Lin Hsieh , Yan Ye , Takehiko Komatsu
IPC分类号： H01L21/311 , H01L21/302 , C09K13/00 , H01L21/3065
CPC分类号： H01L21/31116 , H01L21/31144
摘要： The present invention provides a low-k dielectric etching process with high etching selectivities with respect to adjacent layers of other materials, such as an overlying photoresist mask and an underlying barrier/liner layer. The process comprises the step of exposing a portion of the low-k dielectric layer to a plasma of a process gas that includes a fluorocarbon gas, a nitrogen-containing gas, and an inert gas, wherein the volumetric flow ratio of inert:fluorocarbon gas is in the range of 20:1 to 100:1, and the volumetric flow ratio of fluorocarbon:nitrogen-containing gas is selected to provide a low-k dielectric to photoresist etching selectivity ratio greater than about 5:1 and a low-k dielectric etch rate higher than about 4000 Å/min.
摘要翻译：本发明提供了相对于其它材料的相邻层（例如覆盖光致抗蚀剂掩模和下面的阻挡层/衬里层）具有高蚀刻选择性的低k电介质蚀刻工艺。该方法包括将低k电介质层的一部分暴露于包括碳氟化合物气体，含氮气体和惰性气体的工艺气体的等离子体的步骤，其中惰性：碳氟化合物气体的体积流量比在20:1至100:1的范围内，选择碳氟化合物：含氮气体的体积流量比以提供低k电介质至光致抗蚀剂蚀刻选择比大于约5:1，低k 介电蚀刻速率高于约4000 / min。

10. 发明申请

US20080023144A1 DIELECTRIC ETCH TOOL CONFIGURED FOR HIGH DENSITY AND LOW BOMBARDMENT ENERGY PLASMA PROVIDING HIGH ETCH RATES 审中-公开
标题翻译：配置高密度和低BOMBARDMENT ENERGY等离子体的电介质蚀刻工具提供高蚀刻率
公开(公告)号：US20080023144A1
公开(公告)日：2008-01-31
申请号：US11778058
申请日：2007-07-15
申请人： Gerardo Delgadino , Chang-Lin Hsieh , Yan Ye , Hyunjong Shim
发明人： Gerardo Delgadino , Chang-Lin Hsieh , Yan Ye , Hyunjong Shim
IPC分类号： H01L21/02
CPC分类号： H01L21/31116 , C09K13/00 , H01L21/31122
摘要： In at least some embodiments, a plasma etch tool is provided which includes a processing chamber capable of receiving a workpiece. The plasma etch tool is configured to generate a high density and low bombardment energy plasma therein from a gas mixture which includes CF4, N2 and Ar, for processing the workpiece. The high density and low bombardment energy plasma is formed by using high source and low bias power settings. The density or electron density, can, depending on the embodiment, range from about 5×1010 electrons/cm3 and above, including about 1×1011 electrons/cm3 and above. The gas mixture can further include H2, NH3, a hydrofluorocarbon gas and/or a fluorocarbon gas.
摘要翻译：在至少一些实施例中，提供了包括能够接收工件的处理室的等离子体蚀刻工具。等离子体蚀刻工具被配置为从包括CF 4 N 2，N 2和Ar的气体混合物产生高密度和低轰击能量等离子体，用于加工工件。通过使用高源和低偏置功率设置形成高密度和低轰击能量等离子体。根据实施例，密度或电子密度可以在约5×10 10电子/ cm 3以上，包括约1×10 11 / 电子/ cm 3以上。气体混合物可以进一步包括H 2 CO 3，NH 3，氢氟烃气体和/或碳氟化合物气体。

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