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1. 依法登记的发明

USH674H Silver halide photographic light-sensitive material capable of super-rapid processing 失效
标题翻译：卤化银摄影感光材料能够超快速处理
公开(公告)号：USH674H
公开(公告)日：1989-09-05
申请号：US116229
申请日：1987-11-03
申请人： Satoru Nagasaki , Akio Suzuki , Eiji Yoshida , Masumi Arai , Nobuaki Tsuji
发明人： Satoru Nagasaki , Akio Suzuki , Eiji Yoshida , Masumi Arai , Nobuaki Tsuji
IPC分类号： B05C5/00 , B05C9/04 , G03C1/005 , G03C1/18 , G03C1/38 , G03C1/46 , G03C1/74 , G03C1/95 , G03C5/16
CPC分类号： G03C5/16 , B05C5/007 , B05C9/04 , G03C1/005 , G03C1/18 , G03C1/38 , G03C1/46 , G03C1/74 , G03C1/95 , G03C2001/7425 , G03C2200/52
摘要： A silver halide photographic light-sensitive material comprising a support having the first photographic structural layer comprising one or more layers on a side of the support and the second photographic structural layer comprising one or more layers on the other side of the support, in which at least one of the photographic structural layers comprises a silver halide light-sensitive emulsion layer, and the total amount of gelatin contained in the photographic structural layer comprising the silver halide emulsion layer is within the range of from 2.25 g/m.sup.2 to 3.15 g/m.sup.2. The uppermost layer of the photographic structural layer comprising the silver halide emulsion is formed by coating of a solution having a surface tension of from 15 to 26 dyn/cm, and the second photographic structural layer is coated and gelled simultaneously with coating and drying of the first photographic structural layer. The photographic material is improved in the adaptability for super-rapid processing with the total duration of 20 to 60 sec. and the anti-scratch property.

2. 发明授权

US4861702A Rapidly processable silver halide photographic light-sensitive material and the processing thereof 失效
标题翻译：快速处理卤化银照相感光材料及其加工
公开(公告)号：US4861702A
公开(公告)日：1989-08-29
申请号：US296327
申请日：1989-01-11
申请人： Akio Suzuki , Eiji Yoshida , Satoru Nagasaki , Masumi Arai , Nobuaki Tsuji
发明人： Akio Suzuki , Eiji Yoshida , Satoru Nagasaki , Masumi Arai , Nobuaki Tsuji
IPC分类号： G03C1/005 , G03C5/30
CPC分类号： G03C5/30 , G03C1/005 , Y10S430/164 , Y10S430/167 , Y10S430/168
摘要： A silver halide photographic light-sensitive material and a process for processing it are disclosed. The light-sensitive material is improved in photographic sensitivity, drying property and anti-roller-mark property and is suitable for the disclosed ultra-rapid processing by an automatic processor in which the photographic material is processed for the time of 20 sec to 60 sec in total. The light-sensitive material comprises a support having on at least one side thereof one or more hydrophilic layers containing gelatin which comprise at least one light-sensitive silver halide emulsion layer. An amount of the gelatin contained in said hydrophilic layer or layers is within the range of from 1.90 to 3.50 g/m.sup.2 and a swelling amount of said hydrophilic layer or layers is within the range of from 30 to 58 g/m.sup.2 when said light-sensitive material is treated in a specific condition for 15 sec. at 35.degree. C.
摘要翻译：公开了一种卤化银照相感光材料及其加工方法。感光材料在照相感光度，干燥性能和抗辊痕性能方面得到改善，适用于通过自动处理器公开的超快速处理，其中照相材料在20秒至60秒的时间内被处理总共。感光材料包括在其至少一侧上具有包含至少一种感光卤化银乳剂层的含有明胶的一个或多个亲水层的载体。所述亲水层中含有的明胶量在1.90〜3.50g / m 2的范围内，所述亲水层的溶胀量在30〜58g / m 2的范围内，敏感材料在特定条件下处理15秒。在35℃

3. 发明授权

US4847189A High speed processing silver halide photographic light-sensitive material 失效
标题翻译：高速处理卤化银照相感光材料
公开(公告)号：US4847189A
公开(公告)日：1989-07-11
申请号：US165796
申请日：1988-03-09
申请人： Akio Suzuki , Eiji Yoshida , Satoru Nagasaki , Masumi Arai , Nobuaki Tsuji
发明人： Akio Suzuki , Eiji Yoshida , Satoru Nagasaki , Masumi Arai , Nobuaki Tsuji
IPC分类号： G03C1/035 , G03C1/005 , G03C1/30 , G03C5/26
CPC分类号： G03C1/005 , Y10S430/167 , Y10S430/168
摘要： A silver halide photographic material is capable of super-rapid processing with the total time of 20 to 60 minutes and is high in sensitivity, low in fogginess and excellent in pressure resistance and graininess. The photographic material is comprises a support bearing a hydrophilic colloial layer including at least one light sensitive silver halide emulsion layer thereon, whereinsilver halide grains contained in the silver halide emulsion layer are mainly comprised of tabular grains which have an aspect ratio of the grain size to the grain thickness of not lower than 5, and the projective areas of the whole tabular grain occupy not less than 50% of the projective areas of the whole silver halide grain in the emulsion layer,the melting time of the silver halide photographic light-sensitive material is within the range of from not shorter than 45 minutes, andon the side bearing the hydrophilic colloidal layer containing the silver halide emulsion layer, an amount of gelatin is within the range of from 2.00 to 3.20 g/m.sup.2.

4. 发明授权

US08059834B2 Automatic gain control circuit 有权
标题翻译：自动增益控制电路
公开(公告)号：US08059834B2
公开(公告)日：2011-11-15
申请号：US11825544
申请日：2007-07-06
申请人： Yasuomi Tanaka , Nobuaki Tsuji , Hirotaka Kawai
发明人： Yasuomi Tanaka , Nobuaki Tsuji , Hirotaka Kawai
IPC分类号： H03G3/00
CPC分类号： H03G3/001 , H03G3/3026 , H03G7/06
摘要： A controller 100 updates data LVLm indicative of a level section of an input audio signal and controls a reference level Vr based on a signal CMP representative of a comparison result between the input audio signal and the reference level Vr, and further, controls gains of electronic volumes 10L and 10R in such a manner that these gains become such gains corresponding to the level section of the input audio signal. In this case, the level sections of the input audio signals are related to the gains in such a manner that levels of output signals of the electronic volumes do not exceed a previously set output amplitude upper limit level.
摘要翻译：控制器100更新表示输入音频信号的电平部分的数据LVLm，并且基于代表输入音频信号和参考电平Vr之间的比较结果的信号CMP来控制参考电平Vr，并且还控制电子体积10L和10R，使得这些增益成为对应于输入音频信号的电平部分的这样的增益。在这种情况下，输入音频信号的电平部分以增益的方式与电子卷的输出信号电平不超过预先设定的输出振幅上限电平相关。

5. 发明申请

US20100117730A1 D/A converter circuit and digital input class-D amplifier 有权
标题翻译： D / A转换器电路和数字输入D类放大器
公开(公告)号：US20100117730A1
公开(公告)日：2010-05-13
申请号：US12583792
申请日：2009-08-26
申请人： Hirotaka Kawai , Nobuaki Tsuji , Morito Morishima , Yohei Otani
发明人： Hirotaka Kawai , Nobuaki Tsuji , Morito Morishima , Yohei Otani
IPC分类号： H03F3/217 , H03M1/66
CPC分类号： H03F3/2173 , H03M1/0639 , H03M1/0673 , H03M1/822 , H03M3/328 , H03M3/50 , H03M3/506 , H03M7/3026
摘要： The present invention provides a D/A converter circuit which enables D/A conversion with a high precision and can prevent occurrence of a limit cycle component in the case where an input signal is low, and can also prevent the effect of dither signal from occurring in an analog signal which is a D/A conversion result.A dither signal generation section 505 outputs a dither signal (DITHER) which is an alternating current signal and a reversal dither signal (DITHER_N) inverted from the dither signal. A DEM decoder 502 processes an input digital signal including a component of the dither signal (DITHER), and outputs a plurality of lines of time-series digital signals having a density of “1” or “0” conforming to the input digital signal to be processed. An analog addition section 503 converts a plurality of lines of time-series digital signals and the reversal dither signal (DITHER_N) into an analog signal respectively and adds them, and outputs an analog signal which is a D/A conversion result.
摘要翻译：本发明提供了一种D / A转换器电路，其能够以高精度实现D / A转换，并且可以防止在输入信号低的情况下出现极限循环分量，并且还可以防止抖动信号的影响在作为D / A转换结果的模拟信号中。抖动信号生成单元505输出作为交流信号的抖动信号（DITHER）和从抖动信号反转的反转抖动信号（DITHER_N）。 DEM解码器502处理包括抖动信号（DITHER）分量的输入数字信号，并输出符合输入数字信号的密度为“1”或“0”的多行时间序列数字信号到被处理。模拟加法部分503将多行时间序列数字信号和反相抖动信号（DITHER_N）分别转换为模拟信号并将其相加，并输出作为D / A转换结果的模拟信号。

6. 发明授权

US07679435B2 Digital input class-D amplifier 有权
标题翻译：数字输入D类放大器
公开(公告)号：US07679435B2
公开(公告)日：2010-03-16
申请号：US12075941
申请日：2008-03-14
申请人： Nobuaki Tsuji , Hirotaka Kawai , Morito Morishima
发明人： Nobuaki Tsuji , Hirotaka Kawai , Morito Morishima
IPC分类号： H03F3/68
CPC分类号： H03F3/2175 , H03F2200/345 , H03F2200/351 , H03M1/0668 , H03M1/808
摘要： A digital input class-D amplifier includes a decoder which outputs a plurality of lines of time-series digital signals having a density of 1 or 0 conforming to an input digital signal, an error integrator which integrates a difference between a drive waveform to be applied to a load and a sum of the plurality of lines of time-series digital signals output from the decoder, and a modulation circuit which generates a pulse modulated with a pulse width or a pulse density based on a result of integration performed by the error integrator. The load is driven in accordance with the pulse generated by the modulation circuit.
摘要翻译：数字输入D类放大器包括一个解码器，其输出符合输入数字信号的密度为1或0的多行时间序列数字信号，积分器将积分驱动波形到从解码器输出的多行时间序列数字信号的负载和总和，以及调制电路，其基于由误差积分器执行的积分结果生成以脉冲宽度或脉冲密度调制的脉冲。根据由调制电路产生的脉冲来驱动负载。

7. 发明授权

US07341819B2 Method of manufacture of photosensitive material packaging body and photosensitive material packaging body 失效
标题翻译：感光材料包装体和感光材料包装体的制造方法
公开(公告)号：US07341819B2
公开(公告)日：2008-03-11
申请号：US11189630
申请日：2005-07-25
申请人： Katsunori Goi , Narito Goto , Tetsuo Shima , Hajime Kobayashi , Nobuaki Tsuji
发明人： Katsunori Goi , Narito Goto , Tetsuo Shima , Hajime Kobayashi , Nobuaki Tsuji
IPC分类号： G03C1/00
CPC分类号： G03C3/00
摘要： Several sheets of sheet-shaped photosensitive material 1 are stacked on a paper tray container 2 prepared by press-forming stencil paper sheet, the photosensitive material 1 stacked on said paper tray container is inserted into a moisture-proof and light-shielding bag 3 made of a photosensitive material packaging material having moisture-proof and light-shielding properties and having an aluminum thin foil layer, and the moisture-proof and light-shielding bag 3 is sealed tight under a reduced pressure vacuum.
摘要翻译：将几张片状感光材料1堆叠在通过压制成形的模版纸制成的纸盘容器2上，将堆叠在所述纸盘容器上的感光材料1插入到防潮和遮光袋3中具有防潮和遮光性能并且具有铝薄箔层的感光材料包装材料，并且在减压真空下密封防潮和遮光袋3。

8. 发明申请

US20080032640A1 Spectrum spreading circuit 有权
标题翻译：频谱扩展电路
公开(公告)号：US20080032640A1
公开(公告)日：2008-02-07
申请号：US11825433
申请日：2007-07-06
申请人： Hirotaka Kawai , Nobuaki Tsuji , Yasuomi Tanaka
发明人： Hirotaka Kawai , Nobuaki Tsuji , Yasuomi Tanaka
IPC分类号： H04B1/04
CPC分类号： H04B1/7136 , H04B2001/71365 , H04B2001/7154
摘要： A spectrum spreading circuit, includes a control portion that repeats a sequence in which the control portion generates a designation signal for designating all of plural frequencies in prescribed order by selecting a next frequency from the frequencies which have not been selected, and a signal generating portion that sequentially generates output signals having the designated frequencies respectively on the basis of the designation signal.
摘要翻译：频谱扩展电路包括控制部分，该控制部分通过从未被选择的频率中选择下一个频率来重复控制部分以规定的顺序产生指定多个频率的指定信号的序列，以及信号产生部分分别基于指定信号产生具有指定频率的输出信号。

9. 发明授权

US07298855B2 Volume circuit using resistive ladder circuits 失效
标题翻译：使用电阻梯形电路的音量电路
公开(公告)号：US07298855B2
公开(公告)日：2007-11-20
申请号：US10174884
申请日：2002-06-19
申请人： Nobuaki Tsuji , Hisatoshi Uchida
发明人： Nobuaki Tsuji , Hisatoshi Uchida
IPC分类号： H03G3/00
CPC分类号： H03G1/0088 , H03F3/45475 , H03F2203/45591
摘要： A volume circuit contains resistive ladder circuits, from which a desired fractional voltage output (Vs) is extracted and supplied to an amplifier to provide an output voltage (Vout). The resistive ladder circuits comprise multiple lines of series resistances, wherein each line contains a resistance portion ‘nR’ (where ‘n’ denotes a division index, and ‘R’ denotes an element resistance) that is connected in parallel with a next line, so that an overall resistance of following lines is ‘(n−1)×n’ times larger than the element resistance. Secondary resistive ladder circuits can be additionally arranged in series in order to control a secondary amplifier that absorbs excessive currents flowing into the resistive ladder circuits. The secondary resistive ladder circuits are constituted symmetrically with the resistive ladder circuits, in which output terminals (t1-t12) are all set to the same potential.
摘要翻译：体积电路包含电阻梯形电路，从中提取期望的分数电压输出（Vs）并将其提供给放大器以提供输出电压（Vout）。电阻梯形电路包括多条串联电阻，其中每条线包含电阻部分“nR”（其中“n”表示分割指数，“R”表示元件电阻），其与下一行并行连接，使得以下线的总电阻为元件电阻的“（n-1）×n”倍。次级电阻梯形电路可以额外地串联布置，以便控制吸收流入电阻梯形电路的过大电流的次级放大器。次级电阻梯形电路与电阻梯形电路对称地构成，其中输出端子（t 1 -t 12）都被设置为相同的电位。

10. 发明申请

US20060008095A1 Pulse-width modulation amplifier and suppression of clipping therefor 有权
标题翻译：脉宽调制放大器和限幅器的抑制
公开(公告)号：US20060008095A1
公开(公告)日：2006-01-12
申请号：US11172137
申请日：2005-06-30
申请人： Nobuaki Tsuji
发明人： Nobuaki Tsuji
IPC分类号： H03G3/00
CPC分类号： H03G11/00 , H03F1/26 , H03F3/217 , H03F2200/03 , H03F2200/66
摘要： A pulse-width modulation (PWM) amplifier is adapted to a class-D amplifier in which an analog input signal is subjected to integration, pulse-width modulation, and switched amplification, wherein a glitch elimination circuit eliminates noise from a pulse-width modulated signal, from which a high pulse signal and a low pulse signal are isolated such that each pulse is delayed by a dead time at the leading-edge timing thereof. When both of them are simultaneously set to a high level, one of them is reduced in level. In response to the occurrence of clipping, an integration constant applied to an operational amplifier is automatically changed from a primary integration constant to a secondary integration constant. When the clipped state is sustained for a prescribed time, an inversion pulse is compulsorily introduced into the pulse-width modulated signal.
摘要翻译：脉冲宽度调制（PWM）放大器适用于其中模拟输入信号经受积分，脉冲宽度调制和开关放大的D类放大器，其中毛刺消除电路消除来自脉冲宽度调制信号，高脉冲信号和低脉冲信号从其隔离，使得每个脉冲在其前沿定时被延迟死区时间。当两者都同时设置为高水平时，其中一个水平降低。响应于削波的发生，施加到运算放大器的积分常数从一次积分常数自动地变化到二次积分常数。当限幅状态持续规定的时间时，强制地将脉冲宽度调制信号引入反转脉冲。

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