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    • 1. 发明申请
    • DISPLAY PANEL, METHOD OF INSPECTING THE DISPLAY PANEL AND METHOD OF MANUFACTURING THE DISPLAY PANEL
    • 显示面板,检查显示面板的方法和制造显示面板的方法
    • US20080170195A1
    • 2008-07-17
    • US11970068
    • 2008-01-07
    • Sun-Ja KWONJin JEONYoung-Gi PARK
    • Sun-Ja KWONJin JEONYoung-Gi PARK
    • G02F1/1343G01R31/28G02F1/13
    • G02F1/1309G02F1/13338G09G3/006G09G3/3648
    • A display panel includes an array substrate, an opposite substrate facing the array substrate, and a liquid crystal layer interposed between the array and opposite substrates. The array substrate includes a gate wiring, a data wiring, a pixel section, a sensor wiring section, a sensor electrode section and a sensor pad section. The gate wiring is formed in a first direction. The data wiring is formed in a second direction crossing the first direction. The pixel section is electrically connected to the gate and data wirings. The sensor wiring section is spaced apart from the gate and data wirings. The sensor electrode section is electrically connected to the sensor wiring section. The sensor pad section applies a test voltage to the sensor wiring section in order to inspect a display panel defect. Therefore, a short defect, which is generated between the array substrate and the opposite substrate, may be easily inspected.
    • 显示面板包括阵列基板,面向阵列基板的相对基板,以及插入阵列和相对基板之间的液晶层。 阵列基板包括栅极布线,数据布线,像素部分,传感器布线部分,传感器电极部分和传感器焊盘部分。 栅极布线沿第一方向形成。 数据布线沿与第一方向交叉的第二方向形成。 像素部分电连接到栅极和数据布线。 传感器接线部分与栅极和数据布线间隔开。 传感器电极部与传感器配线部电连接。 传感器焊盘部分向传感器接线部分施加测试电压,以便检查显示板缺陷。 因此,可以容易地检查在阵列基板和相对基板之间产生的短缺陷。
    • 2. 发明授权
    • Compensation device for convergence drift used in cathode ray tube
    • 用于阴极射线管的会聚漂移的补偿装置
    • US06316871B2
    • 2001-11-13
    • US09759816
    • 2001-01-11
    • Young-Gi Park
    • Young-Gi Park
    • H01J2950
    • H01J29/51
    • A compensation device for convergence drift used in a CRT, including a convergence electrode attached on an outer surface of a neck portion, an inducement means for inducing static electricity from a voltage to be supplied for an inner graphite layer, and a connecting member formed between the convergence electrode and the inducement means to supply high potential from the inducement means to the convergence electrode. As the convergence electrode provides high potential generated from the inducement means to the neck portion, the compensation device decreases the potential difference between grid electrodes and the neck portion. Thus, the compensation device makes the electric fields, which cause the charges to be accumulated, to weaken so that the convergence drift is effectively reduced.
    • 一种用于CRT中的会聚漂移的补偿装置,包括安装在颈部的外表面上的会聚电极,用于从内部石墨层供应的电压引起静电的诱导装置,以及形成在 会聚电极和诱导装置从诱导装置向会聚电极提供高电位。 由于会聚电极将从诱导装置产生的高电位提供给颈部,所以补偿装置减小了电极与颈部之间的电位差。 因此,补偿装置使得导致电荷积聚的电场减弱,从而有效地降低了会聚漂移。
    • 3. 发明授权
    • Memory module having module control circuit
    • 内存模块具有模块控制电路
    • US6101149A
    • 2000-08-08
    • US177500
    • 1998-10-23
    • Young Gi ParkJi Bum Kim
    • Young Gi ParkJi Bum Kim
    • G11C11/401G06F12/06G11C8/10G11C11/34G11C8/00
    • G11C8/10
    • A memory module having a module control circuit which is capable of decreasing an operational current by configuring a 1BANK 4M.times.64 module using 16M DRAMs (1K Refresh.times.16) and reducing the number of operational devices. The module control circuit decodes externally inputted eleventh and twelfth address signals and outputs control signals in accordance with one of a plurality of column address strobe signals and a row address strobe signal, and a plurality of DRAMs in a memory unit are selected by the control signals from the module control circuit and are parallely connected for performing a data write and read operation in accordance with externally inputted first through tenth address signals, a write enable signal, an output enable signal, and the column address strobe signals.
    • 具有模块控制电路的存储器模块,其能够通过使用16M DRAM(1K Refreshx16)配置1BANK 4Mx64模块并减少操作设备的数量来降低工作电流。 模块控制电路解码外部输入的第十一和第十二地址信号,并根据多个列地址选通信号和行地址选通信号中的一个输出控制信号,并且通过控制信号选择存储单元中的多个DRAM 根据外部输入的第一至第十地址信号,写使能信号,输出使能信号和列地址选通信号,从模块控制电路并联并进行数据写入和读取操作。
    • 4. 发明授权
    • Display substrate, method of manufacturing the same, and liquid crystal display apparatus having the same
    • 显示基板及其制造方法以及具有该显示基板的液晶显示装置
    • US08031301B2
    • 2011-10-04
    • US12070753
    • 2008-02-20
    • Young-Gi ParkKee-Han UhJi-Suk LimSun-Ja Kwon
    • Young-Gi ParkKee-Han UhJi-Suk LimSun-Ja Kwon
    • G02F1/1333
    • G02F1/133707G02F1/1343
    • A display substrate includes a pixel, first, second and third gate lines, and a source line. The pixel includes first, second and third unit pixels, each generating a different color. The first, second and third gate lines are electrically connected to respective ones of the first, second and third unit pixels. The source line is electrically connected to each of the first, second and third unit pixels. Each of the first, second and third unit pixels includes a common electrode and a respective pixel electrode. The common electrode is formed on a substrate. The pixel electrodes are disposed over the common electrode such that the pixel electrode face the common electrode. Each of the pixel electrodes has a plurality of openings therethrough. This arrangement results in a wider display viewing angle and a reduction in the required number of source driver chips.
    • 显示基板包括像素,第一,第二和第三栅极线以及源极线。 像素包括第一,第二和第三单位像素,每个像素产生不同的颜色。 第一,第二和第三栅极线电连接到第一,第二和第三单位像素中的相应的一个。 源极线电连接到第一,第二和第三单位像素中的每一个。 第一,第二和第三单位像素中的每一个包括公共电极和相应的像素电极。 公共电极形成在基板上。 像素电极设置在公共电极上,使得像素电极面对公共电极。 每个像素电极具有穿过其中的多个开口。 这种布置导致更宽的显示视角和所需数量的源驱动器芯片的减少。
    • 5. 发明申请
    • Making LCD substrates
    • 制作LCD基板
    • US20090091674A1
    • 2009-04-09
    • US12070753
    • 2008-02-20
    • Young-Gi ParkKee-Han UhJi-Suk LimSun-Ja Kwon
    • Young-Gi ParkKee-Han UhJi-Suk LimSun-Ja Kwon
    • G02F1/1343G02F1/1368
    • G02F1/133707G02F1/1343
    • A display substrate includes a pixel, first, second and third gate lines, and a source line. The pixel includes first, second and third unit pixels, each generating a different color. The first, second and third gate lines are electrically connected to respective ones of the first, second and third unit pixels. The source line is electrically connected to each of the first, second and third unit pixels. Each of the first, second and third unit pixels includes a common electrode and a respective pixel electrode. The common electrode is formed on a substrate. The pixel electrodes are disposed over the common electrode such that the pixel electrode face the common electrode. Each of the pixel electrodes has a plurality of openings therethrough. This arrangement results in a wider display viewing angle and a reduction in the required number of source driver chips.
    • 显示基板包括像素,第一,第二和第三栅极线以及源极线。 像素包括第一,第二和第三单位像素,每个像素产生不同的颜色。 第一,第二和第三栅极线电连接到第一,第二和第三单位像素中的相应的一个。 源极线电连接到第一,第二和第三单位像素中的每一个。 第一,第二和第三单位像素中的每一个包括公共电极和相应的像素电极。 公共电极形成在基板上。 像素电极设置在公共电极上,使得像素电极面对公共电极。 每个像素电极具有穿过其中的多个开口。 这种布置导致更宽的显示视角和所需数量的源驱动器芯片的减少。