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    • 1. 发明授权
    • Memory module having module control circuit
    • 内存模块具有模块控制电路
    • US6101149A
    • 2000-08-08
    • US177500
    • 1998-10-23
    • Young Gi ParkJi Bum Kim
    • Young Gi ParkJi Bum Kim
    • G11C11/401G06F12/06G11C8/10G11C11/34G11C8/00
    • G11C8/10
    • A memory module having a module control circuit which is capable of decreasing an operational current by configuring a 1BANK 4M.times.64 module using 16M DRAMs (1K Refresh.times.16) and reducing the number of operational devices. The module control circuit decodes externally inputted eleventh and twelfth address signals and outputs control signals in accordance with one of a plurality of column address strobe signals and a row address strobe signal, and a plurality of DRAMs in a memory unit are selected by the control signals from the module control circuit and are parallely connected for performing a data write and read operation in accordance with externally inputted first through tenth address signals, a write enable signal, an output enable signal, and the column address strobe signals.
    • 具有模块控制电路的存储器模块,其能够通过使用16M DRAM(1K Refreshx16)配置1BANK 4Mx64模块并减少操作设备的数量来降低工作电流。 模块控制电路解码外部输入的第十一和第十二地址信号,并根据多个列地址选通信号和行地址选通信号中的一个输出控制信号,并且通过控制信号选择存储单元中的多个DRAM 根据外部输入的第一至第十地址信号,写使能信号,输出使能信号和列地址选通信号,从模块控制电路并联并进行数据写入和读取操作。