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1. 发明授权

US07733337B2 Circuit for signal amplification and use of the same in active matrix devices 失效
标题翻译：用于信号放大的电路及其在有源矩阵器件中的使用
公开(公告)号：US07733337B2
公开(公告)日：2010-06-08
申请号：US10567171
申请日：2004-07-30
申请人： Martin J. Edwards , John R. A. Ayres
发明人： Martin J. Edwards , John R. A. Ayres
IPC分类号： G09G5/00
CPC分类号： G09G3/3648 , G09G3/3208 , G09G2300/0833 , G09G2300/0842 , G09G2300/0852 , G09G2300/088 , G09G2330/021 , H03F3/005 , H03F7/04
摘要： An amplification circuit comprises a capacitor arrangement (42) and a switching arrangement. The capacitor arrangement has a first capacitor (C2) which has a voltage-dependent capacitance and a second capacitor (C1) (which may also be voltage-dependent). The circuit is operable in two modes, a first mode in which the input voltage is provided to one terminal of at least the first capacitor, and a second mode in which the switching arrangement causes charge to be redistributed between the first and second capacitors such that the voltage across the first capacitor changes to reduce the capacitance of the first capacitor, the output voltage being dependent on the resulting voltage across the first capacitor. The invention uses a voltage controlled capacitance in combination with charge sharing between capacitors, which has the result of providing a voltage amplification characteristic. This arrangement can thus be used for the amplification of an analogue voltage, or the boosting of a fixed level (i.e. digital voltage). Thus, the circuit of the invention can be used for level shifting or amplification, for example for use in the pixels of an active matrix array device.
摘要翻译：放大电路包括电容器装置（42）和开关装置。电容器装置具有第一电容器（C2），其具有电压相关的电容和第二电容器（C1）（其也可以是取决于电压的）。电路可以以两种模式操作：第一模式，其中输入电压被提供给至少第一电容器的一个端子;以及第二模式，其中开关装置使电荷在第一和第二电容器之间重新分布，使得第一电容器两端的电压改变以减小第一电容器的电容，输出电压取决于第一电容器两端产生的电压。本发明使用电压控制电容与电容器之间的电荷共享结合起来，其具有提供电压放大特性的结果。因此，这种布置可用于放大模拟电压，或升高固定电平（即数字电压）。因此，本发明的电路可用于电平转换或放大，例如用于有源矩阵阵列器件的像素。

2. 发明授权

US06937248B2 Pixel array with indirectly associated memory 有权
标题翻译：像素阵列间接关联的内存
公开(公告)号：US06937248B2
公开(公告)日：2005-08-30
申请号：US10198502
申请日：2002-07-18
申请人： Martin J. Edwards , John R. A. Ayres
发明人： Martin J. Edwards , John R. A. Ayres
IPC分类号： G02F1/1362 , G02F1/133 , G09F9/30 , G09G3/20 , G09G3/36 , G11C5/02 , G11C8/10 , H01L21/336 , H01L29/786 , G06F12/06
CPC分类号： G11C8/10 , G09G3/20 , G09G3/3648 , G09G2300/0842 , G11C5/025
摘要： A pixellated device (10), such as a display, has pixel row and column address lines (18,20) for addressing each pixel, thereby providing signal data to each pixel (12) or reading signal data from each pixel. An array of memory cells (22) is provided on the substrate interspersed with the pixel drive circuitry (16), wherein memory address circuitry (24,26,28,30) is provided enabling data to be written to each memory cell and enabling data to be read from each cell (22), independently of the signal data. Each memory cell (22) is thus addressable independently of the pixel data. Thus, the memory cells do not form part of the pixel circuitry, which allows the memory to be used in a flexible manner. For example, the memory may be used for purposes not directly associated with the driving or addressing of the pixels of the device.
摘要翻译：诸如显示器的像素化设备（10）具有用于寻址每个像素的像素行和列地址线（18,20），从而向每个像素（12）提供信号数据或从每个像素读取信号数据。在散布有像素驱动电路（16）的衬底上提供存储单元阵列（22），其中提供存储器地址电路（24,26,28,30），使得能够将数据写入每个存储器单元并使能数据要从每个单元（22）读取，独立于信号数据。因此，每个存储单元（22）可独立于像素数据进行寻址。因此，存储器单元不形成像素电路的一部分，这允许以灵活的方式使用存储器。例如，存储器可以用于与驱动或寻址设备的像素直接相关联的目的。

3. 发明授权

US6046479A Electronic devices comprising thin-film transistors 有权
标题翻译：包括薄膜晶体管的电子器件
公开(公告)号：US6046479A
公开(公告)日：2000-04-04
申请号：US274389
申请日：1999-03-23
申请人： Nigel D. Young , John R. A. Ayres , Martin J. Edwards
发明人： Nigel D. Young , John R. A. Ayres , Martin J. Edwards
IPC分类号： H01L21/336 , G02F1/1362 , G09G3/36 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/786 , H01L27/01 , H01L31/0392 , H01L23/58
CPC分类号： G09G3/3688 , H01L27/1214 , H01L29/78621 , H01L29/78627 , G02F1/13454
摘要： A large-area electronic device, such as an AMLCD, has switching TFTs (T.sub.p) in a matrix and circuit TFTs (T.sub.s) in a peripheral drive circuit. Both the TFTs (T.sub.p, T.sub.s) comprise a field-relief region (130) which has a lower doping concentration (N-) than their drain region (113) and which is present between their channel region (111) and the drain region (113). This field-relief region (130), at least over most of its length, overlaps with the gate (121) in the circuit TFTs (T.sub.s) so as to reduce series resistance in the field-relief region (130) by conductivity modulation with the gate (121). However, the drain region (113) in the switching TFTs (T.sub.p) is offset from overlap with their gate (121) by at least most of the length of their field-relief region (130). This field-relief offset permits the switching TFTs (T.sub.p) to have a lower leakage current than the circuit TFTs (T.sub.s).
摘要翻译：诸如AMLCD的大面积电子器件具有矩阵中的开关TFT（Tp）和外围驱动电路中的电路TFT（Ts）。这两个TFT（Tp，Ts）都包括一个具有低于漏极区（113）的掺杂浓度（N）的减小区（130），并且它们位于它们的沟道区（111）和漏区 113）。至少在其大部分长度上的该场释放区域（130）与电路TFT（Ts）中的栅极（121）重叠，以便通过电导率调制来减小励磁区域（130）中的串联电阻门（121）。然而，开关TFT（Tp）中的漏区（113）与其栅极（121）的至少大部分距离偏离其栅极（121）的大部分。该场释放偏移允许开关TFT（Tp）具有比电路TFT（Ts）更低的漏电流。

4. 发明授权

US07382176B2 Charge pump circuit 失效
标题翻译：电荷泵电路
公开(公告)号：US07382176B2
公开(公告)日：2008-06-03
申请号：US10542674
申请日：2003-12-24
申请人： John R. A. Ayres , Keitaro Yamashita
发明人： John R. A. Ayres , Keitaro Yamashita
IPC分类号： H02M3/18 , G05F3/16
CPC分类号： H02M3/073
摘要： A charge pump circuit has a voltage increasing stage and a voltage decreasing stage in parallel, and sharing a common input. This shows charge to flow between the stages, so that charge used in the pumping of one stage is recycled to the other stage.
摘要翻译：电荷泵电路具有并联的升压级和降压级，并共用共用输入。这表明在各级之间流动的电荷，使得在一级的泵送中使用的电荷被再循环到另一级。

5. 发明授权

US06404271B2 Charge pump circuit 有权
标题翻译：电荷泵电路
公开(公告)号：US06404271B2
公开(公告)日：2002-06-11
申请号：US09756932
申请日：2001-01-09
申请人： John R. A. Ayres
发明人： John R. A. Ayres
IPC分类号： G05F110
CPC分类号： H02M3/073
摘要： A charge pump circuit (1) comprises a series of voltage boosting stages (11), each stage (11) comprising a switching means (10) and a capacitive element (12) connected in series between the input to the stage and a respective voltage control terminal (14,15). The voltage control terminals (14,15) comprise at least two groups of terminals receiving respective timed control voltages, and adjacent stages (11) are associated with different terminal groups. The switching means (10) of one or more stages (11) comprises a lateral PIN junction diode. The use of diodes enables the charge pump circuit itself to operate from a lower supply voltage than is possible with the use of TFTs. The use of lateral PIN diodes enables the charge pump circuit to be formed using the same processing as may be required for TFT's of the circuit to which the boosted voltage is supplied. This enables the charge pump circuit to be formed on a common substrate with higher voltage TFT circuitry for, for example, an AMLCD.
摘要翻译：电荷泵电路（1）包括一系列升压级（11），每个级（11）包括开关装置（10）和电容元件（12），该电容元件（12）串联在所述级的输入端和相应的电压控制终端（14,15）。电压控制端子（14,15）包括接收相应的定时控制电压的至少两组端子，并且相邻级（11）与不同端子组相关联。一个或多个级（11）的开关装置（10）包括横向PIN结二极管。使用二极管使得电荷泵电路本身能够以比使用TFT可能的更低的电源电压工作。使用横向PIN二极管使得可以使用与提供升压电压的电路的TFT相同的处理来形成电荷泵电路。这使得电荷泵电路可以在具有例如AMLCD的更高电压TFT电路的公共基板上形成。

6. 发明授权

US5684318A Electronic devices with thin-film circuit elements forming a sampling circuit 失效
标题翻译：具有薄膜电路元件的电子器件形成采样电路
公开(公告)号：US5684318A
公开(公告)日：1997-11-04
申请号：US639277
申请日：1996-04-25
申请人： John R. A. Ayres , Martin J. Edwards
发明人： John R. A. Ayres , Martin J. Edwards
IPC分类号： H01L29/78 , G02F1/1362 , H01L27/12 , H01L29/786 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L29/78696 , G09G3/3688 , H01L27/12 , H01L29/78606 , H01L29/78618 , G02F1/13454 , G09G2310/0294
摘要： In an LCD or other electronic device, thin-film circuit elements on a substrate (100) form a sample-and-hold or other sampling circuit (10). The circuit (10) comprises a TFT (Ts) as a sampling transistor and preferably another TFT (T2) to compensate for displacement currents in charging and discharging the insulated gate (12) of the sampling TFT. Even when T2 is included, a slow drift in output voltage (Vo) is observed when Ts switches off, and this limits use of the circuit, especially in large area active-matrix devices. In accordance with the invention this slow drift is removed or significantly reduced by injecting minority carriers into the channel region of Ts (and T2) from a doped opposite-type region (119) or Schottky contact region (119) which is forward biased via a thin-film supply line (129). The minority carriers neutralise majority carriers which are being slowly released by thermal emission from trapping states in the TFT body.
摘要翻译：在LCD或其他电子设备中，衬底（100）上的薄膜电路元件形成采样保持或其它采样电路（10）。电路（10）包括作为采样晶体管的TFT（Ts），并且优选地为补偿采样TFT的绝缘栅极（12）的充电和放电中的位移电流的另一TFT（T2）。即使在包括T2的情况下，当Ts关断时，也观察到输出电压（Vo）的缓慢偏移，这限制了电路的使用，特别是在大面积的有源矩阵器件中。根据本发明，通过从掺杂的相对类型区域（119）或肖特基接触区域（119）将Ts（和T2）的少数载流子注入到Ts（和T2）的沟道区域中，可以去除或显着降低该慢漂移，薄膜供应线（129）。少数载体中和通过TFT体内的捕获状态的热发射缓慢释放的多数载流子。

7. 发明授权

US08228317B2 Active matrix array device 有权
标题翻译：有源矩阵阵列器件
公开(公告)号：US08228317B2
公开(公告)日：2012-07-24
申请号：US11817037
申请日：2006-02-27
申请人： John R. A. Ayres
发明人： John R. A. Ayres
IPC分类号： G06F3/038
CPC分类号： G09G3/3688 , G09G2310/027
摘要： An active matrix array device has driver circuitry for providing address signals to the matrix elements, including digital to analogue converter circuitry. This has a voltage selector for selecting a pair of voltages based on a first set of bits of the digital matrix element signal, and a converter arrangement for providing an analogue voltage level derived from the pair of voltages and from a second set of bits of the digital matrix element signal. The converter arrangement comprises first and second digital to analogue converter circuits (30, 32) in parallel and which are adapted to provide an analogue voltage level to an output of the converter arrangement alternately. The invention provides a more efficient use of substrate area for given circuit response requirements.
摘要翻译：有源矩阵阵列器件具有用于向矩阵元件提供地址信号的驱动器电路，包括数模转换器电路。它具有电压选择器，用于基于数字矩阵元件信号的第一组位选择一对电压;以及转换器装置，用于提供从该对电压导出的模拟电压电平，以及从第二组位数字矩阵元素信号。转换器装置并联包括第一和第二数模转换器电路（30,32），并且适于将模拟电压电平交替地提供给转换器装置的输出。本发明提供了对于给定的电路响应要求更有效地使用衬底面积。

8. 发明授权

US07230597B2 Active matrix array devices 有权
标题翻译：有源矩阵阵列器件
公开(公告)号：US07230597B2
公开(公告)日：2007-06-12
申请号：US10191293
申请日：2002-07-09
申请人： Martin J. Edwards , John R. A. Ayres
发明人： Martin J. Edwards , John R. A. Ayres
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/2074 , G09G3/3648 , G09G2300/0804 , G09G2300/0809 , G09G2300/0828 , G09G2300/0842 , G09G2300/0857 , G09G2310/027
摘要： An active matrix device includes a plurality of display elements 10 including a data storage node 18, 72 for storing data in the form of charge on a capacitor 72 and/or capacitative element 18. Refresh circuitry 51 is provided to refresh the data storage node, for example including temporary storage circuit 55 and drive circuit 56.
摘要翻译：有源矩阵装置包括多个显示元件10，包括用于以电容器72和/或电容元件18上的电荷形式存储数据的数据存储节点18,72。提供刷新电路51来刷新数据存储节点，例如包括临时存储电路55和驱动电路56。

9. 发明授权

US06838700B2 Active matrix substrate 失效
标题翻译：有源矩阵基板
公开(公告)号：US06838700B2
公开(公告)日：2005-01-04
申请号：US10638266
申请日：2003-08-08
申请人： Michael J. Trainor , John R. A. Ayres
发明人： Michael J. Trainor , John R. A. Ayres
IPC分类号： H01L27/04 , G02F1/1362 , H01L21/822 , H01L21/8238 , H01L27/02 , H01L27/06 , H01L27/08 , H01L27/092 , H01L27/12 , H01L29/786 , H01L29/04
CPC分类号： G02F1/136204 , H01L27/0255 , H01L27/12
摘要： An active matrix substrate includes a row and column array of active elements. Each element is associated with a TFT having a gate electrode connected to a corresponding row conductor and source and drain (electrodes connected to corresponding column conductors. Circuitry for protecting against electrostatic discharge (ESD) is connected to at least one of the row conductors for protecting the TFTs against ESD.
摘要翻译：有源矩阵基板包括有源元件的行和列阵列。每个元件与具有连接到相应的行导体和源极和漏极（连接到相应的列导体的电极）连接的栅极的TFT相关联。用于防止静电放电（ESD）的电路连接到行导体中的至少一个用于保护针对ESD的TFT。

10. 发明授权

US06632709B2 Electronic device manufacture 有权
标题翻译：电子设备制造
公开(公告)号：US06632709B2
公开(公告)日：2003-10-14
申请号：US09821130
申请日：2001-03-29
申请人： John R. A. Ayres , Stanley D. Brotherton , Carole A. Fisher , Frnak W. Rohlfing , Nigel D. Young
发明人： John R. A. Ayres , Stanley D. Brotherton , Carole A. Fisher , Frnak W. Rohlfing , Nigel D. Young
IPC分类号： H01L2100
CPC分类号： H01L29/66757 , H01L29/78609 , H01L29/78621 , H01L2029/7863
摘要： A method of fabricating an electronic device comprising a thin-film transistor, which addresses a problem of increased off-state current and reduced carrier mobility in self-aligned thin-film transistors. According to the method, a gate layer (2,46) is etched back underneath a mask layer (20,48). Following an implantation step using the mask layer as an implantation mask, the etch-back exposes implant damage which is then annealed by an energy beam (42).
摘要翻译：一种制造包括薄膜晶体管的电子器件的方法，其解决了自对准薄膜晶体管中增加的截止电流和降低的载流子迁移率的问题。根据该方法，在掩模层下面（ 20,48 ）蚀刻栅极层（ 2,46 ）。在使用掩模层作为注入掩模的注入步骤之后，蚀刻暴露植入物损伤，然后通过能量束（ 42 ）退火。

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