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    • 2. 发明授权
    • Circuit for signal amplification and use of the same in active matrix devices
    • 用于信号放大的电路及其在有源矩阵器件中的使用
    • US07733337B2
    • 2010-06-08
    • US10567171
    • 2004-07-30
    • Martin J. EdwardsJohn R. A. Ayres
    • Martin J. EdwardsJohn R. A. Ayres
    • G09G5/00
    • G09G3/3648G09G3/3208G09G2300/0833G09G2300/0842G09G2300/0852G09G2300/088G09G2330/021H03F3/005H03F7/04
    • An amplification circuit comprises a capacitor arrangement (42) and a switching arrangement. The capacitor arrangement has a first capacitor (C2) which has a voltage-dependent capacitance and a second capacitor (C1) (which may also be voltage-dependent). The circuit is operable in two modes, a first mode in which the input voltage is provided to one terminal of at least the first capacitor, and a second mode in which the switching arrangement causes charge to be redistributed between the first and second capacitors such that the voltage across the first capacitor changes to reduce the capacitance of the first capacitor, the output voltage being dependent on the resulting voltage across the first capacitor. The invention uses a voltage controlled capacitance in combination with charge sharing between capacitors, which has the result of providing a voltage amplification characteristic. This arrangement can thus be used for the amplification of an analogue voltage, or the boosting of a fixed level (i.e. digital voltage). Thus, the circuit of the invention can be used for level shifting or amplification, for example for use in the pixels of an active matrix array device.
    • 放大电路包括电容器装置(42)和开关装置。 电容器装置具有第一电容器(C2),其具有电压相关的电容和第二电容器(C1)(其也可以是取决于电压的)。 电路可以以两种模式操作:第一模式,其中输入电压被提供给至少第一电容器的一个端子;以及第二模式,其中开关装置使电荷在第一和第二电容器之间重新分布,使得 第一电容器两端的电压改变以减小第一电容器的电容,输出电压取决于第一电容器两端产生的电压。 本发明使用电压控制电容与电容器之间的电荷共享结合起来,其具有提供电压放大特性的结果。 因此,这种布置可用于放大模拟电压,或升高固定电平(即数字电压)。 因此,本发明的电路可用于电平转换或放大,例如用于有源矩阵阵列器件的像素。
    • 3. 发明授权
    • Pixel array with indirectly associated memory
    • 像素阵列间接关联的内存
    • US06937248B2
    • 2005-08-30
    • US10198502
    • 2002-07-18
    • Martin J. EdwardsJohn R. A. Ayres
    • Martin J. EdwardsJohn R. A. Ayres
    • G02F1/1362G02F1/133G09F9/30G09G3/20G09G3/36G11C5/02G11C8/10H01L21/336H01L29/786G06F12/06
    • G11C8/10G09G3/20G09G3/3648G09G2300/0842G11C5/025
    • A pixellated device (10), such as a display, has pixel row and column address lines (18,20) for addressing each pixel, thereby providing signal data to each pixel (12) or reading signal data from each pixel. An array of memory cells (22) is provided on the substrate interspersed with the pixel drive circuitry (16), wherein memory address circuitry (24,26,28,30) is provided enabling data to be written to each memory cell and enabling data to be read from each cell (22), independently of the signal data. Each memory cell (22) is thus addressable independently of the pixel data. Thus, the memory cells do not form part of the pixel circuitry, which allows the memory to be used in a flexible manner. For example, the memory may be used for purposes not directly associated with the driving or addressing of the pixels of the device.
    • 诸如显示器的像素化设备(10)具有用于寻址每个像素的像素行和列地址线(18,20),从而向每个像素(12)提供信号数据或从每个像素读取信号数据。 在散布有像素驱动电路(16)的衬底上提供存储单元阵列(22),其中提供存储器地址电路(24,26,28,30),使得能够将数据写入每个存储器单元并使能数据 要从每个单元(22)读取,独立于信号数据。 因此,每个存储单元(22)可独立于像素数据进行寻址。 因此,存储器单元不形成像素电路的一部分,这允许以灵活的方式使用存储器。 例如,存储器可以用于与驱动或寻址设备的像素直接相关联的目的。
    • 5. 发明授权
    • Electronic devices with thin-film circuit elements forming a sampling
circuit
    • 具有薄膜电路元件的电子器件形成采样电路
    • US5684318A
    • 1997-11-04
    • US639277
    • 1996-04-25
    • John R. A. AyresMartin J. Edwards
    • John R. A. AyresMartin J. Edwards
    • H01L29/78G02F1/1362H01L27/12H01L29/786H01L29/76H01L29/94H01L31/062H01L31/113
    • H01L29/78696G09G3/3688H01L27/12H01L29/78606H01L29/78618G02F1/13454G09G2310/0294
    • In an LCD or other electronic device, thin-film circuit elements on a substrate (100) form a sample-and-hold or other sampling circuit (10). The circuit (10) comprises a TFT (Ts) as a sampling transistor and preferably another TFT (T2) to compensate for displacement currents in charging and discharging the insulated gate (12) of the sampling TFT. Even when T2 is included, a slow drift in output voltage (Vo) is observed when Ts switches off, and this limits use of the circuit, especially in large area active-matrix devices. In accordance with the invention this slow drift is removed or significantly reduced by injecting minority carriers into the channel region of Ts (and T2) from a doped opposite-type region (119) or Schottky contact region (119) which is forward biased via a thin-film supply line (129). The minority carriers neutralise majority carriers which are being slowly released by thermal emission from trapping states in the TFT body.
    • 在LCD或其他电子设备中,衬底(100)上的薄膜电路元件形成采样保持或其它采样电路(10)。 电路(10)包括作为采样晶体管的TFT(Ts),并且优选地为补偿采样TFT的绝缘栅极(12)的充电和放电中的位移电流的另一TFT(T2)。 即使在包括T2的情况下,当Ts关断时,也观察到输出电压(Vo)的缓慢偏移,这限制了电路的使用,特别是在大面积的有源矩阵器件中。 根据本发明,通过从掺杂的相对类型区域(119)或肖特基接触区域(119)将Ts(和T2)的少数载流子注入到Ts(和T2)的沟道区域中,可以去除或显着降低该慢漂移, 薄膜供应线(129)。 少数载体中和通过TFT体内的捕获状态的热发射缓慢释放的多数载流子。
    • 8. 发明授权
    • Active matrix array device, electronic device and operating method for an active matrix array device
    • 有源矩阵阵列器件,电子器件和有源矩阵阵列器件的操作方法
    • US07586473B2
    • 2009-09-08
    • US10552411
    • 2004-03-30
    • Martin J. EdwardsJohn R. A. Ayres
    • Martin J. EdwardsJohn R. A. Ayres
    • G09G3/36
    • G09G3/3618G09G3/3614G09G3/3659G09G2300/0809G09G2300/0842G09G2300/0852G09G2300/0876G09G2330/021
    • An active matrix array device has a plurality of matrix array elements (100), each of which have a first capacitive device (120) coupled to a charging conductor (32m) via a first switch (100) being responsive to an addressing conductor (22n). In addition, the matrix array elements (100) comprise a second capacitive device (130) coupled to the first capacitive device (120) via a second switch (112) being responsive to en enable signal provided via an enable conductor (42n). The second capacitive device (130) is coupled to the control terminal of a third switch (114), which is coupled between the first capacitive device (120) and a potential source like the charging conductor (32m). The second capacitive device (130) is used to sample the voltage across the first capacitive device (120), which enables the third switch (114) if of an appropriate value, thus providing a conductive path between the first capacitive device (120) and the potential source. This arrangement allows for a low-power data refresh mode of the matrix array elements (100) with polarity inversion in subsequent refresh cycles.
    • 有源矩阵阵列器件具有多个矩阵阵列元件(100),每个矩阵阵列元件(100)具有经由第一开关(100)耦合到充电导体(32m)的第一电容器件(120),所述第一开关响应于寻址导体 )。 此外,矩阵阵列元件(100)包括经由第二开关(112)耦合到第一电容性装置(120)的第二电容性装置(130),响应于经由使能导体(42n)提供的使能信号。 第二电容性装置(130)耦合到第三开关(114)的控制端子,第三开关(114)耦合在第一电容性装置(120)和类似于充电导体(32m)的电位源之间。 第二电容性装置(130)用于对第一电容性装置(120)两端的电压进行采样,如果第三电容性装置(120)具有合适的值,则能够使第三开关(114),从而在第一电容性装置(120)和 潜在的来源。 这种布置允许在随后的刷新周期中具有极性反转的矩阵阵列元件(100)的低功率数据刷新模式。
    • 9. 发明授权
    • Active matrix display device
    • 主动矩阵显示装置
    • US07245296B2
    • 2007-07-17
    • US10320269
    • 2002-12-16
    • Martin J. EdwardsJohn R. A. Ayres
    • Martin J. EdwardsJohn R. A. Ayres
    • G09G2/00
    • G09G3/3648G09G3/3655G09G2300/0876
    • A display device with capacitive display pixels, in which a drive scheme is used for capacitive coupling of voltages to enable reduced column voltage swings to be obtained. Each pixel has two storage capacitors. The use of two storage capacitors provides some freedom in the choice of the magnitude of the voltage swing provide on one terminal of one of the storage capacitors. The first capacitor (C1) of all pixels of the display may be grounded, and only the second capacitor (C2) is subjected to changes in voltage to be capacitively coupled to the display cell. This provides a flexible capacitor line drive type scheme.
    • 一种具有电容显示像素的显示装置,其中驱动方案用于电压的电容耦合,以实现降低的列电压摆幅。 每个像素都有两个存储电容。 使用两个存储电容器在选择在一个存储电容器的一个端子上提供的电压摆幅幅度方面提供了一些自由度。 显示器的所有像素的第一电容器(C 1)可以接地,并且仅第二电容器(C2)经受与电容耦合到显示单元的电压变化。 这提供了一种灵活的电容器线驱动类型方案。