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1. 发明授权

US09343463B2 Method of high density memory fabrication 有权
标题翻译：高密度存储器制造方法
公开(公告)号：US09343463B2
公开(公告)日：2016-05-17
申请号：US12586900
申请日：2009-09-29
申请人： Tom Zhong , Adam Zhong , Wai-Ming J. Kan , Chyu-Jiuh Torng
发明人： Tom Zhong , Adam Zhong , Wai-Ming J. Kan , Chyu-Jiuh Torng
IPC分类号： H01L29/66 , H01L21/4763 , H01L27/105 , H01L21/768 , H01L23/522 , H01L27/22
CPC分类号： H01L27/105 , H01L21/76819 , H01L21/7684 , H01L23/522 , H01L27/228 , H01L2924/0002 , H01L2924/00
摘要： The structure and method of formation of an integrated CMOS level and active device level that can be a memory device level. The integration includes the formation of a “super-flat” interface between the two levels formed by the patterning of a full complement of active and dummy interconnecting vias using two separate patterning and etch processes. The active vias connect memory devices in the upper device level to connecting pads in the lower CMOS level. The dummy vias may extend up to an etch stop layer formed over the CMOS layer or may be stopped at an intermediate etch stop layer formed within the device level. The dummy vias thereby contact memory devices but do not connect them to active elements in the CMOS level.
摘要翻译：集成CMOS级别和有源器件级别的结构和方法可以是存储器件级。整合包括通过使用两个单独的图案化和蚀刻工艺对完整的有源和虚拟互连通孔进行图案化形成的两层之间形成“超平面”界面。有源通孔将上部器件电平的存储器件连接到较低CMOS电平的连接焊盘。虚拟通孔可以延伸到在CMOS层上形成的蚀刻停止层，或者可以在形成在器件级内的中间蚀刻停止层处停止。因此，虚拟通孔接触存储器件，但不将它们连接到CMOS电平中的有源元件。

2. 发明授权

US08372661B2 High performance MTJ element for conventional MRAM and for STT-RAM and a method for making the same 有权
标题翻译：用于常规MRAM和STT-RAM的高性能MTJ元件及其制造方法
公开(公告)号：US08372661B2
公开(公告)日：2013-02-12
申请号：US11981127
申请日：2007-10-31
申请人： Cheng T. Horng , Ru-Ying Tong , Chyu-Jiuh Torng , Witold Kula
发明人： Cheng T. Horng , Ru-Ying Tong , Chyu-Jiuh Torng , Witold Kula
IPC分类号： H01L21/00
CPC分类号： H01L43/10 , B82Y10/00 , H01L27/228 , H01L43/08 , H01L43/12
摘要： A STT-RAM MTJ that minimizes spin-transfer magnetization switching current (Jc) is disclosed. The MTJ has a MgO tunnel barrier layer formed with a natural oxidation process to achieve a low RA (10 ohm-um2) and a Fe or Fe/CoFeB/Fe free layer which provides a lower intrinsic damping constant than a CoFeB free layer. A Fe, FeB, or Fe/CoFeB/Fe free layer when formed with a MgO tunnel barrier (radical oxidation process) and a CoFeB AP1 pinned layer in a MRAM MTJ stack annealed at 360° C. provides a high dR/R (TMR)>100% and a substantial improvement in read margin with a TMR/Rp_cov=20. High speed measurement of 100 nm×200 nm oval STT-RAM MTJs has shown a Jc0 for switching a Fe free layer is one half that for switching an amorphous CO40Fe40B20 free layer. A Fe/CoFeB/Fe free layer configuration allows the Hc value to be increased for STT-RAM applications.
摘要翻译：公开了使自旋转移磁化开关电流（Jc）最小化的STT-RAM MTJ。 MTJ具有形成有自然氧化工艺的MgO隧道阻挡层，以实现低的RA（10欧姆 - um2）和不含CoFeB自由层的较低的固有阻尼常数的Fe或Fe / CoFeB / Fe自由层。当在360℃退火的MRAM MTJ堆叠中形成具有MgO隧道势垒（自由基氧化法）和CoFeB AP1钉扎层的Fe，FeB或Fe / CoFeB / Fe自由层时，提供高dR / R（TMR ）> 100％，TMR / Rp_cov = 20时读取余量大幅度提高。 100 nm×200 nm椭圆STT-RAM MTJ的高速测量显示，用于切换无Fe层的Jc0是用于切换无定形CO40Fe40B20自由层的一半。 Fe / CoFeB / Fe自由层配置允许为STT-RAM应用增加Hc值。

3. 发明授权

US08169816B2 Fabrication methods of partial cladded write line to enhance write margin for magnetic random access memory 有权
标题翻译：部分包层写入线的设计和制造方法，以增强磁随机存取存储器的写入裕度
公开(公告)号：US08169816B2
公开(公告)日：2012-05-01
申请号：US12584952
申请日：2009-09-15
申请人： Tai Min , Wai-Ming J. Kan , David Heim , Chyu Jiuh Torng
发明人： Tai Min , Wai-Ming J. Kan , David Heim , Chyu Jiuh Torng
IPC分类号： G11C11/00
CPC分类号： H01L27/228 , B82Y25/00 , G11C11/16 , H01F10/3254 , H01F10/3263 , H01L43/08 , H01L43/12
摘要： A cladding structure for a conductive line used to switch a free layer in a MTJ is disclosed and includes two cladding sidewalls on two sides of the conductive line, a top cladding portion on a side of the conductive line facing away from the MTJ, and a highly conductive, non-magnetic spacing control layer formed between the MTJ and conductive line. The spacing control layer has a thickness of 0.02 to 0.12 microns to maintain the distance separating free layer and conductive line between 0.03 and 0.15 microns. The spacing control layer is aligned parallel to the conductive line and contacts a plurality of MTJ elements in a row of MRAM cells. Half-select error problems are avoided while maintaining high write efficiency. A spacing control layer may be formed between a word line and a bottom electrode in a top pinned layer or dual pinned layer configuration.
摘要翻译：公开了用于切换MTJ中的自由层的用于导电线的包层结构，并且在导电线的两侧包括两个包层侧壁，在远离MTJ的导电线侧的顶部包层部分，以及在MTJ和导线之间形成的高导电性，非磁性间隔控制层。间隔控制层的厚度为0.02至0.12微米，以保持分离自由层和导电线之间的距离在0.03和0.15微米之间。间隔控制层平行于导线对准，并接触一排MRAM单元中的多个MTJ元件。避免半选择错误问题，同时保持较高的写入效率。间隔控制层可以形成在顶部钉扎层或双重钉扎层构造中的字线和底部电极之间。

4. 发明申请

US20120085728A1 Novel process for MEMS scanning mirror with mass remove from mirror backside 有权
标题翻译： MEMS扫描镜的新工艺，从镜面背面去除质量
公开(公告)号：US20120085728A1
公开(公告)日：2012-04-12
申请号：US12924873
申请日：2010-10-07
申请人： Jun Chen , Guomin Mao , Tom Zhong , Wei Cao , Yee-Chung Fu , Chyu-Jiuh Torng
发明人： Jun Chen , Guomin Mao , Tom Zhong , Wei Cao , Yee-Chung Fu , Chyu-Jiuh Torng
IPC分类号： B81C1/00
CPC分类号： B81B3/0045 , B81B2201/042 , G02B26/0841
摘要： Two methods of fabricating a MEMS scanning mirror having a tunable resonance frequency are described. The resonance frequency of the mirror is set to a particular value by mass removal from the backside of the mirror during fabrication.
摘要翻译：描述制造具有可调共振频率的MEMS扫描反射镜的两种方法。反射镜的共振频率通过在制造期间从反射镜的背面质量去除而被设定为特定的值。

5. 发明授权

US08133439B2 GMR biosensor with enhanced sensitivity 有权
标题翻译： GMR生物传感器具有增强的灵敏度
公开(公告)号：US08133439B2
公开(公告)日：2012-03-13
申请号：US11497162
申请日：2006-08-01
申请人： Po-Kang Wang , Xizeng Shi , Chyu-Jiuh Torng
发明人： Po-Kang Wang , Xizeng Shi , Chyu-Jiuh Torng
IPC分类号： G01N15/06
CPC分类号： G01R33/0052 , B82Y25/00 , G01N15/0656 , G01N27/745 , G01N2015/0065 , G01R33/05 , G01R33/093 , G01R33/098 , Y10T29/49124 , Y10T29/49986
摘要： A sensor array comprising a series connection of parallel GMR sensor stripes provides a sensitive mechanism for detecting the presence of magnetized particles bonded to biological molecules that are affixed to a substrate. The adverse effect of hysteresis on the maintenance of a stable bias point for the magnetic moment of the sensor free layer is eliminated by a combination of biasing the sensor along its longitudinal direction rather than the usual transverse direction and by using the overcoat stress and magnetostriction of magnetic layers to create a compensatory transverse magnetic anisotropy. By making the spaces between the stripes narrower than the dimension of the magnetized particle and by making the width of the stripes equal to the dimension of the particle, the sensitivity of the sensor array is enhanced.
摘要翻译：包括并联GMR传感器条的串联连接的传感器阵列提供了用于检测粘附到固定到基底上的生物分子的磁化颗粒的存在的敏感机制。通过将传感器沿着其纵向方向而不是通常的横向偏置并通过使用传感器的外涂层应力和磁致伸缩的组合来消除滞后对维持传感器自由层的磁矩的稳定偏置点的不利影响磁性层产生补偿横向磁各向异性。通过使条纹之间的空间比磁化粒子的尺寸窄，并且通过使条纹的宽度等于粒子的尺寸，传感器阵列的灵敏度增强。

6. 发明授权

US08105948B2 Use of CMP to contact a MTJ structure without forming a via 有权
标题翻译：使用CMP接触MTJ结构而不形成通孔
公开(公告)号：US08105948B2
公开(公告)日：2012-01-31
申请号：US12070286
申请日：2008-02-14
申请人： Adam Zhong , Wai-Ming Kan , Tom Zhong , Chyu-Jiuh Torng
发明人： Adam Zhong , Wai-Ming Kan , Tom Zhong , Chyu-Jiuh Torng
IPC分类号： H01L21/302
CPC分类号： H01L21/31053 , H01L43/12
摘要： A process is described for making contact to the buried capping layers of GMR and MTJ devices without the need to form and fill via holes. CMP is applied to the structure in three steps: (1) conventional CMP (2) a Highly Selective Slurry (HSS) is substituted for the conventional slurry to just expose the capping layer, and (3) the HSS is diluted and used to clean the surface as well as to cause a slight protrusion of the capping layers above the surrounding dielectric surface, making it easier the contact them without damaging the devices below.
摘要翻译：描述了与GMR和MTJ装置的掩埋覆盖层接触而不需要形成和填充通孔的方法。 CMP结构分为三个步骤：（1）常规CMP（2）采用高选择性浆料（HSS）代替传统的浆料，仅暴露顶盖层，（3）将HSS稀释并用于清洗表面以及使覆盖层在周围的电介质表面上稍微突出，使得更容易接触它们而不损坏下面的器件。

7. 发明授权

US07936027B2 Method of MRAM fabrication with zero electrical shorting 有权
标题翻译：零电气短路的MRAM制造方法
公开(公告)号：US07936027B2
公开(公告)日：2011-05-03
申请号：US12006889
申请日：2008-01-07
申请人： Rongfu Xiao , Chyu-Jiuh Torng , Tom Zhong , Witold Kula
发明人： Rongfu Xiao , Chyu-Jiuh Torng , Tom Zhong , Witold Kula
IPC分类号： G11C11/02
CPC分类号： H01L43/12 , H01L43/08
摘要： An MTJ cell without footings and free from electrical short-circuits across a tunneling barrier layer is formed by using a Ta hard mask layer and a combination of etches. A first etch patterns the Ta hard mask, while a second etch uses O2 applied in a single high power process at two successive different power levels. A first power level of between approximately 200 W and 500 W removes BARC, photoresist and Ta residue from the first etch, the second power level, between approximately 400 W and 600 W continues an etch of the stack layers and forms a protective oxide around the etched sides of the stack. Finally, an etch using a carbon, hydrogen and oxygen gas completes the etch while the oxide layer protects the cell from short-circuits across the lateral edges of the barrier layer.
摘要翻译：通过使用Ta硬掩模层和蚀刻的组合，形成没有底脚并且穿过隧道势垒层的电短路的MTJ电池。第一蚀刻图案Ta硬掩模，而第二蚀刻使用在两个连续的不同功率水平下在单个高功率过程中施加的O2。在大约200W至500W之间的第一功率电平从第一蚀刻去除BARC，光致抗蚀剂和Ta残留物，第二功率电平在大约400W至600W之间，继续蚀刻叠层，并在其周围形成保护氧化物蚀刻边的堆叠。最后，使用碳，氢和氧气的蚀刻完成了蚀刻，而氧化物层保护电池免受横跨阻挡层的侧边缘的短路。

8. 发明授权

US07918014B2 Method of manufacturing a CPP structure with enhanced GMR ratio 有权
标题翻译：制造具有增强的GMR比的CPP结构的方法
公开(公告)号：US07918014B2
公开(公告)日：2011-04-05
申请号：US11180808
申请日：2005-07-13
申请人： Kunliang Zhang , Min Li , Yu-Hsia Chen , Chyu-Jiuh Torng
发明人： Kunliang Zhang , Min Li , Yu-Hsia Chen , Chyu-Jiuh Torng
IPC分类号： G11B5/187 , C23C14/34
CPC分类号： H01L43/08 , B82Y40/00 , G11B5/3906 , H01F10/3254 , H01F10/3259 , H01F10/3272 , H01F10/3281 , H01F10/3295 , H01F41/18 , H01F41/303 , H01L43/10 , Y10T29/49032 , Y10T29/49039 , Y10T29/49043 , Y10T29/49044 , Y10T428/1114 , Y10T428/1129 , Y10T428/115
摘要： A CPP-GMR spin valve having a CoFe/NiFe composite free layer is disclosed in which Fe content of the CoFe layer ranges from 20 to 70 atomic % and Ni content in the NiFe layer varies from 85 to 100 atomic % to maintain low Hc and λS values. A small positive magnetostriction value in a Co75Fe25 layer is used to offset a negative magnetostriction value in a Ni90Fe10 layer. The CoFe layer is deposited on a sensor stack in which a seed layer, AFM layer, pinned layer, and non-magnetic spacer layer are sequentially formed on a substrate. After a NiFe layer and capping layer are sequentially deposited on the CoFe layer, the sensor stack is patterned to give a sensor element with top and bottom surfaces and a sidewall connecting the top and bottom surfaces. Thereafter, a dielectric layer is formed adjacent to the sidewalls.
摘要翻译：公开了一种具有CoFe / NiFe复合自由层的CPP-GMR自旋阀，其中CoFe层的Fe含量为20〜70原子％，NiFe层的Ni含量为85〜100原子％，保持低Hc， λS值。使用Co75Fe25层中的小的正磁致伸缩值来抵消Ni90Fe10层中的负磁致伸缩值。 CoFe层沉积在传感器堆叠上，其中种子层，AFM层，钉扎层和非磁性间隔层依次形成在基底上。在NiFe层和覆盖层顺序地沉积在CoFe层上之后，传感器堆叠被图案化以给出具有顶表面和底表面的传感器元件以及连接顶表面和底表面的侧壁。此后，与侧壁相邻地形成电介质层。

9. 发明申请

US20100258889A1 High performance MTJ elements for STT-RAM and method for making the same 有权
标题翻译：用于STT-RAM的高性能MTJ元件和制作相同的方法
公开(公告)号：US20100258889A1
公开(公告)日：2010-10-14
申请号：US12803191
申请日：2010-06-21
申请人： Cheng T. Horng , Ru-Ying Tong , Chyu-Jiuh Torng , Witold Kula
发明人： Cheng T. Horng , Ru-Ying Tong , Chyu-Jiuh Torng , Witold Kula
IPC分类号： H01L29/82
CPC分类号： H01L43/08 , B82Y25/00 , B82Y40/00 , G11C11/161 , H01F10/3272 , H01F10/329 , H01F10/3295 , H01F41/307 , H01L43/10 , H01L43/12
摘要： An STT-MTJ MRAM cell utilizes transfer of spin angular momentum as a mechanism for changing the magnetic moment direction of a free layer. The cell includes an IrMn pinning layer, a SyAP pinned layer, a naturally oxidized, crystalline MgO tunneling barrier layer that is formed on an Ar-ion plasma smoothed surface of the pinned layer and, in one embodiment, a composite tri-layer free layer that comprises an amorphous layer of Co60Fe20B20 of approximately 20 angstroms thickness formed between two crystalline layers of Fe of 3 and 6 angstroms thickness respectively. The free layer is characterized by a low Gilbert damping factor and by very strong polarizing action on conduction electrons. The resulting cell has a low critical current, a high dR/R and a plurality of such cells will exhibit a low variation of both resistance and pinned layer magnetization angular dispersion.
摘要翻译： STT-MTJ MRAM单元利用自旋角动量的传递作为改变自由层的磁矩方向的机构。电池包括形成在被钉扎层的Ar离子等离子体平滑表面上的IrMn钉扎层，SyAP钉扎层，自然氧化的结晶的MgO隧道势垒层，在一个实施例中，复合三层自由层其包括分别在3和6埃厚度的Fe的两个结晶层之间形成的约20埃厚度的Co60Fe20B20的非晶层。自由层的特征在于低吉尔伯特阻尼因子和对传导电子的非常强的偏振作用。所得到的电池具有低临界电流，高dR / R，并且多个这样的电池将呈现电阻和钉扎层磁化角分散的低变化。

10. 发明申请

US20100172053A1 Novel hard bias design for extra high density recording 有权
标题翻译：用于超高密度记录的新型硬偏置设计
公开(公告)号：US20100172053A1
公开(公告)日：2010-07-08
申请号：US12660908
申请日：2010-03-05
申请人： Kunliang Zhang , Yun-Fei Li , Chyu-Jiuh Torng , Chen-Jung Chien
发明人： Kunliang Zhang , Yun-Fei Li , Chyu-Jiuh Torng , Chen-Jung Chien
IPC分类号： G11B5/187 , B05D1/36
CPC分类号： B82Y25/00 , B82Y10/00 , G11B5/3912 , G11B5/3932 , G11B2005/3996
摘要： A hard bias structure for biasing a free layer in a MR element within a read head is comprised of a composite hard bias layer having a Co78.6Cr5.2Pt16.2/Co65Cr15Pt20 configuration. The upper Co65Cr15Pt20 layer has a larger Hc value and a thickness about 2 to 10 times greater than that of the Co78.6Cr5.2Pt16.2 layer. The hard bias structure may also include a BCC underlayer such as FeCoMo which enhances the magnetic moment of the hard bias structure. Optionally, the thickness of the Co78.6Cr5.2Pt16.2 layer is zero and the Co65Cr15Pt20 layer is formed on the BCC underlayer. The present invention also encompasses a laminated hard bias structure. The Mrt value for the hard bias structure may be optimized by adjusting the thicknesses of the BCC underlayer and CoCrPt layers. As a result, a larger process window is realized and lower asymmetry output during a read operation is achieved.
摘要翻译：用于偏置读取头内的MR元件中的自由层的硬偏置结构由具有Co78.6Cr5.2Pt16.2 / Co65Cr15Pt20配置的复合硬偏置层组成。 Co65Cr15Pt20上层具有较大的Hc值，厚度约为Co78.6Cr5.2Pt16.2层的2〜10倍。硬偏压结构还可以包括诸如FeCoMo的BCC底层，其增强了硬偏压结构的磁矩。可选地，Co78.6Cr5.2Pt16.2层的厚度为零，Co65Cr15Pt20层形成在BCC底层上。本发明还包括层压硬偏置结构。可以通过调整BCC底层和CoCrPt层的厚度来优化硬偏置结构的Mrt值。结果，实现了更大的处理窗口，并且在读取操作期间实现了较低的不对称输出。

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