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1. 发明授权

KR101132216B1 Digital analog converter with routing dummy capacitor 有权
标题翻译：具有路由电容器的数字模拟转换器
公开(公告)号：KR101132216B1
公开(公告)日：2012-04-02
申请号：KR20100121962
申请日：2010-12-02
申请人： KUMOH NAT INST TECH ACAD COOP
发明人： UH JI HUN , JANG YOUNG CHAN
IPC分类号： H03M1/12
CPC分类号： H03M1/0617 , H03M1/802 , H03M3/02 , H03M2201/3178 , H03M2201/6142
摘要： PURPOSE: A digital to analog converter with a routing dummy capacitor is provided to improve the resolution of a digital to analog converter by reducing analog noise generated from a switch of an output terminal in the digital-to-analog converter. CONSTITUTION: A first positive polarity DAC(Digital To Analog Converter) part(210) comprises a plurality of first positive polarity switches(211a, 211e) and a plurality of unit capacitors(212a, 212e). A second positive polarity DAC part(220) comprises a plurality of second positive polarity switches(221a, 212e) and a plurality of unit capacitors(222a, 222e). A first negative polarity DAC part(230) comprises a plurality of first negative polarity switches(231a,231e) and a plurality of unit capacitors(232a,232e). The second negative polarity DAC part(240) comprises a plurality of second negative polarity switches(241a,241e) and a plurality of unit capacitors(242a,242e). A positive polarity capacitor(250) is connected between the first positive polarity DAC part and the second positive polarity DAC part. A negative polarity capacitor(260) is connected between the first negative polarity DAC part and the second negative polarity DAC part.
摘要翻译：目的：提供具有路由虚拟电容器的数模转换器，以通过减少由数模转换器中的输出端子的开关产生的模拟噪声来提高数模转换器的分辨率。构成：第一正极性DAC（数模转换器）部分（210）包括多个第一正极性开关（211a，211e）和多个单位电容器（212a，212e）。第二正极性DAC部分（220）包括多个第二正极性开关（221a，212e）和多个单位电容器（222a，222e）。第一负极性DAC部分（230）包括多个第一负极性开关（231a，231e）和多个单位电容器（232a，232e）。第二负极性DAC部分（240）包括多个第二负极性开关（241a，241e）和多个单位电容器（242a，242e）。正极性电容器（250）连接在第一正极性DAC部分和第二正极性DAC部分之间。负极性电容器（260）连接在第一负极性DAC部分和第二负极性DAC部分之间。

2. 发明公开

KR1020090109455A 잔류전압 증폭기 및 이를 이용한 아날로그/디지털 변환기 失效
标题翻译：使用放大器和模拟数字转换器
公开(公告)号：KR1020090109455A
公开(公告)日：2009-10-20
申请号：KR1020080056410
申请日：2008-06-16
申请人： 한국과학기술원
发明人： 류승탁 , 이창교 , 조상현
IPC分类号： H03M1/12
CPC分类号： H03M1/14 , H03M1/002 , H03M1/06 , H03M2201/2291 , H03M2201/6142 , H03M2201/62 , H03M2201/81
摘要： PURPOSE: A residue amplifier and an analog digital converter using the same are provided to improve dynamic range of input signal under the lowered source voltage condition. CONSTITUTION: A residual voltage amplifier(210) comprises an operational amplifier, and a capacitor circuit. The operational amplifier is connected to a first internal voltage. The capacitor circuit is connected to another input terminal of the operational amplifier. The capacitor circuit includes a first capacitor(C1), a second capacitor(C2), and a third capacitor. The first capacitor is connected to another input terminal of the operational amplifier. The second capacitor is connected to the common terminal of the first capacitor. The third capacitor is connected to the other input terminal of the operational amplifier. The third capacitor is connected to the output terminal of the operational amplifier.
摘要翻译：目的：提供残留放大器和使用其的模拟数字转换器，以改善在较低的源电压条件下的输入信号的动态范围。构成：残余电压放大器（210）包括运算放大器和电容器电路。运算放大器连接到第一内部电压。电容电路连接到运算放大器的另一输入端。电容器电路包括第一电容器（C1），第二电容器（C2）和第三电容器。第一电容器连接到运算放大器的另一个输入端。第二电容器连接到第一电容器的公共端。第三个电容连接到运算放大器的另一个输入端。第三电容器连接到运算放大器的输出端。

3. 发明公开

KR1020090019277A ＡＤＣ 부가장치 无效
标题翻译：模拟和数字转换器补充装置
公开(公告)号：KR1020090019277A
公开(公告)日：2009-02-25
申请号：KR1020070083579
申请日：2007-08-20
申请人： 삼성전자주식회사
发明人： 이현수
IPC分类号： H03M1/06
CPC分类号： H03M1/129 , H03M1/1275 , H03M1/18 , H03M2201/6142 , H03M2201/8128
摘要： An ADC(Analog and Digital Converter) supplement apparatus is provided to improve the ADC resolution and precisely analyze the signal by setting up the part for dropping the electric pressure between the voltage input portion and the voltage divider. An ADC supplement apparatus comprises a voltage input portion(100), a voltage divider(200), an ADC input unit(300) and a part of dropping electric pressure(400). The ADC supplement apparatus is connected to an ADC(10). The voltage input portion provides the input voltage to ADC. The voltage provided through the voltage input portion controls the voltage divider according to the imputable range of ADC. The ADC input unit supplies the voltage supplied through the voltage divider to ADC. The part of dropping the electric pressure is positioned between the voltage input portion and the voltage divider.
摘要翻译：提供了一个ADC（模拟和数字转换器）补充装置，以提高ADC分辨率，并通过设置部分来精确地分析信号，以降低电压输入部分和分压器之间的电压。 ADC补充装置包括电压输入部分（100），分压器（200），ADC输入单元（300）和一部分降压电压（400）。 ADC补充装置连接到ADC（10）。电压输入部分向ADC提供输入电压。通过电压输入部分提供的电压根据ADC的可计算范围控制分压器。 ADC输入单元通过分压器提供的电压向ADC提供。降低电压的部分位于电压输入部分和分压器之间。

4. 发明公开

KR1020100025645A 커패시턴스 오차 보상 회로 및 스위치드 커패시터 적분기 有权
标题翻译：电容误差补偿电路和开关电容整流器
公开(公告)号：KR1020100025645A
公开(公告)日：2010-03-10
申请号：KR1020080084269
申请日：2008-08-28
申请人： 전자부품연구원
发明人： 박원기 , 민경원 , 이성철
IPC分类号： H03M1/06
CPC分类号： H03M1/0607 , H03M1/1023 , H03M2201/6142 , H03M2201/8164
摘要： PURPOSE: A capacitance error compensation circuit and a switched capacitor integrator are provided to prevent the performance deterioration of the circuit for matching a capacitor by reducing an amount of capacitance variation. CONSTITUTION: A capacitance error compensation circuit includes a first capacitor(C1), a second capacitor(C2), and a third capacitor(C3). The second capacitor is selectively connected in series to the first capacitor and includes a smaller capacitance than that of the first capacitor. The third capacitor is selectively connected in series to the first capacitor and has a larger capacitance than that of the first capacitor. A first switch(sw1) selectively connects the first capacitor with the second capacitor. A second switch(sw2) selectively connects the first capacitor with the third capacitor.
摘要翻译：目的：提供电容误差补偿电路和开关电容积分器，以通过减少电容量变化量来防止用于匹配电容器的电路的性能劣化。构成：电容误差补偿电路包括第一电容器（C1），第二电容器（C2）和第三电容器（C3）。第二电容器与第一电容器串联选择性地连接，并且包括比第一电容器小的电容。第三电容器与第一电容器串联选择性地连接，并且具有比第一电容器更大的电容。第一开关（sw1）选择性地将第一电容器与第二电容器连接。第二开关（sw2）选择性地将第一电容器与第三电容器连接。

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