会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明公开
    • AES 및 ARIA의 암호화/복호화 기능을 지원하는 연산방법 및 장치
    • 用于支持AES和ARIA加密/分解功能的方法和装置
    • KR1020080043205A
    • 2008-05-16
    • KR1020070046526
    • 2007-05-14
    • 한국전자통신연구원
    • 구본석류권호양상운장태주
    • G06F7/00
    • An operation method for supporting AES(Advanced Encryption Standard) and ARIA(Academy, Research Institute, and Agency) encryption/decryption functions, and a device thereof are provided to apply to a smart card, an electronic passport, and a server-level encryption device requiring both of the AES and ARIA algorithms by minimizing a hardware area while supporting both of the AES and ARIA algorithms. A key scheduler(350) generates a round key by using an input key. A round function operator(310) generates encrypted/decrypted data by using input data and the round key. The round function operator includes integrated substitution and diffusion layers(320,330) performing both of AES and ARIA algorithms. The integrated substitution layer includes a first block performing a role of an AES S(Substitution)-box and a second block performing the role of AES/ARIA S-box. The integrated diffusion layer performs the role of an AES Mixcolumns function, an AES InvMixcolumns function or an ARIA diffusion function selectively.
    • 提供了一种用于支持AES(高级加密标准)和ARIA(Academy,Research Institute,Agency)加密/解密功能的操作方法及其装置,以应用于智能卡,电子护照和服务器级加密 通过最小化硬件区域同时支持AES和ARIA算法,同时需要AES和ARIA算法。 密钥调度器(350)通过使用输入密钥来生成轮回密钥。 循环函数运算符(310)通过使用输入数据和循环密钥来生成加密/解密数据。 循环函数运算符包括执行AES和ARIA算法两者的集成替换和扩散层(320,330)。 集成替代层包括执行AES S(替代) - 盒的第一块和执行AES / ARIA S盒的作用的第二块。 集成扩散层选择性地起到AES Mixcolumns功能,AES InvMix柱功能或ARIA扩散功能的作用。
    • 4. 发明授权
    • 모듈러 곱셈 장치 및 방법
    • 模块化乘法装置和方法
    • KR101830230B1
    • 2018-02-21
    • KR1020160177379
    • 2016-12-23
    • 한국전자통신연구원
    • 이윤구이동건주민규이연철양상운
    • G06F7/52H04L9/30
    • G06F7/523G06F7/50G06F7/722G06F7/728G06F7/52H04L9/302
    • 모듈러곱셈장치및 방법이개시된다. 본발명에따른모듈러곱셈장치는, 전체부분곱을스캐닝하는시리얼멀티플라이어(Serial Multiplier), 입력값들의합의제곱및 차의제곱의차를연산하는시리얼스퀘어기반멀티플라이어(Serial Squarer based - Multiplier) 중적어도어느하나의구조를기반으로, 제1 연산을수행하는제1 연산부, 상기시리얼멀티플라이어및 상기시리얼스퀘어기반멀티플라이어중 적어도어느하나의구조를기반으로, 제2 연산을수행하는제2 연산부, 그리고상기제1 연산의결과및 상기제2 연산의결과를합산한결과를출력하고, 중간값스트림을상기중간값스트림과제타파라미터와의곱을연산하는상기제1 연산부의입력으로피드백하며, 고차항을몽고메리모듈러곱셈결과로출력하는합산부를포함하며, 상기제1 연산부및 상기제2 연산부는, 시스톨릭구조이며, 각각상기제1 연산결과및 상기제2 연산결과를디지트시리얼(digit serial) 형태로출력하고, 상기제1 연산의결과및 상기제2 연산의결과를최하위숫자(Least Significant Digits)부터상위숫자의순서로출력한다.
    • 公开了一种模块化乘法装置和方法。 根据本发明,用于乘法整个局部扫描(串行乘法器)一个串行乘法器,串行计算共识平方和输入基于正方形的乘法器,甚至(串行平方基于乘数)的差的平方的差模乘装置普遍 它基于任何结构的,第一操作单元和所述串行乘法器的第二操作单元和至少基于任何串行基于正方形的乘法器的结构,以及用于执行所述第一操作执行第二操作,和 并反馈到所述第一单元的输入为所述第一计算的结果,并且输出求和的第二操作的结果的结果,并且其中所述中值流中位流和zeta参数与产品的操作,高次项蒙哥马利 并且包括加法器,用于输出一个模乘结果,第一操作单元和第二操作单元,系统和收缩结构中,每个第一操作结果和所述第二操作结果 输出形式JIT串行(位序列),并且将结果的结果输出与所述第一操作在较高编号的顺序从最小显著数字的第二操作(最低有效位)。
    • 6. 发明公开
    • 다중 암호엔진을 사용하는 고성능 암호화 장치
    • 使用多种油墨的高性能拼接装置及其操作方法
    • KR1020070061329A
    • 2007-06-13
    • KR1020060099263
    • 2006-10-12
    • 한국전자통신연구원
    • 양상운류권호구본석이동욱장태주
    • H04L9/32H04L9/30H04L9/08
    • H04L9/08H04L2463/041
    • A high performance encryption apparatus using a multiple encryption engine is provided to supply a security service of a high speed by constituting an encryption algorithm such as a block encryption, a hash, a message authentication code, a public key calculation, and a random number generation with a multiple encryption engine. A PCI-Express host matching unit(100) has a PCI- Express terminal unit and a TLP packet analysis and generation device to perform memory request, completion, and write request processes by analyzing an RX TLP(Transport Layer Port) packet through a host bus from a host. A multiple encryption engine management unit(110) analyzes a command block included in the TLP packet, and determines a processing sequence based on a scheduling algorithm which is set to a work scheduler and a state list for an available resource of an encryption core. A multiple encryption engine unit(120) receives and analyzes the command block at the encryption core, and operates the encryption core by transmitting a session ID and a command to a session memory matching unit. A system control unit(130) processes a system initial function, a public key received from the multiple encryption engine management unit(110), and a command block with reference to the key management. A session memory unit(140) is coupled to the multiple encryption engine unit and stores session data which is requested in encryption algorithm processing operation.
    • 提供一种使用多重加密引擎的高性能加密装置,通过构成诸如块加密,哈希,消息认证码,公钥计算和随机数生成等加密算法来提供高速的安全服务 使用多重加密引擎。 PCI-Express主机匹配单元(100)具有PCI-Express终端单元和TLP分组分析和生成设备,以通过主机分析RX TLP(传输层端口)分组来执行存储器请求,完成和写入请求过程 公共汽车从主机。 多重加密引擎管理单元(110)分析包含在TLP分组中的命令块,并且基于设置为工作调度器的调度算法和加密核心的可用资源的状态列表来确定处理序列。 多重加密引擎单元(120)接收并分析加密核心处的命令块,并通过向会话存储器匹配单元发送会话ID和命令来操作加密核心。 系统控制单元(130)处理系统初始功能,从多个加密引擎管理单元(110)接收的公钥,以及参考密钥管理的命令块。 会话存储单元(140)耦合到多个加密引擎单元,并存储在加密算法处理操作中请求的会话数据。
    • 7. 发明公开
    • 암 코어 기반의 프로세서를 위한 외부 공격 방어 장치 및 이를 이용한 방법
    • 用于防止基于ARM核心的处理器的外部攻击的装置及其使用方法
    • KR1020130093710A
    • 2013-08-23
    • KR1020110141332
    • 2011-12-23
    • 한국전자통신연구원
    • 손준영이윤구양상운이봉수
    • G06F21/10G06F11/36
    • G06F21/85G01R31/31719G06F11/3656G06F21/575G06F21/75G06F21/79G06F2221/2105G06F2221/2123
    • PURPOSE: An apparatus for protecting against external attack for a processor based on an ARM core and a method using the same are provided to assure security simply as using a joint task action group (JTAG) in an arm core series system which provides debugging function using JTAG. CONSTITUTION: A JTAG interface (110) is connected to an ARM core-based processor (140) for JTAG communication. A control signal generator (120) generates an external attack prevention control signal. An interception unit (130) intercepts the JTAG interface on the basis of the external attack prevention control signal. The external attack prevention control signal is activated, according to the set value of a register (180). When the external attack prevention control signal is activated, multiplexers (104,106) of the interception unit select a ground signal which is a dummy signal.
    • 目的:提供一种用于防止基于ARM内核的处理器的外部攻击的装置和使用其的方法,以确保安全性简单地用于在臂式核心系列系统中使用联合任务动作组(JTAG),其提供使用 JTAG。 构成:JTAG接口(110)连接到用于JTAG通信的基于ARM核的处理器(140)。 控制信号发生器(120)产生外部防攻击控制信号。 截取单元(130)根据外部防攻击控制信号拦截JTAG接口。 外部防攻击控制信号根据寄存器的设定值被激活(180)。 当外部防攻击控制信号被激活时,拦截单元的多路复用器(104,106)选择作为虚拟信号的接地信号。
    • 8. 发明公开
    • 컴퓨터 시스템에서의 해킹 방지 장치 및 방법
    • 用于保护计算机系统中的黑客的方法和装置
    • KR1020100073673A
    • 2010-07-01
    • KR1020080132401
    • 2008-12-23
    • 한국전자통신연구원
    • 이윤구양상운안재환안정철
    • G06F21/00G06F21/02G06F11/00
    • G06F21/568G06F21/57
    • PURPOSE: A hacking protecting device in a computer system and a method thereof are provided to protect the critical information by producing safe quarantine area within a process through internal/external safe quarantine station. CONSTITUTION: A computer system(100) includes a host(110) and a quarantine station(120) which previously secures stability. The host includes a microprocessor(111) and a memory(113). The microprocessor processes a process according to the scheduling of an OS. An executing program resides in the memory. The computer system uses a quarantine station extension code in order to secure a safe area from the safe quarantine station.
    • 目的:提供计算机系统中的黑客保护装置及其方法,以通过内部/外部安全检疫站在过程内生成安全的检疫区域来保护关键信息。 构成:计算机系统(100)包括以前确保稳定性的主机(110)和隔离站(120)。 主机包括微处理器(111)和存储器(113)。 微处理器根据OS的调度处理进程。 执行程序驻留在内存中。 计算机系统使用隔离站扩展代码,以确保安全区域从安全检疫站安全。