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2. 发明公开

KR1020130094249A 시그너처-기반 중복 비교 시스템 및 방법 审中-实审
标题翻译：基于签名的冗余比较的系统和方法
公开(公告)号：KR1020130094249A
公开(公告)日：2013-08-23
申请号：KR1020130015884
申请日：2013-02-14
申请人： 인피니언 테크놀로지스 아게
发明人： 빌렐라안토니오 , 팔레르레이네르 , 고에셀마이클박사 , 브루어튼사이몬 , 파롤글렌애쉴리 , 헤이스티닐스튜어트 , 트레이코브보이코 , 애디슨데이비드 , 오베를랜데르클라우스 , 라베날트토마스박사
IPC分类号： G01R31/3183 , H03K5/13
CPC分类号： H03M13/3746 , G05B9/03 , G05B19/0428 , G06F11/00 , G06F11/1048 , G06F11/1479 , G06F11/1641 , H03M13/033 , H03M13/155 , H03M13/19 , H03M13/258 , H03M13/2948 , H03M13/2957 , H03M13/2966 , H03M13/299 , H03M13/37 , H03M13/3738 , H03M13/3784 , H03M13/6575
摘要： PURPOSE: A redundant system based on signatures and a method thereof are provided to implement a high error detecting rate while reducing a power consumption and areas relative to the integration of a duplicated type structure inside an integrity electron system. CONSTITUTION: A redundant system comprises a master part (102) receiving an input signal and generating a binary output signal; a first clock delay device (112) receiving the input signal and generating a delayed input signal; a first signature generator (106) connected to the master part, receiving the binary output signal, and generating a first signature; a second clock delay device (114) connected to the first signature generator, receiving the first output signature, and generating the delayed first output signature; a checker part (104) connected to the first clock delay device, receiving the delayed input signal, and generating the binary output signal; a second signature generator (108) connected to the checker part, receiving the binary output signal, and generating the delayed second output signature; and a comparator (110) connected to the second clock delay device and the second signature generator. The comparator receives the delayed first output signature and the delayed second signature, generates an error signal, and a state of the error signal is based on a comparison of the delayed first output signature and the delayed second signature. [Reference numerals] (100) Duplex system; (101) Safety related component (such as microcontroller); (102) Master part; (104) Checker part; (AA) Functional input; (BB) Functional output; (CC) Internal error notification; (DD) Error; (EE) External error notification; (FF) Safety state control
摘要翻译：目的：提供一种基于签名的冗余系统及其方法，以实现高错误检测率，同时降低功耗和相对于完整性电子系统内复制型结构集成的区域。构成：冗余系统包括接收输入信号并产生二进制输出信号的主部件（102）; 接收所述输入信号并产生延迟输入信号的第一时钟延迟装置（112）; 连接到所述主要部分的第一签名生成器（106），接收所述二进制输出信号，以及生成第一签名; 连接到所述第一签名生成器的第二时钟延迟装置（114），接收所述第一输出签名，以及生成所述延迟的第一输出签名; 连接到第一时钟延迟装置的检验器部分（104），接收延迟的输入信号，并产生二进制输出信号; 连接到检验部分的第二签名生成器（108），接收二进制输出信号，并产生延迟的第二输出签名; 以及连接到第二时钟延迟装置和第二签名生成器的比较器（110）。比较器接收延迟的第一输出签名和延迟的第二签名，产生错误信号，并且错误信号的状态基于延迟的第一输出签名和延迟的第二签名的比较。（附图标记）（100）双面系统; （101）安全相关组件（如微控制器）; （102）主要部分; （104）检查部分; （AA）功能输入; （BB）功能输出; （CC）内部错误通知; （DD）错误; （EE）外部错误通知; （FF）安全状态控制

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