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1. 发明公开

KR1020090073983A 인-메모리, 인-페이지 디렉토리 캐시 일관성 기법 有权
标题翻译： IN-MEMORY，IN-PAGE目录高速缓存方案
公开(公告)号：KR1020090073983A
公开(公告)日：2009-07-03
申请号：KR1020080136546
申请日：2008-12-30
申请人： 인텔 코포레이션
发明人： 스테이너,이안 , 카이조지,종-닝 , 티와리,사우라브 , 쳉,카이
IPC分类号： G06F13/16 , G06F9/46 , G06F9/06 , G06F12/00
CPC分类号： G06F12/0817
摘要： An in-memory and an in-page directory cache coherency technique capable of applying the increase of a processor or processor cores are provided to secure a page hit access which becomes the same as the directory cache hit. A memory access request about a cache line which is requested from one processor is received(302). A memory page storing a required cache line is brought from a memory unit. Coherency information related to the required cache line is accessed from the memory unit(304). The memory page comprises a directory line having the consistency information corresponding to the required cache line. According to the consistency information, data related to the required cache line is read(306). The data is returned by the processor(308).
摘要翻译：提供了能够应用处理器或处理器核的增加的内存中和页内目录高速缓存一致性技术以保护与目录高速缓存命中相同的页命中访问。接收关于从一个处理器请求的高速缓存线的存储器访问请求（302）。从存储器单元提取存储所需高速缓存行的存储器页。从存储器单元（304）访问与所需高速缓存行有关的一致性信息。存储器页面包括具有与所需高速缓存行对应的一致性信息的目录行。根据一致性信息，读取与所需高速缓存行有关的数据（306）。数据由处理器返回（308）。

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