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    • 2. 发明公开
    • 메모리 회로
    • 具有可配置片上延迟电路的半导体存储器件,用于在完成半导体芯片之后更改访问时序
    • KR1020040094355A
    • 2004-11-09
    • KR1020040030119
    • 2004-04-29
    • 야마하 가부시키가이샤
    • 니시오까,나오또시
    • G11C7/22
    • G11C7/1093G11C7/06G11C7/1078G11C7/22G11C7/222G11C2207/065G11C2207/2281G11C2207/229
    • PURPOSE: A semiconductor memory device having configurable on-chip delay circuit for changing access timing after completing a semiconductor chip is provided to change the access timing in the semiconductor memory device by rewriting an internal register. CONSTITUTION: A semiconductor memory device is used for performing a write operation into a predetermined memory cell by an external address according to an external write signal. The semiconductor memory device includes a first register and a first delay unit. The first register is used for performing a data setup process from the outside. The first delay unit(10) sets up a delay period by data within the first register in order to delay the write signal and output the delayed signal.
    • 目的:提供一种半导体存储器件,其具有用于在完成半导体芯片之后改变存取时间的可配置片上延迟电路,以通过重写内部寄存器来改变半导体存储器件中的访问定时。 构成:半导体存储器件用于根据外部写入信号通过外部地址对预定的存储单元进行写入操作。 半导体存储器件包括第一寄存器和第一延迟单元。 第一个寄存器用于从外部执行数据设置过程。 第一延迟单元(10)通过第一寄存器内的数据建立延迟周期,以便延迟写入信号并输出​​延迟的信号。