专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

KR101695846B1 적층형 반도체 패키지 有权
标题翻译：堆叠半导体封装
公开(公告)号：KR101695846B1
公开(公告)日：2017-01-16
申请号：KR1020100018644
申请日：2010-03-02
申请人： 삼성전자주식회사
发明人： 임충빈 , 목승곤 , 박진우 , 최대영 , 김미연
IPC分类号： H01L23/00 , H01L25/10 , H01L25/00
CPC分类号： H01L25/50 , H01L24/73 , H01L25/105 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06565 , H01L2225/1023 , H01L2225/1058 , H01L2924/01029 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/00 , H01L2924/00012
摘要： 적층형반도체패키지및 그제조방법을제공한다. 제 1 인쇄회로기판과상기제 1 인쇄회로기판에실장되는제 1 반도체소자를구비하는제 1 반도체패키지와, 상기제 1 반도체패키지에적층되고, 제 2 인쇄회로기판과상기제 2 인쇄회로기판에실장되는제 2 반도체소자를구비하는제 2 반도체패키지를제공한다. 상기제 1 반도체소자를관통하여상기제 2 반도체패키지와상기제 1 인쇄회로기판을전기적으로연결하는적어도하나의제 1 관통전극을제공한다.
摘要翻译：半导体封装包括第一半导体封装，包括第一印刷电路板和安装在第一印刷电路板上的第一半导体器件，以及堆叠在第一半导体封装上的第二半导体封装，并且包括第二印刷电路板和第二半导体装置安装在第二印刷电路板上。半导体封装包括至少一个第一通孔，其通过第一半导体器件将第二半导体封装电连接到第一印刷电路板。

2. 发明公开

KR1020130105175A 보호 층을 갖는 반도체 패키지 및 그 형성 방법 无效
标题翻译：具有保护层的半导体封装及其形成方法
公开(公告)号：KR1020130105175A
公开(公告)日：2013-09-25
申请号：KR1020120027383
申请日：2012-03-16
申请人： 삼성전자주식회사
发明人： 김현기 , 이정도 , 안양훈 , 이선혜 , 최대영
IPC分类号： H01L23/12 , H01L23/28
CPC分类号： H01L23/36 , H01L21/563 , H01L23/3128 , H01L23/3157 , H01L23/4334 , H01L23/49816 , H01L23/49827 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/00013 , H01L2924/00014 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/00012 , H01L2224/13099 , H01L2224/05099 , H01L2224/05599 , H01L2924/014 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PURPOSE: A semiconductor package having a protection layer and a method for forming the same are provided to easily release heat generated from a chip by using a flip chip package. CONSTITUTION: A first semiconductor chip (41) is formed on a first substrate. A protection layer (31) is formed on the first semiconductor chip. An encapsulating material (47) covers the first substrate. The encapsulating material is in contact with the lateral surface of the first semiconductor chip and the lateral surface of the protection layer. The protection layer is in direct contact with the first semiconductor chip.
摘要翻译：目的：提供具有保护层的半导体封装及其形成方法，以便通过使用倒装芯片封装容易地释放从芯片产生的热量。构成：第一半导体芯片（41）形成在第一基板上。在第一半导体芯片上形成保护层（31）。封装材料（47）覆盖第一基板。封装材料与第一半导体芯片的侧表面和保护层的侧表面接触。保护层与第一半导体芯片直接接触。

3. 发明公开

KR1020120089150A 패키지 온 패키지 无效
标题翻译：包装上
公开(公告)号：KR1020120089150A
公开(公告)日：2012-08-09
申请号：KR1020110010347
申请日：2011-02-01
申请人： 삼성전자주식회사
发明人： 홍지선 , 최대영 , 김미연
IPC分类号： H01L23/48 , H01L23/12
CPC分类号： H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/12044 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PURPOSE: A package on package is provided to improve lamination yield by preventing short circuit between connecting members. CONSTITUTION: A second semiconductor package(200) includes a second substrate(210), a second semiconductor chip(220) and a second connecting member. A connecting part(260) is formed by combining a first connecting member and the second connecting member. The connecting part connects a first semiconductor package and the second semiconductor package. The connecting part includes a core and a fusing conductive layer. The fusing conductive layer is contacted to the lower part of the second substrate and the upper part of a first substrate.
摘要翻译：目的：提供包装封装，以通过防止连接构件之间的短路来提高层压率。构成：第二半导体封装（200）包括第二衬底（210），第二半导体芯片（220）和第二连接构件。通过组合第一连接构件和第二连接构件形成连接部分（260）。连接部分连接第一半导体封装和第二半导体封装。连接部分包括芯和熔化导电层。熔融导电层与第二基板的下部和第一基板的上部接触。

4. 发明公开

KR1020110008831A 반도체 패키지 및 그 제조 방법 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：KR1020110008831A
公开(公告)日：2011-01-27
申请号：KR1020090066364
申请日：2009-07-21
申请人： 삼성전자주식회사
发明人： 이진호 , 임충빈 , 박진우 , 최대영 , 김미연
IPC分类号： H01L23/12 , H01L23/48
CPC分类号： H01L21/76898 , H01L23/13 , H01L23/481 , H01L23/49822 , H01L23/49838 , H01L24/05 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/18 , H01L2224/02372 , H01L2224/0401 , H01L2224/05548 , H01L2224/0557 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/32014 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2924/00014 , H01L2924/0002 , H01L2924/01033 , H01L2924/014 , H01L2924/078 , H01L2924/09701 , H01L2924/14 , H01L2924/1515 , H01L2924/15153 , H01L2924/15159 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PURPOSE: A semiconductor package and a method of fabricating the same are provided to reduce the thickness of a whole package by inserting a second sub-package into the recess part of a first sub-package. CONSTITUTION: A base substrate comprises a first side and a second side which are opposite to each other. A recess part is formed in a second side. A first semiconductor chip(20) is mounted in a first side. A first ball land(16) is arranged in a second side excluding the recess part. A second semiconductor chip comprises a penetration via which is electrically connected to a connection pad. A second ball land is electrically connected to the penetration via.
摘要翻译：目的：提供半导体封装及其制造方法，以通过将第二子封装插入第一子封装的凹部来减小整个封装的厚度。构成：基底基板包括彼此相对的第一侧和第二侧。在第二侧形成凹部。第一半导体芯片（20）安装在第一侧。第一球面（16）布置在除了凹部以外的第二侧。第二半导体芯片包括电连接到连接焊盘的穿透孔。第二个球场电连接到穿透通孔。

5. 发明授权

KR102005234B1 가이드 벽을 갖는 반도체 패키지 有权
公开(公告)号：KR102005234B1
公开(公告)日：2019-07-30
申请号：KR1020120106600
申请日：2012-09-25
申请人： 삼성전자주식회사
发明人： 이정도 , 강태우 , 김동한 , 안양훈 , 이장우 , 최대영
IPC分类号： H01L23/36

6. 发明授权

KR101719630B1 반도체 패키지 및 그를 포함하는 패키지 온 패키지 有权
标题翻译：半导体封装和封装封装包括它们
公开(公告)号：KR101719630B1
公开(公告)日：2017-04-04
申请号：KR1020100131508
申请日：2010-12-21
申请人： 삼성전자주식회사
发明人： 변학균 , 최대영 , 김미연
IPC分类号： H01L23/31 , H01L23/48 , H01L25/10 , H01L23/498 , H01L23/00
CPC分类号： H01L23/49827 , H01L23/3128 , H01L23/481 , H01L23/49816 , H01L23/49838 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/17179 , H01L2224/32145 , H01L2224/32225 , H01L2224/48095 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/1023 , H01L2225/1058 , H01L2225/1088 , H01L2924/00013 , H01L2924/00014 , H01L2924/01322 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/014 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： 반도체패키지및 그를포함하는패키지온 패키기가제공된다. 본발명의일 실시예에따른반도체패키지는, 기판, 기판상면에부착된반도체칩, 기판의상면에배치된복수의연결도전체, 기판상에형성되어복수의연결도전체및 반도체칩을매립하는몰딩재, 및몰딩재를관통하여복수의연결도전체를각각노출시키는복수의연결비아홀을포함하되, 복수의연결비아홀 중적어도하나의제1 연결비아홀에대하여, 제1 연결비아홀에의해노출되는제1 연결도전체로부터제1 연결비아홀의입구까지의평면거리가균일하지않다.
摘要翻译：提供了一种半导体封装和包括该封装的封装。根据本发明的一个实施例的半导体封装，包括基板，附连到顶部表面的半导体芯片，形成在整个衬底上的多个放置在衬底的上表面上的连接将要被嵌入到一个整体和半导体芯片的多个连接的模制材料，并且所述模制材料中的多个穿过图的连接，但包括多个导通孔连接，用于分别露出一个整体，，即使多个通，用于经由孔所述第一连接中的一个，所述曝光通过经由孔所述第一连接孔普遍连接从整个连接图到第一连接通孔入口的1平面距离不均匀。

7. 发明授权

KR101667656B1 패키지-온-패키지 형성방법 有权
标题翻译： - 在包装上形成包装的方法
公开(公告)号：KR101667656B1
公开(公告)日：2016-10-20
申请号：KR1020100026393
申请日：2010-03-24
申请人： 삼성전자주식회사
发明人： 김태훈 , 박진우 , 최대영 , 김미연 , 이선혜
IPC分类号： H01L23/522 , H01L23/48 , H01L23/00 , H01L25/065
CPC分类号： H01L23/5226 , H01L21/78 , H01L23/3128 , H01L23/481 , H01L24/14 , H01L24/81 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L25/50 , H01L2224/13022 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48225 , H01L2224/48227 , H01L2224/73204 , H01L2224/94 , H01L2225/06541 , H01L2225/06565 , H01L2225/1005 , H01L2225/1023 , H01L2225/1052 , H01L2225/1058 , H01L2924/01019 , H01L2924/10253 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/00 , H01L2224/11 , H01L2924/00012
摘要： 패키지-온-패키지형성방법을제공한다. 웨이퍼레벨몰딩(wafer level molding) 공정을이용하여웨이퍼를덮는봉지재(encapsulant)를형성한다. 상기웨이퍼는다수의반도체칩들및 상기반도체칩들을관통하는다수의관통전극들(through silicon via; TSV)을구비한다. 상기봉지재는상기관통전극들에정렬된개구부들을갖는다. 상기봉지재및 상기반도체칩들을분할하여다수의반도체패키지들을형성한다. 상기반도체패키지들중 선택된하나의상부에다른반도체패키지를적층한다. 상기다른반도체패키지는상기관통전극들에전기적으로접속된다.

8. 发明授权

KR101583719B1 반도체 패키지 및 그 제조 방법 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：KR101583719B1
公开(公告)日：2016-01-11
申请号：KR1020090066364
申请日：2009-07-21
申请人： 삼성전자주식회사
发明人： 이진호 , 임충빈 , 박진우 , 최대영 , 김미연
IPC分类号： H01L23/12 , H01L23/48
CPC分类号： H01L21/76898 , H01L23/13 , H01L23/481 , H01L23/49822 , H01L23/49838 , H01L24/05 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/18 , H01L2224/02372 , H01L2224/0401 , H01L2224/05548 , H01L2224/0557 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/32014 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2924/00014 , H01L2924/0002 , H01L2924/01033 , H01L2924/014 , H01L2924/078 , H01L2924/09701 , H01L2924/14 , H01L2924/1515 , H01L2924/15153 , H01L2924/15159 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： 본발명은반도체패키지및 그제조방법을제공한다. 이반도체패키지는함몰부를포함하는제 1 서브패키지와함몰부안에삽입되는제 2 서브패키지를포함한다. 제 2 서브패키지는관통비아가형성된반도체칩을포함한다. 이제조방법은각각의서브패키지들을별도로제조한후에결합한다.
摘要翻译：半导体封装可以包括具有第一表面和第二表面的基板，第二表面包括凹部，安装在第一表面上的第一半导体芯片，凹部外侧的第一球台面，凹部内的连接垫，第二表面所述第二半导体芯片包括电连接到所述连接焊盘的通孔，以及电连接到所述通孔的第二焊盘。半导体封装可以包括具有第一表面和第二表面的基板，第二表面包括凹部，安装在第一表面上的第一半导体芯片，凹部外侧的第一球台面，凹部内的连接垫，第二表面半导体芯片，所述第二芯片包括电连接到所述连接焊盘的通孔，以及电连接到所述通孔的第二焊盘。

9. 发明公开

KR1020120133651A 반도체 패키지 장치 审中-实审
标题翻译：半导体封装设备
公开(公告)号：KR1020120133651A
公开(公告)日：2012-12-11
申请号：KR1020110052394
申请日：2011-05-31
申请人： 삼성전자주식회사
发明人： 김태훈 , 최대영 , 안양훈 , 이선혜
IPC分类号： H01L23/488 , H01L23/12
CPC分类号： H01L23/49811 , H01L23/49816 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/13111 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13169 , H01L2224/16225 , H01L2224/32225 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45157 , H01L2224/45164 , H01L2224/45166 , H01L2224/45169 , H01L2224/45171 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2225/1082 , H01L2924/01047 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L23/488 , H01L23/12 , H01L23/481 , H01L2924/00012 , H01L2924/0105 , H01L2924/01029 , H01L2924/01013 , H01L2924/00 , H01L2924/00014
摘要： PURPOSE: A semiconductor package device is provided to produce an ultra-fine pitch of a package connection solder ball by leading a solder ball so that the package connection solder ball is formed to be long in upper and lower directions. CONSTITUTION: A first semiconductor package(10) comprises a first semiconductor chip, a first substrate, a first terminal, and a first signal transfer medium. A second semiconductor package(20) comprises a second semiconductor chip, a second substrate, a second terminal, and a second signal transfer medium. A package connection solder ball(30) is installed between the first terminal and the second terminal so that the first terminal and the second terminal are connected electrically. A first solder ball guide member(41) comprises a first guide side which guides a shape of the package connection solder ball.
摘要翻译：目的：提供一种半导体封装器件，以通过引导焊球来产生封装连接焊球的超细间距，使得封装连接焊球形成为在上下方向上长。构成：第一半导体封装（10）包括第一半导体芯片，第一基板，第一端子和第一信号传输介质。第二半导体封装（20）包括第二半导体芯片，第二基板，第二端子和第二信号传输介质。封装连接焊球（30）安装在第一端子和第二端子之间，使得第一端子和第二端子电连接。第一焊球引导构件（41）包括引导封装连接焊球形状的第一引导侧。

10. 发明公开

KR1020120077510A 인쇄회로기판 및 이를 포함하는 반도체 패키지 有权
标题翻译：印刷电路板和包含该印刷电路板的半导体封装
公开(公告)号：KR1020120077510A
公开(公告)日：2012-07-10
申请号：KR1020100139485
申请日：2010-12-30
申请人： 삼성전자주식회사
发明人： 김현기 , 최대영 , 김미연
IPC分类号： H01L23/498 , H05K3/46
CPC分类号： H05K3/4602 , H01L23/49822 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2924/15311 , H05K3/4608 , H05K2201/068 , H05K2201/09136 , H01L2924/00
摘要： PURPOSE: A printed circuit board and a semiconductor package including the same are provided to prevent the bending of a semiconductor package by setting different heat expansion coefficients for first and second sub core layers of a printed circuit board. CONSTITUTION: A printed circuit board(1) comprises a core layer(10), an upper wiring layer(20), and a lower wiring layer(30). The core layer comprises a first sub core layer(11) and a second sub core layer(12). The upper wiring layer, which includes an upper circuit pattern(22) formed in an upper insulating layer(21) and an upper connection pad(23) electrically connected to the upper circuit pattern, is formed on the top of the core layer. The lower wiring layer, which includes a lower circuit pattern(32) formed in a lower insulating layer(31) and a lower connection pad(33) electrically connected to the lower circuit pattern, is formed at the bottom of the core layer.
摘要翻译：目的：提供一种印刷电路板和包括该印刷电路板的半导体封装，以通过为印刷电路板的第一和第二子芯层设置不同的热膨胀系数来防止半导体封装的弯曲。构成：印刷电路板（1）包括芯层（10），上布线层（20）和下布线层（30）。芯层包括第一子芯层（11）和第二子芯层（12）。在芯层的顶部形成上布线层，其包括形成在上绝缘层（21）中的上电路图案（22）和与上电路图案电连接的上连接焊盘（23）。在芯层的底部形成下布线层，其包括形成在下绝缘层（31）中的下电路图案（32）和与下电路图案电连接的下连接焊盘（33）。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式