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1. 发明公开

KR1020130059003A 반도체 테스트 보드 및 반도체 보드 无效
标题翻译：半导体测试板和半导体板
公开(公告)号：KR1020130059003A
公开(公告)日：2013-06-05
申请号：KR1020110125072
申请日：2011-11-28
申请人： 삼성전자주식회사
发明人： 송기재 , 경상진 , 김상철 , 옥두환
IPC分类号： G01R31/28
CPC分类号： G01R31/2863 , G01R31/2875
摘要： PURPOSE: A semiconductor test board and a semiconductor board are provided to prevent excessive current supply of a mounting unit and to provide enhanced reliability by increasing a resistance value of a temperature resistance device when increasing the amount of current which is supplied to the mounting unit by providing the temperature resistance device between a power supply source and the mounting unit. CONSTITUTION: A semiconductor test board includes a power supply source(101); a first temperature resistance device and a second temperature resistance device(103) which are supplied with power from the power supply source and have a resistance value which changes according to a temperature; a first chip mounting unit(130) which is supplied with power through the second temperature resistance device and is comprised to mount a semiconductor package to be tested; and a second chip mounting unit which is supplied with power through the second temperature resistance device and mounts the semiconductor package to be tested.
摘要翻译：目的：提供半导体测试板和半导体板，以防止安装单元的过度电流供应，并且通过增加耐温装置的电阻值来增加提供给安装单元的电流量，从而提供增强的可靠性在电源和安装单元之间提供耐温装置。构成：半导体测试板包括电源（101）; 第一耐温装置和第二耐温装置（103），其从电源提供电力并具有根据温度而变化的电阻值; 第一芯片安装单元（130），其通过第二温度电阻装置供电并且被安装在待测试的半导体封装件上; 以及第二芯片安装单元，其通过第二耐温装置供电并安装待测试的半导体封装。

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